forked from Qortal/Brooklyn
7d3018da4c
* NVME, SATA NAND Security added * Qortal Core exception fetcher is now redone. * Update DT overlays for firmware * Fix for bvb clockj settings * Fix for no audio for sissy desktop porn watchers -_- ( thanks crowetic for watching gay porn and reporting me that bug asshat ) * Normalize the fetch() stream while doing a peer to peer handshake for nodes * Fix for RNG token editing error while performing a SHA256 encryption * Now under voltage errors will blink red led constantly for 5 minutes then go solid. * Improve kernel thread scaling for Qortal 2.0 core * HDMI circuit is now enabled at power up instead. * Added KMS * Added line replication instead of interpolation for VC4 GPU resulting in slightly better frame rates * Fix for long and doubles * Backplane clock is now set at standard rate * Capped HVEC clocks * Add support for Creative Cinema webcam for donkers who like sharing dick pics. *looks at crowetic* * More scanline XGA modes for people who have weird ass monitors of all sorts. * TX/RX flow control support is now 100% stable. No lags over 1Gbps ethernet. ( Hello Qortal 3.0 ) * Using flush cache instead of fetch for QC 2.0 resulting in performance gains * VC4 clock is now enforced for desktop oriented images. * Ondemand governor now waits for 2 seconds instead of 0.5ms to scale down to the lowest safest clock freq preventing lags to the core. * Timeout of OC set at 35ms from 90ms resulting in way better clocks and sync for Qortal 2.0 core
61 lines
1.8 KiB
C
61 lines
1.8 KiB
C
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
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/*
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* Microsemi Ocelot Switch driver
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*
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* License: Dual MIT/GPL
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* Copyright (c) 2017 Microsemi Corporation
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* Copyright 2020 NXP
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*/
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#ifndef _MSCC_OCELOT_PTP_H_
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#define _MSCC_OCELOT_PTP_H_
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#include <linux/ptp_clock_kernel.h>
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#include <soc/mscc/ocelot.h>
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#define OCELOT_MAX_PTP_ID 63
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#define OCELOT_PTP_FIFO_SIZE 128
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#define PTP_PIN_CFG_RSZ 0x20
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#define PTP_PIN_TOD_SEC_MSB_RSZ PTP_PIN_CFG_RSZ
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#define PTP_PIN_TOD_SEC_LSB_RSZ PTP_PIN_CFG_RSZ
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#define PTP_PIN_TOD_NSEC_RSZ PTP_PIN_CFG_RSZ
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#define PTP_PIN_WF_HIGH_PERIOD_RSZ PTP_PIN_CFG_RSZ
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#define PTP_PIN_WF_LOW_PERIOD_RSZ PTP_PIN_CFG_RSZ
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#define PTP_PIN_CFG_DOM BIT(0)
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#define PTP_PIN_CFG_SYNC BIT(2)
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#define PTP_PIN_CFG_ACTION(x) ((x) << 3)
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#define PTP_PIN_CFG_ACTION_MASK PTP_PIN_CFG_ACTION(0x7)
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enum {
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PTP_PIN_ACTION_IDLE = 0,
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PTP_PIN_ACTION_LOAD,
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PTP_PIN_ACTION_SAVE,
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PTP_PIN_ACTION_CLOCK,
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PTP_PIN_ACTION_DELTA,
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PTP_PIN_ACTION_NOSYNC,
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PTP_PIN_ACTION_SYNC,
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};
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#define PTP_CFG_MISC_PTP_EN BIT(2)
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#define PTP_CFG_CLK_ADJ_CFG_ENA BIT(0)
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#define PTP_CFG_CLK_ADJ_CFG_DIR BIT(1)
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#define PTP_CFG_CLK_ADJ_FREQ_NS BIT(30)
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int ocelot_ptp_gettime64(struct ptp_clock_info *ptp, struct timespec64 *ts);
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int ocelot_ptp_settime64(struct ptp_clock_info *ptp,
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const struct timespec64 *ts);
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int ocelot_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta);
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int ocelot_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm);
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int ocelot_ptp_verify(struct ptp_clock_info *ptp, unsigned int pin,
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enum ptp_pin_function func, unsigned int chan);
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int ocelot_ptp_enable(struct ptp_clock_info *ptp,
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struct ptp_clock_request *rq, int on);
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int ocelot_init_timestamp(struct ocelot *ocelot,
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const struct ptp_clock_info *info);
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int ocelot_deinit_timestamp(struct ocelot *ocelot);
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#endif
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