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208 lines
5.1 KiB
208 lines
5.1 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* 64-bit atomic xchg() and cmpxchg() definitions. |
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* |
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* Copyright (C) 1996, 1997, 2000 David S. Miller ([email protected]) |
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*/ |
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#ifndef __ARCH_SPARC64_CMPXCHG__ |
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#define __ARCH_SPARC64_CMPXCHG__ |
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static inline unsigned long |
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__cmpxchg_u32(volatile int *m, int old, int new) |
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{ |
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__asm__ __volatile__("cas [%2], %3, %0" |
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: "=&r" (new) |
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: "0" (new), "r" (m), "r" (old) |
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: "memory"); |
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return new; |
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} |
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static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val) |
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{ |
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unsigned long tmp1, tmp2; |
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__asm__ __volatile__( |
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" mov %0, %1\n" |
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"1: lduw [%4], %2\n" |
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" cas [%4], %2, %0\n" |
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" cmp %2, %0\n" |
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" bne,a,pn %%icc, 1b\n" |
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" mov %1, %0\n" |
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: "=&r" (val), "=&r" (tmp1), "=&r" (tmp2) |
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: "0" (val), "r" (m) |
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: "cc", "memory"); |
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return val; |
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} |
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static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long val) |
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{ |
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unsigned long tmp1, tmp2; |
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__asm__ __volatile__( |
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" mov %0, %1\n" |
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"1: ldx [%4], %2\n" |
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" casx [%4], %2, %0\n" |
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" cmp %2, %0\n" |
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" bne,a,pn %%xcc, 1b\n" |
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" mov %1, %0\n" |
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: "=&r" (val), "=&r" (tmp1), "=&r" (tmp2) |
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: "0" (val), "r" (m) |
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: "cc", "memory"); |
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return val; |
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} |
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#define xchg(ptr,x) \ |
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({ __typeof__(*(ptr)) __ret; \ |
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__ret = (__typeof__(*(ptr))) \ |
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__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))); \ |
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__ret; \ |
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}) |
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void __xchg_called_with_bad_pointer(void); |
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/* |
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* Use 4 byte cas instruction to achieve 2 byte xchg. Main logic |
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* here is to get the bit shift of the byte we are interested in. |
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* The XOR is handy for reversing the bits for big-endian byte order. |
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*/ |
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static inline unsigned long |
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xchg16(__volatile__ unsigned short *m, unsigned short val) |
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{ |
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unsigned long maddr = (unsigned long)m; |
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int bit_shift = (((unsigned long)m & 2) ^ 2) << 3; |
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unsigned int mask = 0xffff << bit_shift; |
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unsigned int *ptr = (unsigned int *) (maddr & ~2); |
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unsigned int old32, new32, load32; |
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/* Read the old value */ |
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load32 = *ptr; |
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do { |
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old32 = load32; |
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new32 = (load32 & (~mask)) | val << bit_shift; |
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load32 = __cmpxchg_u32(ptr, old32, new32); |
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} while (load32 != old32); |
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return (load32 & mask) >> bit_shift; |
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} |
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static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, |
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int size) |
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{ |
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switch (size) { |
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case 2: |
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return xchg16(ptr, x); |
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case 4: |
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return xchg32(ptr, x); |
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case 8: |
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return xchg64(ptr, x); |
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} |
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__xchg_called_with_bad_pointer(); |
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return x; |
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} |
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/* |
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* Atomic compare and exchange. Compare OLD with MEM, if identical, |
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* store NEW in MEM. Return the initial value in MEM. Success is |
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* indicated by comparing RETURN with OLD. |
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*/ |
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#include <asm-generic/cmpxchg-local.h> |
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static inline unsigned long |
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__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new) |
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{ |
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__asm__ __volatile__("casx [%2], %3, %0" |
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: "=&r" (new) |
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: "0" (new), "r" (m), "r" (old) |
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: "memory"); |
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return new; |
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} |
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/* |
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* Use 4 byte cas instruction to achieve 1 byte cmpxchg. Main logic |
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* here is to get the bit shift of the byte we are interested in. |
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* The XOR is handy for reversing the bits for big-endian byte order |
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*/ |
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static inline unsigned long |
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__cmpxchg_u8(volatile unsigned char *m, unsigned char old, unsigned char new) |
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{ |
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unsigned long maddr = (unsigned long)m; |
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int bit_shift = (((unsigned long)m & 3) ^ 3) << 3; |
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unsigned int mask = 0xff << bit_shift; |
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unsigned int *ptr = (unsigned int *) (maddr & ~3); |
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unsigned int old32, new32, load; |
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unsigned int load32 = *ptr; |
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do { |
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new32 = (load32 & ~mask) | (new << bit_shift); |
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old32 = (load32 & ~mask) | (old << bit_shift); |
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load32 = __cmpxchg_u32(ptr, old32, new32); |
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if (load32 == old32) |
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return old; |
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load = (load32 & mask) >> bit_shift; |
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} while (load == old); |
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return load; |
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} |
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/* This function doesn't exist, so you'll get a linker error |
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if something tries to do an invalid cmpxchg(). */ |
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void __cmpxchg_called_with_bad_pointer(void); |
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static inline unsigned long |
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__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) |
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{ |
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switch (size) { |
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case 1: |
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return __cmpxchg_u8(ptr, old, new); |
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case 4: |
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return __cmpxchg_u32(ptr, old, new); |
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case 8: |
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return __cmpxchg_u64(ptr, old, new); |
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} |
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__cmpxchg_called_with_bad_pointer(); |
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return old; |
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} |
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#define cmpxchg(ptr,o,n) \ |
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({ \ |
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__typeof__(*(ptr)) _o_ = (o); \ |
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__typeof__(*(ptr)) _n_ = (n); \ |
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(__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ |
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(unsigned long)_n_, sizeof(*(ptr))); \ |
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}) |
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/* |
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* cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make |
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* them available. |
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*/ |
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static inline unsigned long __cmpxchg_local(volatile void *ptr, |
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unsigned long old, |
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unsigned long new, int size) |
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{ |
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switch (size) { |
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case 4: |
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case 8: return __cmpxchg(ptr, old, new, size); |
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default: |
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return __cmpxchg_local_generic(ptr, old, new, size); |
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} |
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return old; |
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} |
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#define cmpxchg_local(ptr, o, n) \ |
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((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \ |
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(unsigned long)(n), sizeof(*(ptr)))) |
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#define cmpxchg64_local(ptr, o, n) \ |
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({ \ |
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ |
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cmpxchg_local((ptr), (o), (n)); \ |
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}) |
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#define cmpxchg64(ptr, o, n) cmpxchg64_local((ptr), (o), (n)) |
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#endif /* __ARCH_SPARC64_CMPXCHG__ */
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