forked from Qortal/Brooklyn
20 lines
476 B
C
20 lines
476 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
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*/
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#ifndef _TEGRA114_GPIO_H_
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#define _TEGRA114_GPIO_H_
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/*
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* The Tegra114 GPIO controller has 246 GPIOS in 8 banks of 4 ports,
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* each with 8 GPIOs.
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*/
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#define TEGRA_GPIO_PORTS 4 /* number of ports per bank */
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#define TEGRA_GPIO_BANKS 8 /* number of banks */
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#include <asm/arch-tegra/gpio.h>
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#include <asm/arch-tegra30/gpio.h>
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#endif /* _TEGRA114_GPIO_H_ */
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