forked from Qortal/Brooklyn
04c1822c0a
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104 lines
2.9 KiB
C
104 lines
2.9 KiB
C
// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
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/* Copyright(c) 2015 - 2020 Intel Corporation */
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#include <adf_accel_devices.h>
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#include <adf_pf2vf_msg.h>
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#include <adf_common_drv.h>
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#include <adf_gen2_hw_data.h>
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#include "adf_dh895xccvf_hw_data.h"
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static struct adf_hw_device_class dh895xcciov_class = {
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.name = ADF_DH895XCCVF_DEVICE_NAME,
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.type = DEV_DH895XCCVF,
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.instances = 0
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};
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static u32 get_accel_mask(struct adf_hw_device_data *self)
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{
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return ADF_DH895XCCIOV_ACCELERATORS_MASK;
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}
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static u32 get_ae_mask(struct adf_hw_device_data *self)
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{
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return ADF_DH895XCCIOV_ACCELENGINES_MASK;
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}
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static u32 get_num_accels(struct adf_hw_device_data *self)
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{
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return ADF_DH895XCCIOV_MAX_ACCELERATORS;
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}
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static u32 get_num_aes(struct adf_hw_device_data *self)
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{
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return ADF_DH895XCCIOV_MAX_ACCELENGINES;
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}
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static u32 get_misc_bar_id(struct adf_hw_device_data *self)
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{
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return ADF_DH895XCCIOV_PMISC_BAR;
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}
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static u32 get_etr_bar_id(struct adf_hw_device_data *self)
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{
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return ADF_DH895XCCIOV_ETR_BAR;
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}
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static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
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{
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return DEV_SKU_VF;
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}
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static u32 get_pf2vf_offset(u32 i)
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{
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return ADF_DH895XCCIOV_PF2VF_OFFSET;
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}
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static int adf_vf_int_noop(struct adf_accel_dev *accel_dev)
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{
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return 0;
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}
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static void adf_vf_void_noop(struct adf_accel_dev *accel_dev)
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{
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}
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void adf_init_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data)
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{
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hw_data->dev_class = &dh895xcciov_class;
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hw_data->num_banks = ADF_DH895XCCIOV_ETR_MAX_BANKS;
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hw_data->num_rings_per_bank = ADF_ETR_MAX_RINGS_PER_BANK;
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hw_data->num_accel = ADF_DH895XCCIOV_MAX_ACCELERATORS;
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hw_data->num_logical_accel = 1;
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hw_data->num_engines = ADF_DH895XCCIOV_MAX_ACCELENGINES;
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hw_data->tx_rx_gap = ADF_DH895XCCIOV_RX_RINGS_OFFSET;
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hw_data->tx_rings_mask = ADF_DH895XCCIOV_TX_RINGS_MASK;
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hw_data->alloc_irq = adf_vf_isr_resource_alloc;
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hw_data->free_irq = adf_vf_isr_resource_free;
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hw_data->enable_error_correction = adf_vf_void_noop;
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hw_data->init_admin_comms = adf_vf_int_noop;
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hw_data->exit_admin_comms = adf_vf_void_noop;
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hw_data->send_admin_init = adf_vf2pf_notify_init;
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hw_data->init_arb = adf_vf_int_noop;
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hw_data->exit_arb = adf_vf_void_noop;
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hw_data->disable_iov = adf_vf2pf_notify_shutdown;
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hw_data->get_accel_mask = get_accel_mask;
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hw_data->get_ae_mask = get_ae_mask;
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hw_data->get_num_accels = get_num_accels;
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hw_data->get_num_aes = get_num_aes;
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hw_data->get_etr_bar_id = get_etr_bar_id;
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hw_data->get_misc_bar_id = get_misc_bar_id;
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hw_data->get_pf2vf_offset = get_pf2vf_offset;
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hw_data->get_sku = get_sku;
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hw_data->enable_ints = adf_vf_void_noop;
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hw_data->enable_pfvf_comms = adf_enable_vf2pf_comms;
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hw_data->min_iov_compat_ver = ADF_PFVF_COMPAT_THIS_VERSION;
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hw_data->dev_class->instances++;
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adf_devmgr_update_class_index(hw_data);
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adf_gen2_init_hw_csr_ops(&hw_data->csr_ops);
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}
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void adf_clean_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data)
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{
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hw_data->dev_class->instances--;
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adf_devmgr_update_class_index(hw_data);
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}
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