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43 lines
1.2 KiB
43 lines
1.2 KiB
/* SPDX-License-Identifier: GPL-2.0 |
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* |
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* Copyright (C) 2018 Renesas Electronics Corp. |
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* Copyright (C) 2018 Cogent Embedded, Inc. |
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*/ |
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#ifndef __DT_BINDINGS_POWER_R8A77980_SYSC_H__ |
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#define __DT_BINDINGS_POWER_R8A77980_SYSC_H__ |
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/* |
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* These power domain indices match the numbers of the interrupt bits |
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* representing the power areas in the various Interrupt Registers |
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* (e.g. SYSCISR, Interrupt Status Register) |
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*/ |
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#define R8A77980_PD_A2SC2 0 |
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#define R8A77980_PD_A2SC3 1 |
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#define R8A77980_PD_A2SC4 2 |
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#define R8A77980_PD_A2DP0 3 |
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#define R8A77980_PD_A2DP1 4 |
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#define R8A77980_PD_CA53_CPU0 5 |
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#define R8A77980_PD_CA53_CPU1 6 |
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#define R8A77980_PD_CA53_CPU2 7 |
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#define R8A77980_PD_CA53_CPU3 8 |
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#define R8A77980_PD_A2CN 10 |
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#define R8A77980_PD_A3VIP0 11 |
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#define R8A77980_PD_A2IR5 12 |
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#define R8A77980_PD_CR7 13 |
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#define R8A77980_PD_A2IR4 15 |
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#define R8A77980_PD_CA53_SCU 21 |
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#define R8A77980_PD_A2IR0 23 |
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#define R8A77980_PD_A3IR 24 |
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#define R8A77980_PD_A3VIP1 25 |
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#define R8A77980_PD_A3VIP2 26 |
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#define R8A77980_PD_A2IR1 27 |
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#define R8A77980_PD_A2IR2 28 |
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#define R8A77980_PD_A2IR3 29 |
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#define R8A77980_PD_A2SC0 30 |
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#define R8A77980_PD_A2SC1 31 |
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/* Always-on power area */ |
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#define R8A77980_PD_ALWAYS_ON 32 |
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#endif /* __DT_BINDINGS_POWER_R8A77980_SYSC_H__ */
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