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81 lines
2.0 KiB
81 lines
2.0 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/reset/fsl,imx-src.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Freescale i.MX System Reset Controller |
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maintainers: |
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- Philipp Zabel <[email protected]> |
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description: | |
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The system reset controller can be used to reset the GPU, VPU, |
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IPU, and OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device |
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nodes should specify the reset line on the SRC in their resets |
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property, containing a phandle to the SRC device node and a |
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RESET_INDEX specifying which module to reset, as described in |
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reset.txt |
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The following RESET_INDEX values are valid for i.MX5: |
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GPU_RESET 0 |
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VPU_RESET 1 |
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IPU1_RESET 2 |
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OPEN_VG_RESET 3 |
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The following additional RESET_INDEX value is valid for i.MX6: |
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IPU2_RESET 4 |
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properties: |
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compatible: |
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oneOf: |
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- const: "fsl,imx51-src" |
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- items: |
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- const: "fsl,imx50-src" |
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- const: "fsl,imx51-src" |
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- items: |
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- const: "fsl,imx53-src" |
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- const: "fsl,imx51-src" |
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- items: |
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- const: "fsl,imx6q-src" |
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- const: "fsl,imx51-src" |
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- items: |
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- const: "fsl,imx6sx-src" |
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- const: "fsl,imx51-src" |
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- items: |
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- const: "fsl,imx6sl-src" |
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- const: "fsl,imx51-src" |
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- items: |
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- const: "fsl,imx6ul-src" |
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- const: "fsl,imx51-src" |
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- items: |
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- const: "fsl,imx6sll-src" |
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- const: "fsl,imx51-src" |
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reg: |
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maxItems: 1 |
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interrupts: |
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items: |
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- description: SRC interrupt |
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- description: CPU WDOG interrupts out of SRC |
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minItems: 1 |
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'#reset-cells': |
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const: 1 |
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required: |
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- compatible |
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- reg |
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- interrupts |
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- '#reset-cells' |
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additionalProperties: false |
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examples: |
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- | |
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reset-controller@73fd0000 { |
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compatible = "fsl,imx51-src"; |
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reg = <0x73fd0000 0x4000>; |
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interrupts = <75>; |
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#reset-cells = <1>; |
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};
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