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326 lines
9.9 KiB
326 lines
9.9 KiB
# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: OMAP4+ Remoteproc Devices |
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maintainers: |
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- Suman Anna <[email protected]> |
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description: |
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The OMAP family of SoCs usually have one or more slave processor sub-systems |
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that are used to offload some of the processor-intensive tasks, or to manage |
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other hardware accelerators, for achieving various system level goals. |
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The processor cores in the sub-system are usually behind an IOMMU, and may |
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contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2 |
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caches, an Interrupt Controller, a Cache Controller etc. |
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The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor |
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sub-system. The DSP processor sub-system can contain any of the TI's C64x, |
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C66x or C67x family of DSP cores as the main execution unit. The IPU processor |
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sub-system usually contains either a Dual-Core Cortex-M3 or Dual-Core |
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Cortex-M4 processors. |
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Each remote processor sub-system is represented as a single DT node. Each node |
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has a number of required or optional properties that enable the OS running on |
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the host processor (MPU) to perform the device management of the remote |
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processor and to communicate with the remote processor. The various properties |
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can be classified as constant or variable. The constant properties are |
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dictated by the SoC and does not change from one board to another having the |
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same SoC. Examples of constant properties include 'iommus', 'reg'. The |
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variable properties are dictated by the system integration aspects such as |
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memory on the board, or configuration used within the corresponding firmware |
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image. Examples of variable properties include 'mboxes', 'memory-region', |
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'timers', 'watchdog-timers' etc. |
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properties: |
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compatible: |
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enum: |
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- ti,omap4-dsp |
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- ti,omap5-dsp |
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- ti,dra7-dsp |
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- ti,omap4-ipu |
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- ti,omap5-ipu |
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- ti,dra7-ipu |
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iommus: |
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minItems: 1 |
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maxItems: 2 |
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description: | |
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phandles to OMAP IOMMU nodes, that need to be programmed |
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for this remote processor to access any external RAM memory or |
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other peripheral device address spaces. This property usually |
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has only a single phandle. Multiple phandles are used only in |
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cases where the sub-system has different ports for different |
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sub-modules within the processor sub-system (eg: DRA7 DSPs), |
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and need the same programming in both the MMUs. |
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mboxes: |
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minItems: 1 |
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maxItems: 2 |
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description: | |
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OMAP Mailbox specifier denoting the sub-mailbox, to be used for |
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communication with the remote processor. The specifier format is |
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as per the bindings, |
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Documentation/devicetree/bindings/mailbox/ti,omap-mailbox.yaml |
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This property should match with the sub-mailbox node used in |
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the firmware image. |
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clocks: |
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maxItems: 1 |
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description: | |
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Main functional clock for the remote processor |
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resets: |
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minItems: 1 |
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maxItems: 2 |
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description: | |
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Reset handles for the remote processor |
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firmware-name: |
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description: | |
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Default name of the firmware to load to the remote processor. |
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# Optional properties: |
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# -------------------- |
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# Some of these properties are mandatory on some SoCs, and some are optional |
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# depending on the configuration of the firmware image to be executed on the |
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# remote processor. The conditions are mentioned for each property. |
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# |
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# The following are the optional properties: |
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memory-region: |
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maxItems: 1 |
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description: | |
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phandle to the reserved memory node to be associated |
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with the remoteproc device. The reserved memory node |
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can be a CMA memory node, and should be defined as |
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per the bindings, |
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Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt |
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reg: |
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description: | |
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Address space for any remoteproc memories present on |
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the SoC. Should contain an entry for each value in |
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'reg-names'. These are mandatory for all DSP and IPU |
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processors that have them (OMAP4/OMAP5 DSPs do not have |
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any RAMs) |
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reg-names: |
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description: | |
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Required names for each of the address spaces defined in |
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the 'reg' property. Expects the names from the following |
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list, in the specified order, each representing the corresponding |
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internal RAM memory region. |
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minItems: 1 |
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items: |
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- const: l2ram |
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- const: l1pram |
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- const: l1dram |
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ti,bootreg: |
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$ref: /schemas/types.yaml#/definitions/phandle-array |
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description: | |
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Should be a triple of the phandle to the System Control |
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Configuration region that contains the boot address |
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register, the register offset of the boot address |
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register within the System Control module, and the bit |
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shift within the register. This property is required for |
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all the DSP instances on OMAP4, OMAP5 and DRA7xx SoCs. |
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ti,autosuspend-delay-ms: |
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description: | |
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Custom autosuspend delay for the remoteproc in milliseconds. |
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Recommended values is preferable to be in the order of couple |
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of seconds. A negative value can also be used to disable the |
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autosuspend behavior. |
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ti,timers: |
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$ref: /schemas/types.yaml#/definitions/phandle-array |
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description: | |
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One or more phandles to OMAP DMTimer nodes, that serve |
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as System/Tick timers for the OS running on the remote |
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processors. This will usually be a single timer if the |
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processor sub-system is running in SMP mode, or one per |
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core in the processor sub-system. This can also be used |
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to reserve specific timers to be dedicated to the |
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remote processors. |
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This property is mandatory on remote processors requiring |
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external tick wakeup, and to support Power Management |
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features. The timers to be used should match with the |
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timers used in the firmware image. |
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ti,watchdog-timers: |
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$ref: /schemas/types.yaml#/definitions/phandle-array |
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description: | |
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One or more phandles to OMAP DMTimer nodes, used to |
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serve as Watchdog timers for the processor cores. This |
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will usually be one per executing processor core, even |
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if the processor sub-system is running a SMP OS. |
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The timers to be used should match with the watchdog |
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timers used in the firmware image. |
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if: |
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properties: |
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compatible: |
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enum: |
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- ti,dra7-dsp |
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then: |
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properties: |
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reg: |
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minItems: 3 |
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maxItems: 3 |
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required: |
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- reg |
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- reg-names |
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- ti,bootreg |
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else: |
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if: |
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properties: |
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compatible: |
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enum: |
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- ti,omap4-ipu |
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- ti,omap5-ipu |
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- ti,dra7-ipu |
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then: |
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properties: |
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reg: |
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minItems: 1 |
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maxItems: 1 |
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ti,bootreg: false |
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required: |
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- reg |
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- reg-names |
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else: |
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properties: |
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reg: false |
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required: |
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- ti,bootreg |
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required: |
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- compatible |
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- iommus |
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- mboxes |
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- clocks |
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- resets |
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- firmware-name |
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additionalProperties: false |
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examples: |
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- | |
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//Example 1: OMAP4 DSP |
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/* DSP Reserved Memory node */ |
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#include <dt-bindings/clock/omap4.h> |
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reserved-memory { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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dsp_memory_region: dsp-memory@98000000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x98000000 0x800000>; |
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reusable; |
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}; |
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}; |
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/* DSP node */ |
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ocp { |
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dsp: dsp { |
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compatible = "ti,omap4-dsp"; |
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ti,bootreg = <&scm_conf 0x304 0>; |
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iommus = <&mmu_dsp>; |
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mboxes = <&mailbox &mbox_dsp>; |
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memory-region = <&dsp_memory_region>; |
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ti,timers = <&timer5>; |
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ti,watchdog-timers = <&timer6>; |
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clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>; |
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resets = <&prm_tesla 0>, <&prm_tesla 1>; |
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firmware-name = "omap4-dsp-fw.xe64T"; |
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}; |
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}; |
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- |+ |
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//Example 2: OMAP5 IPU |
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/* IPU Reserved Memory node */ |
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#include <dt-bindings/clock/omap5.h> |
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reserved-memory { |
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#address-cells = <2>; |
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#size-cells = <2>; |
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ipu_memory_region: ipu-memory@95800000 { |
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compatible = "shared-dma-pool"; |
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reg = <0 0x95800000 0 0x3800000>; |
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reusable; |
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}; |
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}; |
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/* IPU node */ |
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ocp { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ipu: ipu@55020000 { |
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compatible = "ti,omap5-ipu"; |
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reg = <0x55020000 0x10000>; |
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reg-names = "l2ram"; |
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iommus = <&mmu_ipu>; |
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mboxes = <&mailbox &mbox_ipu>; |
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memory-region = <&ipu_memory_region>; |
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ti,timers = <&timer3>, <&timer4>; |
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ti,watchdog-timers = <&timer9>, <&timer11>; |
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clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>; |
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resets = <&prm_core 2>; |
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firmware-name = "omap5-ipu-fw.xem4"; |
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}; |
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}; |
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- |+ |
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//Example 3: DRA7xx/AM57xx DSP |
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/* DSP1 Reserved Memory node */ |
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#include <dt-bindings/clock/dra7.h> |
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reserved-memory { |
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#address-cells = <2>; |
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#size-cells = <2>; |
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dsp1_memory_region: dsp1-memory@99000000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x0 0x99000000 0x0 0x4000000>; |
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reusable; |
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}; |
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}; |
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/* DSP1 node */ |
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ocp { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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dsp1: dsp@40800000 { |
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compatible = "ti,dra7-dsp"; |
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reg = <0x40800000 0x48000>, |
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<0x40e00000 0x8000>, |
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<0x40f00000 0x8000>; |
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reg-names = "l2ram", "l1pram", "l1dram"; |
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ti,bootreg = <&scm_conf 0x55c 0>; |
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iommus = <&mmu0_dsp1>, <&mmu1_dsp1>; |
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mboxes = <&mailbox5 &mbox_dsp1_ipc3x>; |
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memory-region = <&dsp1_memory_region>; |
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ti,timers = <&timer5>; |
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ti,watchdog-timers = <&timer10>; |
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resets = <&prm_dsp1 0>; |
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clocks = <&dsp1_clkctrl DRA7_DSP1_MMU0_DSP1_CLKCTRL 0>; |
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firmware-name = "dra7-dsp1-fw.xe66"; |
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}; |
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};
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