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60 lines
2.1 KiB
60 lines
2.1 KiB
STMicroelectronics SoC DWMAC glue layer controller |
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This file documents differences between the core properties in |
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Documentation/devicetree/bindings/net/stmmac.txt |
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and what is needed on STi platforms to program the stmmac glue logic. |
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The device node has following properties. |
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Required properties: |
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- compatible : Can be "st,stih415-dwmac", "st,stih416-dwmac", |
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"st,stih407-dwmac", "st,stid127-dwmac". |
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- st,syscon : Should be phandle/offset pair. The phandle to the syscon node which |
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encompases the glue register, and the offset of the control register. |
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- st,gmac_en: this is to enable the gmac into a dedicated sysctl control |
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register available on STiH407 SoC. |
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- pinctrl-0: pin-control for all the MII mode supported. |
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Optional properties: |
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- resets : phandle pointing to the system reset controller with correct |
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reset line index for ethernet reset. |
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- st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or |
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MAC can generate it. |
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- st,tx-retime-src: This specifies which clk is wired up to the mac for |
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retimeing tx lines. This is totally board dependent and can take one of the |
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posssible values from "txclk", "clk_125" or "clkgen". |
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If not passed, the internal clock will be used by default. |
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- sti-ethclk: this is the phy clock. |
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- sti-clkconf: this is an extra sysconfig register, available in new SoCs, |
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to program the clk retiming. |
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- st,gmac_en: to enable the GMAC, this only is present in some SoCs; e.g. |
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STiH407. |
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Example: |
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ethernet0: dwmac@9630000 { |
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device_type = "network"; |
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compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710"; |
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reg = <0x9630000 0x8000>; |
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reg-names = "stmmaceth"; |
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st,syscon = <&syscfg_sbc_reg 0x80>; |
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st,gmac_en; |
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resets = <&softreset STIH407_ETH1_SOFTRESET>; |
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reset-names = "stmmaceth"; |
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interrupts = <GIC_SPI 98 IRQ_TYPE_NONE>, |
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<GIC_SPI 99 IRQ_TYPE_NONE>, |
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<GIC_SPI 100 IRQ_TYPE_NONE>; |
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interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; |
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snps,pbl = <32>; |
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snps,mixed-burst; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_rgmii1>; |
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clock-names = "stmmaceth", "sti-ethclk"; |
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clocks = <&CLK_S_C0_FLEXGEN CLK_EXT2F_A9>, |
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<&CLK_S_C0_FLEXGEN CLK_ETH_PHY>; |
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};
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