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195 lines
4.9 KiB
195 lines
4.9 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/net/qca,ar71xx.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: QCA AR71XX MAC |
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allOf: |
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- $ref: ethernet-controller.yaml# |
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maintainers: |
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- Oleksij Rempel <[email protected]> |
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properties: |
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compatible: |
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oneOf: |
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- items: |
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- enum: |
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- qca,ar7100-eth # Atheros AR7100 |
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- qca,ar7240-eth # Atheros AR7240 |
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- qca,ar7241-eth # Atheros AR7241 |
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- qca,ar7242-eth # Atheros AR7242 |
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- qca,ar9130-eth # Atheros AR9130 |
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- qca,ar9330-eth # Atheros AR9330 |
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- qca,ar9340-eth # Atheros AR9340 |
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- qca,qca9530-eth # Qualcomm Atheros QCA9530 |
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- qca,qca9550-eth # Qualcomm Atheros QCA9550 |
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- qca,qca9560-eth # Qualcomm Atheros QCA9560 |
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reg: |
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maxItems: 1 |
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interrupts: |
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maxItems: 1 |
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clocks: |
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items: |
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- description: MAC main clock |
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- description: MDIO clock |
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clock-names: |
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items: |
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- const: eth |
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- const: mdio |
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resets: |
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items: |
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- description: MAC reset |
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- description: MDIO reset |
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reset-names: |
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items: |
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- const: mac |
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- const: mdio |
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mdio: |
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$ref: mdio.yaml# |
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unevaluatedProperties: false |
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required: |
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- compatible |
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- reg |
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- interrupts |
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- phy-mode |
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- clocks |
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- clock-names |
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- resets |
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- reset-names |
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unevaluatedProperties: false |
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examples: |
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# Lager board |
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- | |
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eth0: ethernet@19000000 { |
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compatible = "qca,ar9330-eth"; |
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reg = <0x19000000 0x200>; |
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interrupts = <4>; |
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resets = <&rst 9>, <&rst 22>; |
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reset-names = "mac", "mdio"; |
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clocks = <&pll 1>, <&pll 2>; |
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clock-names = "eth", "mdio"; |
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phy-mode = "mii"; |
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phy-handle = <&phy_port4>; |
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}; |
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eth1: ethernet@1a000000 { |
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compatible = "qca,ar9330-eth"; |
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reg = <0x1a000000 0x200>; |
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interrupts = <5>; |
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resets = <&rst 13>, <&rst 23>; |
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reset-names = "mac", "mdio"; |
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clocks = <&pll 1>, <&pll 2>; |
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clock-names = "eth", "mdio"; |
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phy-mode = "gmii"; |
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fixed-link { |
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speed = <1000>; |
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full-duplex; |
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}; |
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mdio { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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switch10: switch@10 { |
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compatible = "qca,ar9331-switch"; |
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reg = <0x10>; |
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resets = <&rst 8>; |
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reset-names = "switch"; |
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interrupt-parent = <&miscintc>; |
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interrupts = <12>; |
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interrupt-controller; |
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#interrupt-cells = <1>; |
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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switch_port0: port@0 { |
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reg = <0x0>; |
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label = "cpu"; |
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ethernet = <ð1>; |
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phy-mode = "gmii"; |
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fixed-link { |
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speed = <1000>; |
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full-duplex; |
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}; |
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}; |
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switch_port1: port@1 { |
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reg = <0x1>; |
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phy-handle = <&phy_port0>; |
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phy-mode = "internal"; |
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}; |
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switch_port2: port@2 { |
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reg = <0x2>; |
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phy-handle = <&phy_port1>; |
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phy-mode = "internal"; |
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}; |
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switch_port3: port@3 { |
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reg = <0x3>; |
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phy-handle = <&phy_port2>; |
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phy-mode = "internal"; |
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}; |
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switch_port4: port@4 { |
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reg = <0x4>; |
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phy-handle = <&phy_port3>; |
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phy-mode = "internal"; |
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}; |
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}; |
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mdio { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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interrupt-parent = <&switch10>; |
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phy_port0: ethernet-phy@0 { |
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reg = <0x0>; |
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interrupts = <0>; |
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}; |
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phy_port1: ethernet-phy@1 { |
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reg = <0x1>; |
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interrupts = <0>; |
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}; |
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phy_port2: ethernet-phy@2 { |
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reg = <0x2>; |
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interrupts = <0>; |
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}; |
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phy_port3: ethernet-phy@3 { |
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reg = <0x3>; |
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interrupts = <0>; |
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}; |
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phy_port4: ethernet-phy@4 { |
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reg = <0x4>; |
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interrupts = <0>; |
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}; |
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}; |
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}; |
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}; |
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};
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