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90 lines
2.0 KiB
90 lines
2.0 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/net/mediatek,star-emac.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: MediaTek STAR Ethernet MAC Controller |
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maintainers: |
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- Bartosz Golaszewski <[email protected]> |
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description: |
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This Ethernet MAC is used on the MT8* family of SoCs from MediaTek. |
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It's compliant with 802.3 standards and supports half- and full-duplex |
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modes with flow-control as well as CRC offloading and VLAN tags. |
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allOf: |
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- $ref: "ethernet-controller.yaml#" |
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properties: |
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compatible: |
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enum: |
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- mediatek,mt8516-eth |
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- mediatek,mt8518-eth |
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- mediatek,mt8175-eth |
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reg: |
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maxItems: 1 |
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interrupts: |
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maxItems: 1 |
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clocks: |
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minItems: 3 |
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maxItems: 3 |
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clock-names: |
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additionalItems: false |
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items: |
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- const: core |
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- const: reg |
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- const: trans |
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mediatek,pericfg: |
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$ref: /schemas/types.yaml#/definitions/phandle |
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description: |
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Phandle to the device containing the PERICFG register range. This is used |
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to control the MII mode. |
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mdio: |
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$ref: mdio.yaml# |
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unevaluatedProperties: false |
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required: |
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- compatible |
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- reg |
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- interrupts |
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- clocks |
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- clock-names |
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- mediatek,pericfg |
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- phy-handle |
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unevaluatedProperties: false |
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examples: |
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- | |
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#include <dt-bindings/interrupt-controller/arm-gic.h> |
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#include <dt-bindings/clock/mt8516-clk.h> |
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ethernet: ethernet@11180000 { |
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compatible = "mediatek,mt8516-eth"; |
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reg = <0x11180000 0x1000>; |
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mediatek,pericfg = <&pericfg>; |
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interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_LOW>; |
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clocks = <&topckgen CLK_TOP_RG_ETH>, |
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<&topckgen CLK_TOP_66M_ETH>, |
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<&topckgen CLK_TOP_133M_ETH>; |
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clock-names = "core", "reg", "trans"; |
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phy-handle = <ð_phy>; |
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phy-mode = "rmii"; |
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mdio { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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eth_phy: ethernet-phy@0 { |
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reg = <0>; |
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}; |
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}; |
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};
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