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95 lines
3.9 KiB
95 lines
3.9 KiB
* Freescale Fast Ethernet Controller (FEC) |
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Required properties: |
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- compatible : Should be "fsl,<soc>-fec" |
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- reg : Address and length of the register set for the device |
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- interrupts : Should contain fec interrupt |
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- phy-mode : See ethernet.txt file in the same directory |
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Optional properties: |
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- phy-supply : regulator that powers the Ethernet PHY. |
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- phy-handle : phandle to the PHY device connected to this device. |
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- fixed-link : Assume a fixed link. See fixed-link.txt in the same directory. |
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Use instead of phy-handle. |
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- fsl,num-tx-queues : The property is valid for enet-avb IP, which supports |
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hw multi queues. Should specify the tx queue number, otherwise set tx queue |
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number to 1. |
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- fsl,num-rx-queues : The property is valid for enet-avb IP, which supports |
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hw multi queues. Should specify the rx queue number, otherwise set rx queue |
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number to 1. |
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- fsl,magic-packet : If present, indicates that the hardware supports waking |
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up via magic packet. |
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- fsl,err006687-workaround-present: If present indicates that the system has |
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the hardware workaround for ERR006687 applied and does not need a software |
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workaround. |
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- fsl,stop-mode: register bits of stop mode control, the format is |
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<&gpr req_gpr req_bit>. |
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gpr is the phandle to general purpose register node. |
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req_gpr is the gpr register offset for ENET stop request. |
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req_bit is the gpr bit offset for ENET stop request. |
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-interrupt-names: names of the interrupts listed in interrupts property in |
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the same order. The defaults if not specified are |
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__Number of interrupts__ __Default__ |
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1 "int0" |
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2 "int0", "pps" |
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3 "int0", "int1", "int2" |
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4 "int0", "int1", "int2", "pps" |
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The order may be changed as long as they correspond to the interrupts |
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property. Currently, only i.mx7 uses "int1" and "int2". They correspond to |
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tx/rx queues 1 and 2. "int0" will be used for queue 0 and ENET_MII interrupts. |
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For imx6sx, "int0" handles all 3 queues and ENET_MII. "pps" is for the pulse |
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per second interrupt associated with 1588 precision time protocol(PTP). |
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Optional subnodes: |
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- mdio : specifies the mdio bus in the FEC, used as a container for phy nodes |
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according to phy.txt in the same directory |
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Deprecated optional properties: |
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To avoid these, create a phy node according to phy.txt in the same |
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directory, and point the fec's "phy-handle" property to it. Then use |
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the phy's reset binding, again described by phy.txt. |
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- phy-reset-gpios : Should specify the gpio for phy reset |
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- phy-reset-duration : Reset duration in milliseconds. Should present |
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only if property "phy-reset-gpios" is available. Missing the property |
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will have the duration be 1 millisecond. Numbers greater than 1000 are |
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invalid and 1 millisecond will be used instead. |
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- phy-reset-active-high : If present then the reset sequence using the GPIO |
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specified in the "phy-reset-gpios" property is reversed (H=reset state, |
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L=operation state). |
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- phy-reset-post-delay : Post reset delay in milliseconds. If present then |
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a delay of phy-reset-post-delay milliseconds will be observed after the |
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phy-reset-gpios has been toggled. Can be omitted thus no delay is |
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observed. Delay is in range of 1ms to 1000ms. Other delays are invalid. |
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Example: |
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ethernet@83fec000 { |
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compatible = "fsl,imx51-fec", "fsl,imx27-fec"; |
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reg = <0x83fec000 0x4000>; |
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interrupts = <87>; |
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phy-mode = "mii"; |
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phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; /* GPIO2_14 */ |
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local-mac-address = [00 04 9F 01 1B B9]; |
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phy-supply = <®_fec_supply>; |
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}; |
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Example with phy specified: |
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ethernet@83fec000 { |
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compatible = "fsl,imx51-fec", "fsl,imx27-fec"; |
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reg = <0x83fec000 0x4000>; |
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interrupts = <87>; |
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phy-mode = "mii"; |
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phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; /* GPIO2_14 */ |
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local-mac-address = [00 04 9F 01 1B B9]; |
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phy-supply = <®_fec_supply>; |
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phy-handle = <ðphy>; |
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mdio { |
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clock-frequency = <5000000>; |
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ethphy: ethernet-phy@6 { |
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compatible = "ethernet-phy-ieee802.3-c22"; |
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reg = <6>; |
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max-speed = <100>; |
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}; |
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}; |
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};
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