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92 lines
2.7 KiB
92 lines
2.7 KiB
Cortina Systems Gemini Ethernet Controller |
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This ethernet controller is found in the Gemini SoC family: |
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StorLink SL3512 and SL3516, also known as Cortina Systems |
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CS3512 and CS3516. |
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Required properties: |
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- compatible: must be "cortina,gemini-ethernet" |
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- reg: must contain the global registers and the V-bit and A-bit |
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memory areas, in total three register sets. |
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- syscon: a phandle to the system controller |
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- #address-cells: must be specified, must be <1> |
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- #size-cells: must be specified, must be <1> |
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- ranges: should be state like this giving a 1:1 address translation |
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for the subnodes |
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The subnodes represents the two ethernet ports in this device. |
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They are not independent of each other since they share resources |
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in the parent node, and are thus children. |
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Required subnodes: |
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- port0: contains the resources for ethernet port 0 |
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- port1: contains the resources for ethernet port 1 |
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Required subnode properties: |
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- compatible: must be "cortina,gemini-ethernet-port" |
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- reg: must contain two register areas: the DMA/TOE memory and |
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the GMAC memory area of the port |
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- interrupts: should contain the interrupt line of the port. |
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this is nominally a level interrupt active high. |
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- resets: this must provide an SoC-integrated reset line for |
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the port. |
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- clocks: this should contain a handle to the PCLK clock for |
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clocking the silicon in this port |
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- clock-names: must be "PCLK" |
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Optional subnode properties: |
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- phy-mode: see ethernet.txt |
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- phy-handle: see ethernet.txt |
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Example: |
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mdio-bus { |
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(...) |
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phy0: ethernet-phy@1 { |
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reg = <1>; |
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device_type = "ethernet-phy"; |
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}; |
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phy1: ethernet-phy@3 { |
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reg = <3>; |
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device_type = "ethernet-phy"; |
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}; |
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}; |
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ethernet@60000000 { |
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compatible = "cortina,gemini-ethernet"; |
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reg = <0x60000000 0x4000>, /* Global registers, queue */ |
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<0x60004000 0x2000>, /* V-bit */ |
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<0x60006000 0x2000>; /* A-bit */ |
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syscon = <&syscon>; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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gmac0: ethernet-port@0 { |
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compatible = "cortina,gemini-ethernet-port"; |
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reg = <0x60008000 0x2000>, /* Port 0 DMA/TOE */ |
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<0x6000a000 0x2000>; /* Port 0 GMAC */ |
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interrupt-parent = <&intcon>; |
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; |
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resets = <&syscon GEMINI_RESET_GMAC0>; |
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clocks = <&syscon GEMINI_CLK_GATE_GMAC0>; |
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clock-names = "PCLK"; |
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phy-mode = "rgmii"; |
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phy-handle = <&phy0>; |
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}; |
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gmac1: ethernet-port@1 { |
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compatible = "cortina,gemini-ethernet-port"; |
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reg = <0x6000c000 0x2000>, /* Port 1 DMA/TOE */ |
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<0x6000e000 0x2000>; /* Port 1 GMAC */ |
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interrupt-parent = <&intcon>; |
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interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; |
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resets = <&syscon GEMINI_RESET_GMAC1>; |
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clocks = <&syscon GEMINI_CLK_GATE_GMAC1>; |
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clock-names = "PCLK"; |
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phy-mode = "rgmii"; |
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phy-handle = <&phy1>; |
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}; |
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};
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