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176 lines
4.7 KiB
176 lines
4.7 KiB
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
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# Copyright 2019 BayLibre, SAS |
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%YAML 1.2 |
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--- |
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$id: "http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml#" |
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$schema: "http://devicetree.org/meta-schemas/core.yaml#" |
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title: Amlogic Meson DWMAC Ethernet controller |
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maintainers: |
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- Neil Armstrong <[email protected]> |
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- Martin Blumenstingl <[email protected]> |
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# We need a select here so we don't match all nodes with 'snps,dwmac' |
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select: |
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properties: |
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compatible: |
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contains: |
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enum: |
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- amlogic,meson6-dwmac |
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- amlogic,meson8b-dwmac |
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- amlogic,meson8m2-dwmac |
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- amlogic,meson-gxbb-dwmac |
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- amlogic,meson-axg-dwmac |
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- amlogic,meson-g12a-dwmac |
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required: |
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- compatible |
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allOf: |
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- $ref: "snps,dwmac.yaml#" |
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- if: |
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properties: |
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compatible: |
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contains: |
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enum: |
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- amlogic,meson8b-dwmac |
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- amlogic,meson8m2-dwmac |
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- amlogic,meson-gxbb-dwmac |
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- amlogic,meson-axg-dwmac |
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- amlogic,meson-g12a-dwmac |
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then: |
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properties: |
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clocks: |
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minItems: 3 |
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items: |
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- description: GMAC main clock |
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- description: First parent clock of the internal mux |
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- description: Second parent clock of the internal mux |
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- description: The clock which drives the timing adjustment logic |
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clock-names: |
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minItems: 3 |
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items: |
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- const: stmmaceth |
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- const: clkin0 |
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- const: clkin1 |
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- const: timing-adjustment |
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amlogic,tx-delay-ns: |
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$ref: /schemas/types.yaml#/definitions/uint32 |
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description: |
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The internal RGMII TX clock delay (provided by this driver) in |
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nanoseconds. Allowed values are 0ns, 2ns, 4ns, 6ns. |
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When phy-mode is set to "rgmii" then the TX delay should be |
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explicitly configured. When not configured a fallback of 2ns is |
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used. When the phy-mode is set to either "rgmii-id" or "rgmii-txid" |
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the TX clock delay is already provided by the PHY. In that case |
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this property should be set to 0ns (which disables the TX clock |
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delay in the MAC to prevent the clock from going off because both |
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PHY and MAC are adding a delay). |
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Any configuration is ignored when the phy-mode is set to "rmii". |
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amlogic,rx-delay-ns: |
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deprecated: true |
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enum: |
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- 0 |
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- 2 |
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default: 0 |
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description: |
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The internal RGMII RX clock delay in nanoseconds. Deprecated, use |
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rx-internal-delay-ps instead. |
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rx-internal-delay-ps: |
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default: 0 |
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- if: |
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properties: |
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compatible: |
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contains: |
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enum: |
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- amlogic,meson8b-dwmac |
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- amlogic,meson8m2-dwmac |
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- amlogic,meson-gxbb-dwmac |
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- amlogic,meson-axg-dwmac |
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then: |
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properties: |
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rx-internal-delay-ps: |
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enum: |
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- 0 |
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- 2000 |
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- if: |
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properties: |
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compatible: |
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contains: |
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enum: |
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- amlogic,meson-g12a-dwmac |
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then: |
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properties: |
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rx-internal-delay-ps: |
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enum: |
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- 0 |
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- 200 |
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- 400 |
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- 600 |
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- 800 |
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- 1000 |
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- 1200 |
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- 1400 |
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- 1600 |
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- 1800 |
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- 2000 |
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- 2200 |
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- 2400 |
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- 2600 |
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- 2800 |
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- 3000 |
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properties: |
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compatible: |
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additionalItems: true |
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maxItems: 3 |
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items: |
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- enum: |
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- amlogic,meson6-dwmac |
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- amlogic,meson8b-dwmac |
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- amlogic,meson8m2-dwmac |
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- amlogic,meson-gxbb-dwmac |
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- amlogic,meson-axg-dwmac |
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- amlogic,meson-g12a-dwmac |
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contains: |
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enum: |
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- snps,dwmac-3.70a |
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- snps,dwmac |
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reg: |
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items: |
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- description: |
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The first register range should be the one of the DWMAC controller |
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- description: |
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The second range is is for the Amlogic specific configuration |
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(for example the PRG_ETHERNET register range on Meson8b and newer) |
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required: |
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- compatible |
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- reg |
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- interrupts |
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- interrupt-names |
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- clocks |
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- clock-names |
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- phy-mode |
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unevaluatedProperties: false |
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examples: |
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- | |
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ethmac: ethernet@c9410000 { |
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compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac"; |
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reg = <0xc9410000 0x10000>, <0xc8834540 0x8>; |
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interrupts = <8>; |
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interrupt-names = "macirq"; |
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clocks = <&clk_eth>, <&clk_fclk_div2>, <&clk_mpll2>, <&clk_fclk_div2>; |
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clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment"; |
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phy-mode = "rgmii"; |
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};
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