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181 lines
4.0 KiB
181 lines
4.0 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/iio/adc/ti,ads131e08.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs |
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maintainers: |
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- Tomislav Denis <[email protected]> |
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description: | |
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The ADS131E0x are a family of multichannel, simultaneous sampling, |
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24-bit, delta-sigma, analog-to-digital converters (ADCs) with a |
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built-in programmable gain amplifier (PGA), internal reference |
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and an onboard oscillator. |
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The communication with ADC chip is via the SPI bus (mode 1). |
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https://www.ti.com/lit/ds/symlink/ads131e08.pdf |
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properties: |
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compatible: |
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enum: |
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- ti,ads131e04 |
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- ti,ads131e06 |
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- ti,ads131e08 |
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reg: |
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maxItems: 1 |
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spi-max-frequency: true |
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spi-cpha: true |
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clocks: |
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description: | |
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Device tree identifier to the clock source (2.048 MHz). |
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Note: clock source is selected using CLKSEL pin. |
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maxItems: 1 |
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clock-names: |
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items: |
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- const: adc-clk |
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interrupts: |
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description: | |
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IRQ line for the ADC data ready. |
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maxItems: 1 |
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vref-supply: |
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description: | |
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Optional external voltage reference. If not supplied, internal voltage |
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reference is used. |
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ti,vref-internal: |
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description: | |
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Select the internal voltage reference value. |
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0: 2.4V |
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1: 4.0V |
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If this field is left empty, 2.4V is selected. |
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Note: internal voltage reference is used only if vref-supply is not supplied. |
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$ref: /schemas/types.yaml#/definitions/uint32 |
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enum: [0, 1] |
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default: 0 |
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'#address-cells': |
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const: 1 |
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'#size-cells': |
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const: 0 |
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required: |
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- compatible |
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- reg |
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- spi-cpha |
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- clocks |
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- clock-names |
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- interrupts |
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patternProperties: |
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"^channel@([0-7])$": |
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$ref: "adc.yaml" |
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type: object |
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description: | |
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Represents the external channels which are connected to the ADC. |
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properties: |
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reg: |
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description: | |
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The channel number. |
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Up to 4 channels, numbered from 0 to 3 for ti,ads131e04. |
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Up to 6 channels, numbered from 0 to 5 for ti,ads131e06. |
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Up to 8 channels, numbered from 0 to 7 for ti,ads131e08. |
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items: |
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minimum: 0 |
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maximum: 7 |
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ti,gain: |
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description: | |
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The PGA gain value for the channel. |
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If this field is left empty, PGA gain 1 is used. |
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$ref: /schemas/types.yaml#/definitions/uint32 |
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enum: [1, 2, 4, 8, 12] |
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default: 1 |
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ti,mux: |
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description: | |
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Channel input selection(muliplexer). |
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0: Normal input. |
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1: Input shorted to (VREFP + VREFN) / 2 (for offset or noise measurements). |
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3: MVDD (for supply measurement) |
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4: Temperature sensor |
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If this field is left empty, normal input is selected. |
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$ref: /schemas/types.yaml#/definitions/uint32 |
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enum: [0, 1, 3, 4] |
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default: 0 |
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required: |
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- reg |
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additionalProperties: false |
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additionalProperties: false |
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examples: |
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- | |
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#include <dt-bindings/interrupt-controller/irq.h> |
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spi { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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adc@0 { |
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compatible = "ti,ads131e08"; |
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reg = <0>; |
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spi-max-frequency = <1000000>; |
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spi-cpha; |
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clocks = <&clk2048k>; |
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clock-names = "adc-clk"; |
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interrupt-parent = <&gpio5>; |
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interrupts = <28 IRQ_TYPE_EDGE_FALLING>; |
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vref-supply = <&adc_vref>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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channel@0 { |
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reg = <0>; |
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}; |
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channel@1 { |
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reg = <1>; |
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}; |
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channel@2 { |
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reg = <2>; |
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ti,gain = <2>; |
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}; |
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channel@3 { |
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reg = <3>; |
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}; |
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channel@4 { |
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reg = <4>; |
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}; |
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channel@5 { |
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reg = <5>; |
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}; |
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channel@6 { |
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reg = <6>; |
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}; |
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channel@7 { |
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reg = <7>; |
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ti,mux = <4>; |
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}; |
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}; |
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};
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