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46 lines
1.8 KiB
46 lines
1.8 KiB
Aspeed SGPIO controller Device Tree Bindings |
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This SGPIO controller is for ASPEED AST2500 SoC, it supports up to 80 full |
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featured Serial GPIOs. Each of the Serial GPIO pins can be programmed to |
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support the following options: |
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- Support interrupt option for each input port and various interrupt |
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sensitivity option (level-high, level-low, edge-high, edge-low) |
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- Support reset tolerance option for each output port |
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- Directly connected to APB bus and its shift clock is from APB bus clock |
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divided by a programmable value. |
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- Co-work with external signal-chained TTL components (74LV165/74LV595) |
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Required properties: |
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- compatible : Should be one of |
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"aspeed,ast2400-sgpio", "aspeed,ast2500-sgpio" |
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- #gpio-cells : Should be 2, see gpio.txt |
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- reg : Address and length of the register set for the device |
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- gpio-controller : Marks the device node as a GPIO controller |
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- interrupts : Interrupt specifier, see interrupt-controller/interrupts.txt |
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- interrupt-controller : Mark the GPIO controller as an interrupt-controller |
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- ngpios : number of *hardware* GPIO lines, see gpio.txt. This will expose |
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2 software GPIOs per hardware GPIO: one for hardware input, one for hardware |
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output. Up to 80 pins, must be a multiple of 8. |
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- clocks : A phandle to the APB clock for SGPM clock division |
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- bus-frequency : SGPM CLK frequency |
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The sgpio and interrupt properties are further described in their respective |
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bindings documentation: |
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- Documentation/devicetree/bindings/gpio/gpio.txt |
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- Documentation/devicetree/bindings/interrupt-controller/interrupts.txt |
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Example: |
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sgpio: sgpio@1e780200 { |
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#gpio-cells = <2>; |
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compatible = "aspeed,ast2500-sgpio"; |
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gpio-controller; |
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interrupts = <40>; |
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reg = <0x1e780200 0x0100>; |
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clocks = <&syscon ASPEED_CLK_APB>; |
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interrupt-controller; |
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ngpios = <8>; |
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bus-frequency = <12000000>; |
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};
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