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310 lines
7.7 KiB
310 lines
7.7 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* This file implements an irqchip for OPAL events. Whenever there is |
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* an interrupt that is handled by OPAL we get passed a list of events |
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* that Linux needs to do something about. These basically look like |
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* interrupts to Linux so we implement an irqchip to handle them. |
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* |
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* Copyright Alistair Popple, IBM Corporation 2014. |
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*/ |
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#include <linux/bitops.h> |
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#include <linux/irq.h> |
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#include <linux/irqchip.h> |
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#include <linux/irqdomain.h> |
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#include <linux/interrupt.h> |
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#include <linux/module.h> |
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#include <linux/of.h> |
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#include <linux/platform_device.h> |
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#include <linux/kthread.h> |
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#include <linux/delay.h> |
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#include <linux/slab.h> |
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#include <linux/of_irq.h> |
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#include <asm/machdep.h> |
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#include <asm/opal.h> |
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#include "powernv.h" |
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/* Maximum number of events supported by OPAL firmware */ |
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#define MAX_NUM_EVENTS 64 |
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struct opal_event_irqchip { |
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struct irq_chip irqchip; |
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struct irq_domain *domain; |
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unsigned long mask; |
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}; |
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static struct opal_event_irqchip opal_event_irqchip; |
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static u64 last_outstanding_events; |
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static int opal_irq_count; |
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static struct resource *opal_irqs; |
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void opal_handle_events(void) |
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{ |
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__be64 events = 0; |
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u64 e; |
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e = READ_ONCE(last_outstanding_events) & opal_event_irqchip.mask; |
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again: |
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while (e) { |
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int hwirq; |
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hwirq = fls64(e) - 1; |
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e &= ~BIT_ULL(hwirq); |
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local_irq_disable(); |
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irq_enter(); |
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generic_handle_domain_irq(opal_event_irqchip.domain, hwirq); |
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irq_exit(); |
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local_irq_enable(); |
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cond_resched(); |
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} |
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last_outstanding_events = 0; |
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if (opal_poll_events(&events) != OPAL_SUCCESS) |
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return; |
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e = be64_to_cpu(events) & opal_event_irqchip.mask; |
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if (e) |
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goto again; |
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} |
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bool opal_have_pending_events(void) |
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{ |
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if (last_outstanding_events & opal_event_irqchip.mask) |
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return true; |
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return false; |
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} |
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static void opal_event_mask(struct irq_data *d) |
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{ |
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clear_bit(d->hwirq, &opal_event_irqchip.mask); |
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} |
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static void opal_event_unmask(struct irq_data *d) |
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{ |
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set_bit(d->hwirq, &opal_event_irqchip.mask); |
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if (opal_have_pending_events()) |
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opal_wake_poller(); |
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} |
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static int opal_event_set_type(struct irq_data *d, unsigned int flow_type) |
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{ |
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/* |
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* For now we only support level triggered events. The irq |
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* handler will be called continuously until the event has |
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* been cleared in OPAL. |
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*/ |
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if (flow_type != IRQ_TYPE_LEVEL_HIGH) |
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return -EINVAL; |
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return 0; |
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} |
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static struct opal_event_irqchip opal_event_irqchip = { |
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.irqchip = { |
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.name = "OPAL EVT", |
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.irq_mask = opal_event_mask, |
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.irq_unmask = opal_event_unmask, |
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.irq_set_type = opal_event_set_type, |
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}, |
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.mask = 0, |
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}; |
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static int opal_event_map(struct irq_domain *d, unsigned int irq, |
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irq_hw_number_t hwirq) |
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{ |
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irq_set_chip_data(irq, &opal_event_irqchip); |
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irq_set_chip_and_handler(irq, &opal_event_irqchip.irqchip, |
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handle_level_irq); |
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return 0; |
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} |
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static irqreturn_t opal_interrupt(int irq, void *data) |
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{ |
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__be64 events; |
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opal_handle_interrupt(virq_to_hw(irq), &events); |
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last_outstanding_events = be64_to_cpu(events); |
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if (opal_have_pending_events()) |
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opal_wake_poller(); |
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return IRQ_HANDLED; |
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} |
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static int opal_event_match(struct irq_domain *h, struct device_node *node, |
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enum irq_domain_bus_token bus_token) |
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{ |
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return irq_domain_get_of_node(h) == node; |
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} |
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static int opal_event_xlate(struct irq_domain *h, struct device_node *np, |
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const u32 *intspec, unsigned int intsize, |
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irq_hw_number_t *out_hwirq, unsigned int *out_flags) |
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{ |
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*out_hwirq = intspec[0]; |
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*out_flags = IRQ_TYPE_LEVEL_HIGH; |
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return 0; |
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} |
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static const struct irq_domain_ops opal_event_domain_ops = { |
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.match = opal_event_match, |
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.map = opal_event_map, |
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.xlate = opal_event_xlate, |
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}; |
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void opal_event_shutdown(void) |
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{ |
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unsigned int i; |
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/* First free interrupts, which will also mask them */ |
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for (i = 0; i < opal_irq_count; i++) { |
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if (!opal_irqs || !opal_irqs[i].start) |
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continue; |
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if (in_interrupt() || irqs_disabled()) |
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disable_irq_nosync(opal_irqs[i].start); |
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else |
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free_irq(opal_irqs[i].start, NULL); |
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opal_irqs[i].start = 0; |
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} |
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} |
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int __init opal_event_init(void) |
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{ |
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struct device_node *dn, *opal_node; |
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bool old_style = false; |
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int i, rc = 0; |
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opal_node = of_find_node_by_path("/ibm,opal"); |
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if (!opal_node) { |
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pr_warn("opal: Node not found\n"); |
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return -ENODEV; |
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} |
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/* If dn is NULL it means the domain won't be linked to a DT |
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* node so therefore irq_of_parse_and_map(...) wont work. But |
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* that shouldn't be problem because if we're running a |
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* version of skiboot that doesn't have the dn then the |
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* devices won't have the correct properties and will have to |
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* fall back to the legacy method (opal_event_request(...)) |
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* anyway. */ |
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dn = of_find_compatible_node(NULL, NULL, "ibm,opal-event"); |
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opal_event_irqchip.domain = irq_domain_add_linear(dn, MAX_NUM_EVENTS, |
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&opal_event_domain_ops, &opal_event_irqchip); |
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of_node_put(dn); |
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if (!opal_event_irqchip.domain) { |
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pr_warn("opal: Unable to create irq domain\n"); |
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rc = -ENOMEM; |
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goto out; |
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} |
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/* Look for new-style (standard) "interrupts" property */ |
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opal_irq_count = of_irq_count(opal_node); |
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/* Absent ? Look for the old one */ |
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if (opal_irq_count < 1) { |
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/* Get opal-interrupts property and names if present */ |
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rc = of_property_count_u32_elems(opal_node, "opal-interrupts"); |
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if (rc > 0) |
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opal_irq_count = rc; |
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old_style = true; |
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} |
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/* No interrupts ? Bail out */ |
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if (!opal_irq_count) |
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goto out; |
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pr_debug("OPAL: Found %d interrupts reserved for OPAL using %s scheme\n", |
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opal_irq_count, old_style ? "old" : "new"); |
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/* Allocate an IRQ resources array */ |
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opal_irqs = kcalloc(opal_irq_count, sizeof(struct resource), GFP_KERNEL); |
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if (WARN_ON(!opal_irqs)) { |
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rc = -ENOMEM; |
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goto out; |
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} |
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/* Build the resources array */ |
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if (old_style) { |
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/* Old style "opal-interrupts" property */ |
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for (i = 0; i < opal_irq_count; i++) { |
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struct resource *r = &opal_irqs[i]; |
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const char *name = NULL; |
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u32 hw_irq; |
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int virq; |
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rc = of_property_read_u32_index(opal_node, "opal-interrupts", |
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i, &hw_irq); |
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if (WARN_ON(rc < 0)) { |
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opal_irq_count = i; |
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break; |
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} |
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of_property_read_string_index(opal_node, "opal-interrupts-names", |
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i, &name); |
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virq = irq_create_mapping(NULL, hw_irq); |
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if (!virq) { |
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pr_warn("Failed to map OPAL irq 0x%x\n", hw_irq); |
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continue; |
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} |
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r->start = r->end = virq; |
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r->flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW; |
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r->name = name; |
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} |
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} else { |
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/* new style standard "interrupts" property */ |
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rc = of_irq_to_resource_table(opal_node, opal_irqs, opal_irq_count); |
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if (WARN_ON(rc < 0)) { |
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opal_irq_count = 0; |
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kfree(opal_irqs); |
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goto out; |
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} |
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if (WARN_ON(rc < opal_irq_count)) |
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opal_irq_count = rc; |
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} |
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/* Install interrupt handlers */ |
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for (i = 0; i < opal_irq_count; i++) { |
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struct resource *r = &opal_irqs[i]; |
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const char *name; |
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/* Prefix name */ |
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if (r->name && strlen(r->name)) |
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name = kasprintf(GFP_KERNEL, "opal-%s", r->name); |
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else |
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name = kasprintf(GFP_KERNEL, "opal"); |
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/* Install interrupt handler */ |
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rc = request_irq(r->start, opal_interrupt, r->flags & IRQD_TRIGGER_MASK, |
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name, NULL); |
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if (rc) { |
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pr_warn("Error %d requesting OPAL irq %d\n", rc, (int)r->start); |
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continue; |
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} |
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} |
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rc = 0; |
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out: |
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of_node_put(opal_node); |
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return rc; |
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} |
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machine_arch_initcall(powernv, opal_event_init); |
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/** |
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* opal_event_request(unsigned int opal_event_nr) - Request an event |
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* @opal_event_nr: the opal event number to request |
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* |
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* This routine can be used to find the linux virq number which can |
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* then be passed to request_irq to assign a handler for a particular |
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* opal event. This should only be used by legacy devices which don't |
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* have proper device tree bindings. Most devices should use |
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* irq_of_parse_and_map() instead. |
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*/ |
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int opal_event_request(unsigned int opal_event_nr) |
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{ |
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if (WARN_ON_ONCE(!opal_event_irqchip.domain)) |
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return 0; |
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return irq_create_mapping(opal_event_irqchip.domain, opal_event_nr); |
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} |
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EXPORT_SYMBOL(opal_event_request);
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