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129 lines
3.5 KiB
129 lines
3.5 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/***************************************************************************/ |
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/* |
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* m5272.c -- platform support for ColdFire 5272 based boards |
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* |
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* Copyright (C) 1999-2002, Greg Ungerer ([email protected]) |
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* Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com) |
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*/ |
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/***************************************************************************/ |
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#include <linux/clkdev.h> |
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#include <linux/kernel.h> |
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#include <linux/param.h> |
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#include <linux/init.h> |
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#include <linux/io.h> |
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#include <linux/phy.h> |
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#include <linux/phy_fixed.h> |
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#include <asm/machdep.h> |
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#include <asm/coldfire.h> |
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#include <asm/mcfsim.h> |
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#include <asm/mcfuart.h> |
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#include <asm/mcfclk.h> |
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/***************************************************************************/ |
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/* |
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* Some platforms need software versions of the GPIO data registers. |
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*/ |
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unsigned short ppdata; |
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unsigned char ledbank = 0xff; |
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/***************************************************************************/ |
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DEFINE_CLK(pll, "pll.0", MCF_CLK); |
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DEFINE_CLK(sys, "sys.0", MCF_BUSCLK); |
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static struct clk_lookup m5272_clk_lookup[] = { |
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CLKDEV_INIT(NULL, "pll.0", &clk_pll), |
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CLKDEV_INIT(NULL, "sys.0", &clk_sys), |
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CLKDEV_INIT("mcftmr.0", NULL, &clk_sys), |
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CLKDEV_INIT("mcftmr.1", NULL, &clk_sys), |
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CLKDEV_INIT("mcftmr.2", NULL, &clk_sys), |
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CLKDEV_INIT("mcftmr.3", NULL, &clk_sys), |
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CLKDEV_INIT("mcfuart.0", NULL, &clk_sys), |
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CLKDEV_INIT("mcfuart.1", NULL, &clk_sys), |
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CLKDEV_INIT("mcfqspi.0", NULL, &clk_sys), |
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CLKDEV_INIT("fec.0", NULL, &clk_sys), |
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}; |
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/***************************************************************************/ |
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static void __init m5272_uarts_init(void) |
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{ |
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u32 v; |
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/* Enable the output lines for the serial ports */ |
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v = readl(MCFSIM_PBCNT); |
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v = (v & ~0x000000ff) | 0x00000055; |
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writel(v, MCFSIM_PBCNT); |
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v = readl(MCFSIM_PDCNT); |
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v = (v & ~0x000003fc) | 0x000002a8; |
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writel(v, MCFSIM_PDCNT); |
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} |
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/***************************************************************************/ |
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static void m5272_cpu_reset(void) |
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{ |
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local_irq_disable(); |
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/* Set watchdog to reset, and enabled */ |
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__raw_writew(0, MCFSIM_WIRR); |
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__raw_writew(1, MCFSIM_WRRR); |
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__raw_writew(0, MCFSIM_WCR); |
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for (;;) |
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/* wait for watchdog to timeout */; |
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} |
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/***************************************************************************/ |
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void __init config_BSP(char *commandp, int size) |
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{ |
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#if defined (CONFIG_MOD5272) |
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/* Set base of device vectors to be 64 */ |
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writeb(0x40, MCFSIM_PIVR); |
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#endif |
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#if defined(CONFIG_NETtel) || defined(CONFIG_SCALES) |
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/* Copy command line from FLASH to local buffer... */ |
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memcpy(commandp, (char *) 0xf0004000, size); |
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commandp[size-1] = 0; |
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#elif defined(CONFIG_CANCam) |
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/* Copy command line from FLASH to local buffer... */ |
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memcpy(commandp, (char *) 0xf0010000, size); |
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commandp[size-1] = 0; |
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#endif |
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mach_reset = m5272_cpu_reset; |
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mach_sched_init = hw_timer_init; |
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} |
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/***************************************************************************/ |
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/* |
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* Some 5272 based boards have the FEC ethernet directly connected to |
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* an ethernet switch. In this case we need to use the fixed phy type, |
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* and we need to declare it early in boot. |
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*/ |
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static struct fixed_phy_status nettel_fixed_phy_status __initdata = { |
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.link = 1, |
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.speed = 100, |
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.duplex = 0, |
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}; |
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/***************************************************************************/ |
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static int __init init_BSP(void) |
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{ |
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m5272_uarts_init(); |
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fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status); |
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clkdev_add_table(m5272_clk_lookup, ARRAY_SIZE(m5272_clk_lookup)); |
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return 0; |
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} |
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arch_initcall(init_BSP); |
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/***************************************************************************/
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