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50 lines
1.3 KiB
50 lines
1.3 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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#ifndef __ASM_CSKY_PGTABLE_BITS_H |
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#define __ASM_CSKY_PGTABLE_BITS_H |
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/* implemented in software */ |
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#define _PAGE_PRESENT (1<<0) |
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#define _PAGE_READ (1<<1) |
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#define _PAGE_WRITE (1<<2) |
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#define _PAGE_ACCESSED (1<<3) |
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#define _PAGE_MODIFIED (1<<4) |
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/* implemented in hardware */ |
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#define _PAGE_GLOBAL (1<<6) |
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#define _PAGE_VALID (1<<7) |
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#define _PAGE_DIRTY (1<<8) |
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#define _PAGE_CACHE (3<<9) |
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#define _PAGE_UNCACHE (2<<9) |
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#define _PAGE_SO _PAGE_UNCACHE |
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#define _CACHE_MASK (7<<9) |
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#define _CACHE_CACHED _PAGE_CACHE |
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#define _CACHE_UNCACHED _PAGE_UNCACHE |
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#define _PAGE_PROT_NONE _PAGE_READ |
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/* |
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* Encode and decode a swap entry |
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* |
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* Format of swap PTE: |
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* bit 0: _PAGE_PRESENT (zero) |
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* bit 1: _PAGE_READ (zero) |
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* bit 2 - 5: swap type[0 - 3] |
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* bit 6: _PAGE_GLOBAL (zero) |
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* bit 7: _PAGE_VALID (zero) |
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* bit 8: swap type[4] |
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* bit 9 - 31: swap offset |
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*/ |
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#define __swp_type(x) ((((x).val >> 2) & 0xf) | \ |
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(((x).val >> 4) & 0x10)) |
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#define __swp_offset(x) ((x).val >> 9) |
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#define __swp_entry(type, offset) ((swp_entry_t) { \ |
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((type & 0xf) << 2) | \ |
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((type & 0x10) << 4) | \ |
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((offset) << 9)}) |
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#define HAVE_ARCH_UNMAPPED_AREA |
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#endif /* __ASM_CSKY_PGTABLE_BITS_H */
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