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708 lines
18 KiB
708 lines
18 KiB
// SPDX-License-Identifier: GPL-2.0 |
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// |
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// ak4642.c -- AK4642/AK4643 ALSA Soc Audio driver |
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// |
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// Copyright (C) 2009 Renesas Solutions Corp. |
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// Kuninori Morimoto <[email protected]> |
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// |
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// Based on wm8731.c by Richard Purdie |
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// Based on ak4535.c by Richard Purdie |
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// Based on wm8753.c by Liam Girdwood |
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/* ** CAUTION ** |
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* |
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* This is very simple driver. |
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* It can use headphone output / stereo input only |
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* |
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* AK4642 is tested. |
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* AK4643 is tested. |
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* AK4648 is tested. |
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*/ |
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#include <linux/clk.h> |
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#include <linux/clk-provider.h> |
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#include <linux/delay.h> |
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#include <linux/i2c.h> |
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#include <linux/slab.h> |
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#include <linux/of_device.h> |
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#include <linux/module.h> |
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#include <linux/regmap.h> |
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#include <sound/soc.h> |
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#include <sound/initval.h> |
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#include <sound/tlv.h> |
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#define PW_MGMT1 0x00 |
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#define PW_MGMT2 0x01 |
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#define SG_SL1 0x02 |
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#define SG_SL2 0x03 |
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#define MD_CTL1 0x04 |
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#define MD_CTL2 0x05 |
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#define TIMER 0x06 |
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#define ALC_CTL1 0x07 |
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#define ALC_CTL2 0x08 |
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#define L_IVC 0x09 |
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#define L_DVC 0x0a |
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#define ALC_CTL3 0x0b |
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#define R_IVC 0x0c |
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#define R_DVC 0x0d |
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#define MD_CTL3 0x0e |
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#define MD_CTL4 0x0f |
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#define PW_MGMT3 0x10 |
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#define DF_S 0x11 |
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#define FIL3_0 0x12 |
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#define FIL3_1 0x13 |
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#define FIL3_2 0x14 |
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#define FIL3_3 0x15 |
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#define EQ_0 0x16 |
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#define EQ_1 0x17 |
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#define EQ_2 0x18 |
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#define EQ_3 0x19 |
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#define EQ_4 0x1a |
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#define EQ_5 0x1b |
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#define FIL1_0 0x1c |
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#define FIL1_1 0x1d |
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#define FIL1_2 0x1e |
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#define FIL1_3 0x1f /* The maximum valid register for ak4642 */ |
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#define PW_MGMT4 0x20 |
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#define MD_CTL5 0x21 |
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#define LO_MS 0x22 |
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#define HP_MS 0x23 |
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#define SPK_MS 0x24 /* The maximum valid register for ak4643 */ |
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#define EQ_FBEQAB 0x25 |
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#define EQ_FBEQCD 0x26 |
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#define EQ_FBEQE 0x27 /* The maximum valid register for ak4648 */ |
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/* PW_MGMT1*/ |
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#define PMVCM (1 << 6) /* VCOM Power Management */ |
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#define PMMIN (1 << 5) /* MIN Input Power Management */ |
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#define PMDAC (1 << 2) /* DAC Power Management */ |
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#define PMADL (1 << 0) /* MIC Amp Lch and ADC Lch Power Management */ |
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/* PW_MGMT2 */ |
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#define HPMTN (1 << 6) |
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#define PMHPL (1 << 5) |
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#define PMHPR (1 << 4) |
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#define MS (1 << 3) /* master/slave select */ |
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#define MCKO (1 << 1) |
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#define PMPLL (1 << 0) |
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#define PMHP_MASK (PMHPL | PMHPR) |
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#define PMHP PMHP_MASK |
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/* PW_MGMT3 */ |
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#define PMADR (1 << 0) /* MIC L / ADC R Power Management */ |
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/* SG_SL1 */ |
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#define MINS (1 << 6) /* Switch from MIN to Speaker */ |
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#define DACL (1 << 4) /* Switch from DAC to Stereo or Receiver */ |
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#define PMMP (1 << 2) /* MPWR pin Power Management */ |
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#define MGAIN0 (1 << 0) /* MIC amp gain*/ |
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/* SG_SL2 */ |
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#define LOPS (1 << 6) /* Stero Line-out Power Save Mode */ |
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/* TIMER */ |
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#define ZTM(param) ((param & 0x3) << 4) /* ALC Zero Crossing TimeOut */ |
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#define WTM(param) (((param & 0x4) << 4) | ((param & 0x3) << 2)) |
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/* ALC_CTL1 */ |
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#define ALC (1 << 5) /* ALC Enable */ |
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#define LMTH0 (1 << 0) /* ALC Limiter / Recovery Level */ |
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/* MD_CTL1 */ |
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#define PLL3 (1 << 7) |
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#define PLL2 (1 << 6) |
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#define PLL1 (1 << 5) |
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#define PLL0 (1 << 4) |
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#define PLL_MASK (PLL3 | PLL2 | PLL1 | PLL0) |
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#define BCKO_MASK (1 << 3) |
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#define BCKO_64 BCKO_MASK |
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#define DIF_MASK (3 << 0) |
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#define DSP (0 << 0) |
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#define RIGHT_J (1 << 0) |
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#define LEFT_J (2 << 0) |
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#define I2S (3 << 0) |
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/* MD_CTL2 */ |
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#define FSs(val) (((val & 0x7) << 0) | ((val & 0x8) << 2)) |
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#define PSs(val) ((val & 0x3) << 6) |
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/* MD_CTL3 */ |
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#define BST1 (1 << 3) |
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/* MD_CTL4 */ |
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#define DACH (1 << 0) |
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struct ak4642_drvdata { |
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const struct regmap_config *regmap_config; |
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int extended_frequencies; |
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}; |
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struct ak4642_priv { |
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const struct ak4642_drvdata *drvdata; |
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struct clk *mcko; |
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}; |
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/* |
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* Playback Volume (table 39) |
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* |
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* max : 0x00 : +12.0 dB |
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* ( 0.5 dB step ) |
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* min : 0xFE : -115.0 dB |
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* mute: 0xFF |
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*/ |
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static const DECLARE_TLV_DB_SCALE(out_tlv, -11550, 50, 1); |
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static const struct snd_kcontrol_new ak4642_snd_controls[] = { |
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SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC, |
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0, 0xFF, 1, out_tlv), |
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SOC_SINGLE("ALC Capture Switch", ALC_CTL1, 5, 1, 0), |
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SOC_SINGLE("ALC Capture ZC Switch", ALC_CTL1, 4, 1, 1), |
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}; |
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static const struct snd_kcontrol_new ak4642_headphone_control = |
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SOC_DAPM_SINGLE("Switch", PW_MGMT2, 6, 1, 0); |
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static const struct snd_kcontrol_new ak4642_lout_mixer_controls[] = { |
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SOC_DAPM_SINGLE("DACL", SG_SL1, 4, 1, 0), |
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}; |
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/* event handlers */ |
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static int ak4642_lout_event(struct snd_soc_dapm_widget *w, |
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struct snd_kcontrol *kcontrol, int event) |
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{ |
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); |
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switch (event) { |
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case SND_SOC_DAPM_PRE_PMD: |
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case SND_SOC_DAPM_PRE_PMU: |
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/* Power save mode ON */ |
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snd_soc_component_update_bits(component, SG_SL2, LOPS, LOPS); |
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break; |
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case SND_SOC_DAPM_POST_PMU: |
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case SND_SOC_DAPM_POST_PMD: |
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/* Power save mode OFF */ |
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msleep(300); |
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snd_soc_component_update_bits(component, SG_SL2, LOPS, 0); |
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break; |
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} |
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return 0; |
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} |
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static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = { |
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/* Outputs */ |
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SND_SOC_DAPM_OUTPUT("HPOUTL"), |
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SND_SOC_DAPM_OUTPUT("HPOUTR"), |
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SND_SOC_DAPM_OUTPUT("LINEOUT"), |
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SND_SOC_DAPM_PGA("HPL Out", PW_MGMT2, 5, 0, NULL, 0), |
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SND_SOC_DAPM_PGA("HPR Out", PW_MGMT2, 4, 0, NULL, 0), |
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SND_SOC_DAPM_SWITCH("Headphone Enable", SND_SOC_NOPM, 0, 0, |
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&ak4642_headphone_control), |
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SND_SOC_DAPM_PGA("DACH", MD_CTL4, 0, 0, NULL, 0), |
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SND_SOC_DAPM_MIXER_E("LINEOUT Mixer", PW_MGMT1, 3, 0, |
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&ak4642_lout_mixer_controls[0], |
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ARRAY_SIZE(ak4642_lout_mixer_controls), |
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ak4642_lout_event, |
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | |
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SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD), |
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/* DAC */ |
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SND_SOC_DAPM_DAC("DAC", NULL, PW_MGMT1, 2, 0), |
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}; |
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static const struct snd_soc_dapm_route ak4642_intercon[] = { |
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/* Outputs */ |
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{"HPOUTL", NULL, "HPL Out"}, |
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{"HPOUTR", NULL, "HPR Out"}, |
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{"LINEOUT", NULL, "LINEOUT Mixer"}, |
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{"HPL Out", NULL, "Headphone Enable"}, |
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{"HPR Out", NULL, "Headphone Enable"}, |
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{"Headphone Enable", "Switch", "DACH"}, |
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{"DACH", NULL, "DAC"}, |
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{"LINEOUT Mixer", "DACL", "DAC"}, |
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{ "DAC", NULL, "Playback" }, |
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}; |
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/* |
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* ak4642 register cache |
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*/ |
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static const struct reg_default ak4643_reg[] = { |
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{ 0, 0x00 }, { 1, 0x00 }, { 2, 0x01 }, { 3, 0x00 }, |
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{ 4, 0x02 }, { 5, 0x00 }, { 6, 0x00 }, { 7, 0x00 }, |
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{ 8, 0xe1 }, { 9, 0xe1 }, { 10, 0x18 }, { 11, 0x00 }, |
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{ 12, 0xe1 }, { 13, 0x18 }, { 14, 0x11 }, { 15, 0x08 }, |
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{ 16, 0x00 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x00 }, |
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{ 20, 0x00 }, { 21, 0x00 }, { 22, 0x00 }, { 23, 0x00 }, |
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{ 24, 0x00 }, { 25, 0x00 }, { 26, 0x00 }, { 27, 0x00 }, |
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{ 28, 0x00 }, { 29, 0x00 }, { 30, 0x00 }, { 31, 0x00 }, |
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{ 32, 0x00 }, { 33, 0x00 }, { 34, 0x00 }, { 35, 0x00 }, |
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{ 36, 0x00 }, |
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}; |
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/* The default settings for 0x0 ~ 0x1f registers are the same for ak4642 |
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and ak4643. So we reuse the ak4643 reg_default for ak4642. |
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The valid registers for ak4642 are 0x0 ~ 0x1f which is a subset of ak4643, |
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so define NUM_AK4642_REG_DEFAULTS for ak4642. |
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*/ |
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#define ak4642_reg ak4643_reg |
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#define NUM_AK4642_REG_DEFAULTS (FIL1_3 + 1) |
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static const struct reg_default ak4648_reg[] = { |
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{ 0, 0x00 }, { 1, 0x00 }, { 2, 0x01 }, { 3, 0x00 }, |
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{ 4, 0x02 }, { 5, 0x00 }, { 6, 0x00 }, { 7, 0x00 }, |
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{ 8, 0xe1 }, { 9, 0xe1 }, { 10, 0x18 }, { 11, 0x00 }, |
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{ 12, 0xe1 }, { 13, 0x18 }, { 14, 0x11 }, { 15, 0xb8 }, |
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{ 16, 0x00 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x00 }, |
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{ 20, 0x00 }, { 21, 0x00 }, { 22, 0x00 }, { 23, 0x00 }, |
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{ 24, 0x00 }, { 25, 0x00 }, { 26, 0x00 }, { 27, 0x00 }, |
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{ 28, 0x00 }, { 29, 0x00 }, { 30, 0x00 }, { 31, 0x00 }, |
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{ 32, 0x00 }, { 33, 0x00 }, { 34, 0x00 }, { 35, 0x00 }, |
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{ 36, 0x00 }, { 37, 0x88 }, { 38, 0x88 }, { 39, 0x08 }, |
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}; |
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static int ak4642_dai_startup(struct snd_pcm_substream *substream, |
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struct snd_soc_dai *dai) |
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{ |
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int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; |
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struct snd_soc_component *component = dai->component; |
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if (is_play) { |
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/* |
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* start headphone output |
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* |
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* PLL, Master Mode |
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* Audio I/F Format :MSB justified (ADC & DAC) |
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* Bass Boost Level : Middle |
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* |
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* This operation came from example code of |
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* "ASAHI KASEI AK4642" (japanese) manual p97. |
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*/ |
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snd_soc_component_write(component, L_IVC, 0x91); /* volume */ |
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snd_soc_component_write(component, R_IVC, 0x91); /* volume */ |
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} else { |
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/* |
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* start stereo input |
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* |
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* PLL Master Mode |
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* Audio I/F Format:MSB justified (ADC & DAC) |
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* Pre MIC AMP:+20dB |
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* MIC Power On |
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* ALC setting:Refer to Table 35 |
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* ALC bit=“1” |
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* |
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* This operation came from example code of |
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* "ASAHI KASEI AK4642" (japanese) manual p94. |
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*/ |
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snd_soc_component_update_bits(component, SG_SL1, PMMP | MGAIN0, PMMP | MGAIN0); |
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snd_soc_component_write(component, TIMER, ZTM(0x3) | WTM(0x3)); |
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snd_soc_component_write(component, ALC_CTL1, ALC | LMTH0); |
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snd_soc_component_update_bits(component, PW_MGMT1, PMADL, PMADL); |
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snd_soc_component_update_bits(component, PW_MGMT3, PMADR, PMADR); |
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} |
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return 0; |
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} |
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static void ak4642_dai_shutdown(struct snd_pcm_substream *substream, |
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struct snd_soc_dai *dai) |
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{ |
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int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; |
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struct snd_soc_component *component = dai->component; |
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if (is_play) { |
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} else { |
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/* stop stereo input */ |
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snd_soc_component_update_bits(component, PW_MGMT1, PMADL, 0); |
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snd_soc_component_update_bits(component, PW_MGMT3, PMADR, 0); |
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snd_soc_component_update_bits(component, ALC_CTL1, ALC, 0); |
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} |
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} |
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static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai, |
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int clk_id, unsigned int freq, int dir) |
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{ |
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struct snd_soc_component *component = codec_dai->component; |
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struct ak4642_priv *priv = snd_soc_component_get_drvdata(component); |
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u8 pll; |
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int extended_freq = 0; |
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switch (freq) { |
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case 11289600: |
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pll = PLL2; |
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break; |
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case 12288000: |
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pll = PLL2 | PLL0; |
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break; |
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case 12000000: |
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pll = PLL2 | PLL1; |
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break; |
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case 24000000: |
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pll = PLL2 | PLL1 | PLL0; |
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break; |
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case 13500000: |
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pll = PLL3 | PLL2; |
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break; |
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case 27000000: |
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pll = PLL3 | PLL2 | PLL0; |
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break; |
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case 19200000: |
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pll = PLL3; |
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extended_freq = 1; |
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break; |
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case 13000000: |
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pll = PLL3 | PLL2 | PLL1; |
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extended_freq = 1; |
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break; |
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case 26000000: |
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pll = PLL3 | PLL2 | PLL1 | PLL0; |
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extended_freq = 1; |
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break; |
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default: |
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return -EINVAL; |
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} |
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if (extended_freq && !priv->drvdata->extended_frequencies) |
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return -EINVAL; |
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snd_soc_component_update_bits(component, MD_CTL1, PLL_MASK, pll); |
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return 0; |
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} |
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static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) |
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{ |
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struct snd_soc_component *component = dai->component; |
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u8 data; |
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u8 bcko; |
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data = MCKO | PMPLL; /* use MCKO */ |
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bcko = 0; |
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/* set clocking for audio interface */ |
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switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { |
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case SND_SOC_DAIFMT_CBP_CFP: |
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data |= MS; |
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bcko = BCKO_64; |
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break; |
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case SND_SOC_DAIFMT_CBC_CFC: |
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break; |
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default: |
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return -EINVAL; |
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} |
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snd_soc_component_update_bits(component, PW_MGMT2, MS | MCKO | PMPLL, data); |
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snd_soc_component_update_bits(component, MD_CTL1, BCKO_MASK, bcko); |
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/* format type */ |
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data = 0; |
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
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case SND_SOC_DAIFMT_LEFT_J: |
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data = LEFT_J; |
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break; |
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case SND_SOC_DAIFMT_I2S: |
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data = I2S; |
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break; |
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/* FIXME |
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* Please add RIGHT_J / DSP support here |
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*/ |
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default: |
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return -EINVAL; |
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} |
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snd_soc_component_update_bits(component, MD_CTL1, DIF_MASK, data); |
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return 0; |
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} |
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static int ak4642_set_mcko(struct snd_soc_component *component, |
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u32 frequency) |
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{ |
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static const u32 fs_list[] = { |
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[0] = 8000, |
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[1] = 12000, |
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[2] = 16000, |
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[3] = 24000, |
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[4] = 7350, |
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[5] = 11025, |
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[6] = 14700, |
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[7] = 22050, |
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[10] = 32000, |
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[11] = 48000, |
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[14] = 29400, |
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[15] = 44100, |
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}; |
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static const u32 ps_list[] = { |
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[0] = 256, |
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[1] = 128, |
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[2] = 64, |
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[3] = 32 |
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}; |
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int ps, fs; |
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for (ps = 0; ps < ARRAY_SIZE(ps_list); ps++) { |
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for (fs = 0; fs < ARRAY_SIZE(fs_list); fs++) { |
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if (frequency == ps_list[ps] * fs_list[fs]) { |
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snd_soc_component_write(component, MD_CTL2, |
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PSs(ps) | FSs(fs)); |
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return 0; |
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} |
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} |
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} |
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return 0; |
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} |
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static int ak4642_dai_hw_params(struct snd_pcm_substream *substream, |
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struct snd_pcm_hw_params *params, |
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struct snd_soc_dai *dai) |
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{ |
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struct snd_soc_component *component = dai->component; |
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struct ak4642_priv *priv = snd_soc_component_get_drvdata(component); |
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u32 rate = clk_get_rate(priv->mcko); |
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if (!rate) |
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rate = params_rate(params) * 256; |
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return ak4642_set_mcko(component, rate); |
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} |
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static int ak4642_set_bias_level(struct snd_soc_component *component, |
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enum snd_soc_bias_level level) |
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{ |
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switch (level) { |
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case SND_SOC_BIAS_OFF: |
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snd_soc_component_write(component, PW_MGMT1, 0x00); |
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break; |
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default: |
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snd_soc_component_update_bits(component, PW_MGMT1, PMVCM, PMVCM); |
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break; |
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} |
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return 0; |
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} |
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static const struct snd_soc_dai_ops ak4642_dai_ops = { |
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.startup = ak4642_dai_startup, |
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.shutdown = ak4642_dai_shutdown, |
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.set_sysclk = ak4642_dai_set_sysclk, |
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.set_fmt = ak4642_dai_set_fmt, |
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.hw_params = ak4642_dai_hw_params, |
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}; |
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static struct snd_soc_dai_driver ak4642_dai = { |
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.name = "ak4642-hifi", |
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.playback = { |
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.stream_name = "Playback", |
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.channels_min = 2, |
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.channels_max = 2, |
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.rates = SNDRV_PCM_RATE_8000_48000, |
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.formats = SNDRV_PCM_FMTBIT_S16_LE }, |
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.capture = { |
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.stream_name = "Capture", |
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.channels_min = 2, |
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.channels_max = 2, |
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.rates = SNDRV_PCM_RATE_8000_48000, |
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.formats = SNDRV_PCM_FMTBIT_S16_LE }, |
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.ops = &ak4642_dai_ops, |
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.symmetric_rate = 1, |
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}; |
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static int ak4642_suspend(struct snd_soc_component *component) |
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{ |
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struct regmap *regmap = dev_get_regmap(component->dev, NULL); |
|
|
|
regcache_cache_only(regmap, true); |
|
regcache_mark_dirty(regmap); |
|
return 0; |
|
} |
|
|
|
static int ak4642_resume(struct snd_soc_component *component) |
|
{ |
|
struct regmap *regmap = dev_get_regmap(component->dev, NULL); |
|
|
|
regcache_cache_only(regmap, false); |
|
regcache_sync(regmap); |
|
return 0; |
|
} |
|
static int ak4642_probe(struct snd_soc_component *component) |
|
{ |
|
struct ak4642_priv *priv = snd_soc_component_get_drvdata(component); |
|
|
|
if (priv->mcko) |
|
ak4642_set_mcko(component, clk_get_rate(priv->mcko)); |
|
|
|
return 0; |
|
} |
|
|
|
static const struct snd_soc_component_driver soc_component_dev_ak4642 = { |
|
.probe = ak4642_probe, |
|
.suspend = ak4642_suspend, |
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.resume = ak4642_resume, |
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.set_bias_level = ak4642_set_bias_level, |
|
.controls = ak4642_snd_controls, |
|
.num_controls = ARRAY_SIZE(ak4642_snd_controls), |
|
.dapm_widgets = ak4642_dapm_widgets, |
|
.num_dapm_widgets = ARRAY_SIZE(ak4642_dapm_widgets), |
|
.dapm_routes = ak4642_intercon, |
|
.num_dapm_routes = ARRAY_SIZE(ak4642_intercon), |
|
.idle_bias_on = 1, |
|
.endianness = 1, |
|
.non_legacy_dai_naming = 1, |
|
}; |
|
|
|
static const struct regmap_config ak4642_regmap = { |
|
.reg_bits = 8, |
|
.val_bits = 8, |
|
.max_register = FIL1_3, |
|
.reg_defaults = ak4642_reg, |
|
.num_reg_defaults = NUM_AK4642_REG_DEFAULTS, |
|
.cache_type = REGCACHE_RBTREE, |
|
}; |
|
|
|
static const struct regmap_config ak4643_regmap = { |
|
.reg_bits = 8, |
|
.val_bits = 8, |
|
.max_register = SPK_MS, |
|
.reg_defaults = ak4643_reg, |
|
.num_reg_defaults = ARRAY_SIZE(ak4643_reg), |
|
.cache_type = REGCACHE_RBTREE, |
|
}; |
|
|
|
static const struct regmap_config ak4648_regmap = { |
|
.reg_bits = 8, |
|
.val_bits = 8, |
|
.max_register = EQ_FBEQE, |
|
.reg_defaults = ak4648_reg, |
|
.num_reg_defaults = ARRAY_SIZE(ak4648_reg), |
|
.cache_type = REGCACHE_RBTREE, |
|
}; |
|
|
|
static const struct ak4642_drvdata ak4642_drvdata = { |
|
.regmap_config = &ak4642_regmap, |
|
}; |
|
|
|
static const struct ak4642_drvdata ak4643_drvdata = { |
|
.regmap_config = &ak4643_regmap, |
|
}; |
|
|
|
static const struct ak4642_drvdata ak4648_drvdata = { |
|
.regmap_config = &ak4648_regmap, |
|
.extended_frequencies = 1, |
|
}; |
|
|
|
#ifdef CONFIG_COMMON_CLK |
|
static struct clk *ak4642_of_parse_mcko(struct device *dev) |
|
{ |
|
struct device_node *np = dev->of_node; |
|
struct clk *clk; |
|
const char *clk_name = np->name; |
|
const char *parent_clk_name = NULL; |
|
u32 rate; |
|
|
|
if (of_property_read_u32(np, "clock-frequency", &rate)) |
|
return NULL; |
|
|
|
if (of_property_read_bool(np, "clocks")) |
|
parent_clk_name = of_clk_get_parent_name(np, 0); |
|
|
|
of_property_read_string(np, "clock-output-names", &clk_name); |
|
|
|
clk = clk_register_fixed_rate(dev, clk_name, parent_clk_name, 0, rate); |
|
if (!IS_ERR(clk)) |
|
of_clk_add_provider(np, of_clk_src_simple_get, clk); |
|
|
|
return clk; |
|
} |
|
#else |
|
#define ak4642_of_parse_mcko(d) 0 |
|
#endif |
|
|
|
static const struct of_device_id ak4642_of_match[]; |
|
static int ak4642_i2c_probe(struct i2c_client *i2c, |
|
const struct i2c_device_id *id) |
|
{ |
|
struct device *dev = &i2c->dev; |
|
struct device_node *np = dev->of_node; |
|
const struct ak4642_drvdata *drvdata = NULL; |
|
struct regmap *regmap; |
|
struct ak4642_priv *priv; |
|
struct clk *mcko = NULL; |
|
|
|
if (np) { |
|
const struct of_device_id *of_id; |
|
|
|
mcko = ak4642_of_parse_mcko(dev); |
|
if (IS_ERR(mcko)) |
|
mcko = NULL; |
|
|
|
of_id = of_match_device(ak4642_of_match, dev); |
|
if (of_id) |
|
drvdata = of_id->data; |
|
} else { |
|
drvdata = (const struct ak4642_drvdata *)id->driver_data; |
|
} |
|
|
|
if (!drvdata) { |
|
dev_err(dev, "Unknown device type\n"); |
|
return -EINVAL; |
|
} |
|
|
|
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); |
|
if (!priv) |
|
return -ENOMEM; |
|
|
|
priv->drvdata = drvdata; |
|
priv->mcko = mcko; |
|
|
|
i2c_set_clientdata(i2c, priv); |
|
|
|
regmap = devm_regmap_init_i2c(i2c, drvdata->regmap_config); |
|
if (IS_ERR(regmap)) |
|
return PTR_ERR(regmap); |
|
|
|
return devm_snd_soc_register_component(dev, |
|
&soc_component_dev_ak4642, &ak4642_dai, 1); |
|
} |
|
|
|
static const struct of_device_id ak4642_of_match[] = { |
|
{ .compatible = "asahi-kasei,ak4642", .data = &ak4642_drvdata}, |
|
{ .compatible = "asahi-kasei,ak4643", .data = &ak4643_drvdata}, |
|
{ .compatible = "asahi-kasei,ak4648", .data = &ak4648_drvdata}, |
|
{}, |
|
}; |
|
MODULE_DEVICE_TABLE(of, ak4642_of_match); |
|
|
|
static const struct i2c_device_id ak4642_i2c_id[] = { |
|
{ "ak4642", (kernel_ulong_t)&ak4642_drvdata }, |
|
{ "ak4643", (kernel_ulong_t)&ak4643_drvdata }, |
|
{ "ak4648", (kernel_ulong_t)&ak4648_drvdata }, |
|
{ } |
|
}; |
|
MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id); |
|
|
|
static struct i2c_driver ak4642_i2c_driver = { |
|
.driver = { |
|
.name = "ak4642-codec", |
|
.of_match_table = ak4642_of_match, |
|
}, |
|
.probe = ak4642_i2c_probe, |
|
.id_table = ak4642_i2c_id, |
|
}; |
|
|
|
module_i2c_driver(ak4642_i2c_driver); |
|
|
|
MODULE_DESCRIPTION("Soc AK4642 driver"); |
|
MODULE_AUTHOR("Kuninori Morimoto <[email protected]>"); |
|
MODULE_LICENSE("GPL v2");
|
|
|