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301 lines
5.2 KiB
301 lines
5.2 KiB
// SPDX-License-Identifier: GPL-2.0 |
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#include <dt-bindings/clock/ath79-clk.h> |
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/ { |
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compatible = "qca,ar9331"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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cpus { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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cpu@0 { |
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device_type = "cpu"; |
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compatible = "mips,mips24Kc"; |
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clocks = <&pll ATH79_CLK_CPU>; |
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reg = <0>; |
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}; |
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}; |
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cpuintc: interrupt-controller { |
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compatible = "qca,ar7100-cpu-intc"; |
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interrupt-controller; |
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#interrupt-cells = <1>; |
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qca,ddr-wb-channel-interrupts = <2>, <3>; |
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qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>; |
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}; |
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ref: ref { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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}; |
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ahb { |
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compatible = "simple-bus"; |
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ranges; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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interrupt-parent = <&cpuintc>; |
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apb { |
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compatible = "simple-bus"; |
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ranges; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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interrupt-parent = <&miscintc>; |
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ddr_ctrl: memory-controller@18000000 { |
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compatible = "qca,ar7240-ddr-controller"; |
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reg = <0x18000000 0x100>; |
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#qca,ddr-wb-channel-cells = <1>; |
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}; |
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uart: serial@18020000 { |
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compatible = "qca,ar9330-uart"; |
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reg = <0x18020000 0x14>; |
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interrupts = <3>; |
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clocks = <&ref>; |
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clock-names = "uart"; |
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status = "disabled"; |
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}; |
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gpio: gpio@18040000 { |
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compatible = "qca,ar7100-gpio"; |
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reg = <0x18040000 0x34>; |
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interrupts = <2>; |
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ngpios = <30>; |
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gpio-controller; |
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#gpio-cells = <2>; |
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interrupt-controller; |
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#interrupt-cells = <2>; |
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status = "disabled"; |
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}; |
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pll: pll-controller@18050000 { |
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compatible = "qca,ar9330-pll"; |
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reg = <0x18050000 0x100>; |
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clocks = <&ref>; |
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clock-names = "ref"; |
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#clock-cells = <1>; |
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}; |
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miscintc: interrupt-controller@18060010 { |
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compatible = "qca,ar7240-misc-intc"; |
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reg = <0x18060010 0x8>; |
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interrupt-parent = <&cpuintc>; |
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interrupts = <6>; |
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interrupt-controller; |
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#interrupt-cells = <1>; |
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}; |
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rst: reset-controller@1806001c { |
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compatible = "qca,ar7100-reset"; |
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reg = <0x1806001c 0x4>; |
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#reset-cells = <1>; |
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}; |
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}; |
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eth0: ethernet@19000000 { |
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compatible = "qca,ar9330-eth"; |
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reg = <0x19000000 0x200>; |
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interrupts = <4>; |
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resets = <&rst 9>, <&rst 22>; |
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reset-names = "mac", "mdio"; |
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clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>; |
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clock-names = "eth", "mdio"; |
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phy-mode = "mii"; |
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phy-handle = <&phy_port4>; |
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status = "disabled"; |
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}; |
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eth1: ethernet@1a000000 { |
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compatible = "qca,ar9330-eth"; |
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reg = <0x1a000000 0x200>; |
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interrupts = <5>; |
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resets = <&rst 13>, <&rst 23>; |
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reset-names = "mac", "mdio"; |
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clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>; |
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clock-names = "eth", "mdio"; |
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phy-mode = "gmii"; |
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status = "disabled"; |
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fixed-link { |
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speed = <1000>; |
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full-duplex; |
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pause; |
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}; |
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mdio { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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switch10: switch@10 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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compatible = "qca,ar9331-switch"; |
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reg = <0x10>; |
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resets = <&rst 8>; |
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reset-names = "switch"; |
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interrupt-parent = <&miscintc>; |
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interrupts = <12>; |
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interrupt-controller; |
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#interrupt-cells = <1>; |
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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switch_port0: port@0 { |
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reg = <0x0>; |
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label = "cpu"; |
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ethernet = <ð1>; |
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phy-mode = "gmii"; |
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fixed-link { |
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speed = <1000>; |
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full-duplex; |
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pause; |
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}; |
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}; |
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switch_port1: port@1 { |
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reg = <0x1>; |
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phy-handle = <&phy_port0>; |
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phy-mode = "internal"; |
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status = "disabled"; |
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}; |
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switch_port2: port@2 { |
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reg = <0x2>; |
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phy-handle = <&phy_port1>; |
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phy-mode = "internal"; |
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status = "disabled"; |
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}; |
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switch_port3: port@3 { |
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reg = <0x3>; |
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phy-handle = <&phy_port2>; |
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phy-mode = "internal"; |
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status = "disabled"; |
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}; |
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switch_port4: port@4 { |
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reg = <0x4>; |
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phy-handle = <&phy_port3>; |
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phy-mode = "internal"; |
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status = "disabled"; |
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}; |
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}; |
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mdio { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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interrupt-parent = <&switch10>; |
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phy_port0: phy@0 { |
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reg = <0x0>; |
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interrupts = <0>; |
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status = "disabled"; |
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}; |
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phy_port1: phy@1 { |
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reg = <0x1>; |
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interrupts = <0>; |
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status = "disabled"; |
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}; |
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phy_port2: phy@2 { |
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reg = <0x2>; |
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interrupts = <0>; |
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status = "disabled"; |
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}; |
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phy_port3: phy@3 { |
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reg = <0x3>; |
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interrupts = <0>; |
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status = "disabled"; |
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}; |
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phy_port4: phy@4 { |
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reg = <0x4>; |
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interrupts = <0>; |
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status = "disabled"; |
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}; |
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}; |
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}; |
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}; |
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}; |
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usb: usb@1b000100 { |
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compatible = "chipidea,usb2"; |
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reg = <0x1b000000 0x200>; |
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interrupts = <3>; |
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resets = <&rst 5>; |
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phy-names = "usb-phy"; |
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phys = <&usb_phy>; |
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status = "disabled"; |
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}; |
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spi: spi@1f000000 { |
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compatible = "qca,ar7100-spi"; |
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reg = <0x1f000000 0x10>; |
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clocks = <&pll ATH79_CLK_AHB>; |
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clock-names = "ahb"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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status = "disabled"; |
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}; |
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}; |
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usb_phy: usb-phy { |
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compatible = "qca,ar7100-usb-phy"; |
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reset-names = "phy", "suspend-override"; |
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resets = <&rst 4>, <&rst 3>; |
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#phy-cells = <0>; |
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status = "disabled"; |
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}; |
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};
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