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152 lines
3.5 KiB
152 lines
3.5 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* |
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* Switch a MMU context. |
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* |
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited |
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*/ |
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#ifndef _ASM_MMU_CONTEXT_H |
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#define _ASM_MMU_CONTEXT_H |
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#include <linux/errno.h> |
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#include <linux/sched.h> |
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#include <linux/mm_types.h> |
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#include <linux/smp.h> |
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#include <linux/slab.h> |
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#include <asm/cacheflush.h> |
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#include <asm/tlbflush.h> |
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#include <asm-generic/mm_hooks.h> |
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/* |
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* All unused by hardware upper bits will be considered |
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* as a software asid extension. |
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*/ |
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static inline u64 asid_version_mask(unsigned int cpu) |
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{ |
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return ~(u64)(cpu_asid_mask(&cpu_data[cpu])); |
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} |
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static inline u64 asid_first_version(unsigned int cpu) |
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{ |
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return cpu_asid_mask(&cpu_data[cpu]) + 1; |
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} |
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#define cpu_context(cpu, mm) ((mm)->context.asid[cpu]) |
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#define asid_cache(cpu) (cpu_data[cpu].asid_cache) |
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#define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & cpu_asid_mask(&cpu_data[cpu])) |
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static inline int asid_valid(struct mm_struct *mm, unsigned int cpu) |
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{ |
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if ((cpu_context(cpu, mm) ^ asid_cache(cpu)) & asid_version_mask(cpu)) |
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return 0; |
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return 1; |
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} |
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static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) |
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{ |
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} |
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/* Normal, classic get_new_mmu_context */ |
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static inline void |
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get_new_mmu_context(struct mm_struct *mm, unsigned long cpu) |
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{ |
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u64 asid = asid_cache(cpu); |
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if (!((++asid) & cpu_asid_mask(&cpu_data[cpu]))) |
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local_flush_tlb_user(); /* start new asid cycle */ |
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cpu_context(cpu, mm) = asid_cache(cpu) = asid; |
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} |
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/* |
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* Initialize the context related info for a new mm_struct |
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* instance. |
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*/ |
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static inline int |
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init_new_context(struct task_struct *tsk, struct mm_struct *mm) |
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{ |
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int i; |
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for_each_possible_cpu(i) |
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cpu_context(i, mm) = 0; |
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return 0; |
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} |
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static inline void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next, |
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struct task_struct *tsk) |
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{ |
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unsigned int cpu = smp_processor_id(); |
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/* Check if our ASID is of an older version and thus invalid */ |
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if (!asid_valid(next, cpu)) |
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get_new_mmu_context(next, cpu); |
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write_csr_asid(cpu_asid(cpu, next)); |
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if (next != &init_mm) |
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csr_write64((unsigned long)next->pgd, LOONGARCH_CSR_PGDL); |
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else |
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csr_write64((unsigned long)invalid_pg_dir, LOONGARCH_CSR_PGDL); |
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/* |
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* Mark current->active_mm as not "active" anymore. |
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* We don't want to mislead possible IPI tlb flush routines. |
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*/ |
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cpumask_set_cpu(cpu, mm_cpumask(next)); |
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} |
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#define switch_mm_irqs_off switch_mm_irqs_off |
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, |
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struct task_struct *tsk) |
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{ |
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unsigned long flags; |
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local_irq_save(flags); |
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switch_mm_irqs_off(prev, next, tsk); |
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local_irq_restore(flags); |
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} |
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/* |
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* Destroy context related info for an mm_struct that is about |
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* to be put to rest. |
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*/ |
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static inline void destroy_context(struct mm_struct *mm) |
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{ |
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} |
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#define activate_mm(prev, next) switch_mm(prev, next, current) |
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#define deactivate_mm(task, mm) do { } while (0) |
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/* |
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* If mm is currently active, we can't really drop it. |
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* Instead, we will get a new one for it. |
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*/ |
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static inline void |
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drop_mmu_context(struct mm_struct *mm, unsigned int cpu) |
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{ |
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int asid; |
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unsigned long flags; |
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local_irq_save(flags); |
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asid = read_csr_asid() & cpu_asid_mask(¤t_cpu_data); |
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if (asid == cpu_asid(cpu, mm)) { |
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if (!current->mm || (current->mm == mm)) { |
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get_new_mmu_context(mm, cpu); |
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write_csr_asid(cpu_asid(cpu, mm)); |
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goto out; |
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} |
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} |
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/* Will get a new context next time */ |
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cpu_context(cpu, mm) = 0; |
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cpumask_clear_cpu(cpu, mm_cpumask(mm)); |
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out: |
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local_irq_restore(flags); |
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} |
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#endif /* _ASM_MMU_CONTEXT_H */
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