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280 lines
8.5 KiB
280 lines
8.5 KiB
/* SPDX-License-Identifier: GPL-2.0+ */ |
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/* |
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* c67x00.h: Cypress C67X00 USB register and field definitions |
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* |
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* Copyright (C) 2006-2008 Barco N.V. |
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* Derived from the Cypress cy7c67200/300 ezusb linux driver and |
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* based on multiple host controller drivers inside the linux kernel. |
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*/ |
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#ifndef _USB_C67X00_H |
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#define _USB_C67X00_H |
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#include <linux/spinlock.h> |
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#include <linux/platform_device.h> |
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#include <linux/completion.h> |
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#include <linux/mutex.h> |
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/* --------------------------------------------------------------------- |
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* Cypress C67x00 register definitions |
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*/ |
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/* Hardware Revision Register */ |
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#define HW_REV_REG 0xC004 |
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/* General USB registers */ |
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/* ===================== */ |
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/* USB Control Register */ |
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#define USB_CTL_REG(x) ((x) ? 0xC0AA : 0xC08A) |
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#define LOW_SPEED_PORT(x) ((x) ? 0x0800 : 0x0400) |
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#define HOST_MODE 0x0200 |
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#define PORT_RES_EN(x) ((x) ? 0x0100 : 0x0080) |
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#define SOF_EOP_EN(x) ((x) ? 0x0002 : 0x0001) |
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/* USB status register - Notice it has different content in hcd/udc mode */ |
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#define USB_STAT_REG(x) ((x) ? 0xC0B0 : 0xC090) |
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#define EP0_IRQ_FLG 0x0001 |
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#define EP1_IRQ_FLG 0x0002 |
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#define EP2_IRQ_FLG 0x0004 |
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#define EP3_IRQ_FLG 0x0008 |
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#define EP4_IRQ_FLG 0x0010 |
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#define EP5_IRQ_FLG 0x0020 |
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#define EP6_IRQ_FLG 0x0040 |
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#define EP7_IRQ_FLG 0x0080 |
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#define RESET_IRQ_FLG 0x0100 |
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#define SOF_EOP_IRQ_FLG 0x0200 |
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#define ID_IRQ_FLG 0x4000 |
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#define VBUS_IRQ_FLG 0x8000 |
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/* USB Host only registers */ |
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/* ======================= */ |
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/* Host n Control Register */ |
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#define HOST_CTL_REG(x) ((x) ? 0xC0A0 : 0xC080) |
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#define PREAMBLE_EN 0x0080 /* Preamble enable */ |
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#define SEQ_SEL 0x0040 /* Data Toggle Sequence Bit Select */ |
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#define ISO_EN 0x0010 /* Isochronous enable */ |
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#define ARM_EN 0x0001 /* Arm operation */ |
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/* Host n Interrupt Enable Register */ |
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#define HOST_IRQ_EN_REG(x) ((x) ? 0xC0AC : 0xC08C) |
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#define SOF_EOP_IRQ_EN 0x0200 /* SOF/EOP Interrupt Enable */ |
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#define SOF_EOP_TMOUT_IRQ_EN 0x0800 /* SOF/EOP Timeout Interrupt Enable */ |
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#define ID_IRQ_EN 0x4000 /* ID interrupt enable */ |
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#define VBUS_IRQ_EN 0x8000 /* VBUS interrupt enable */ |
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#define DONE_IRQ_EN 0x0001 /* Done Interrupt Enable */ |
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/* USB status register */ |
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#define HOST_STAT_MASK 0x02FD |
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#define PORT_CONNECT_CHANGE(x) ((x) ? 0x0020 : 0x0010) |
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#define PORT_SE0_STATUS(x) ((x) ? 0x0008 : 0x0004) |
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/* Host Frame Register */ |
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#define HOST_FRAME_REG(x) ((x) ? 0xC0B6 : 0xC096) |
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#define HOST_FRAME_MASK 0x07FF |
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/* USB Peripheral only registers */ |
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/* ============================= */ |
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/* Device n Port Sel reg */ |
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#define DEVICE_N_PORT_SEL(x) ((x) ? 0xC0A4 : 0xC084) |
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/* Device n Interrupt Enable Register */ |
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#define DEVICE_N_IRQ_EN_REG(x) ((x) ? 0xC0AC : 0xC08C) |
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#define DEVICE_N_ENDPOINT_N_CTL_REG(dev, ep) ((dev) \ |
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? (0x0280 + (ep << 4)) \ |
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: (0x0200 + (ep << 4))) |
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#define DEVICE_N_ENDPOINT_N_STAT_REG(dev, ep) ((dev) \ |
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? (0x0286 + (ep << 4)) \ |
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: (0x0206 + (ep << 4))) |
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#define DEVICE_N_ADDRESS(dev) ((dev) ? (0xC0AE) : (0xC08E)) |
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/* HPI registers */ |
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/* ============= */ |
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/* HPI Status register */ |
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#define SOFEOP_FLG(x) (1 << ((x) ? 12 : 10)) |
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#define SIEMSG_FLG(x) (1 << (4 + (x))) |
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#define RESET_FLG(x) ((x) ? 0x0200 : 0x0002) |
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#define DONE_FLG(x) (1 << (2 + (x))) |
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#define RESUME_FLG(x) (1 << (6 + (x))) |
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#define MBX_OUT_FLG 0x0001 /* Message out available */ |
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#define MBX_IN_FLG 0x0100 |
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#define ID_FLG 0x4000 |
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#define VBUS_FLG 0x8000 |
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/* Interrupt routing register */ |
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#define HPI_IRQ_ROUTING_REG 0x0142 |
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#define HPI_SWAP_ENABLE(x) ((x) ? 0x0100 : 0x0001) |
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#define RESET_TO_HPI_ENABLE(x) ((x) ? 0x0200 : 0x0002) |
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#define DONE_TO_HPI_ENABLE(x) ((x) ? 0x0008 : 0x0004) |
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#define RESUME_TO_HPI_ENABLE(x) ((x) ? 0x0080 : 0x0040) |
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#define SOFEOP_TO_HPI_EN(x) ((x) ? 0x2000 : 0x0800) |
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#define SOFEOP_TO_CPU_EN(x) ((x) ? 0x1000 : 0x0400) |
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#define ID_TO_HPI_ENABLE 0x4000 |
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#define VBUS_TO_HPI_ENABLE 0x8000 |
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/* SIE msg registers */ |
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#define SIEMSG_REG(x) ((x) ? 0x0148 : 0x0144) |
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#define HUSB_TDListDone 0x1000 |
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#define SUSB_EP0_MSG 0x0001 |
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#define SUSB_EP1_MSG 0x0002 |
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#define SUSB_EP2_MSG 0x0004 |
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#define SUSB_EP3_MSG 0x0008 |
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#define SUSB_EP4_MSG 0x0010 |
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#define SUSB_EP5_MSG 0x0020 |
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#define SUSB_EP6_MSG 0x0040 |
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#define SUSB_EP7_MSG 0x0080 |
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#define SUSB_RST_MSG 0x0100 |
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#define SUSB_SOF_MSG 0x0200 |
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#define SUSB_CFG_MSG 0x0400 |
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#define SUSB_SUS_MSG 0x0800 |
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#define SUSB_ID_MSG 0x4000 |
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#define SUSB_VBUS_MSG 0x8000 |
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/* BIOS interrupt routines */ |
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#define SUSBx_RECEIVE_INT(x) ((x) ? 97 : 81) |
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#define SUSBx_SEND_INT(x) ((x) ? 96 : 80) |
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#define SUSBx_DEV_DESC_VEC(x) ((x) ? 0x00D4 : 0x00B4) |
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#define SUSBx_CONF_DESC_VEC(x) ((x) ? 0x00D6 : 0x00B6) |
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#define SUSBx_STRING_DESC_VEC(x) ((x) ? 0x00D8 : 0x00B8) |
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#define CY_HCD_BUF_ADDR 0x500 /* Base address for host */ |
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#define SIE_TD_SIZE 0x200 /* size of the td list */ |
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#define SIE_TD_BUF_SIZE 0x400 /* size of the data buffer */ |
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#define SIE_TD_OFFSET(host) ((host) ? (SIE_TD_SIZE+SIE_TD_BUF_SIZE) : 0) |
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#define SIE_BUF_OFFSET(host) (SIE_TD_OFFSET(host) + SIE_TD_SIZE) |
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/* Base address of HCD + 2 x TD_SIZE + 2 x TD_BUF_SIZE */ |
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#define CY_UDC_REQ_HEADER_BASE 0x1100 |
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/* 8- byte request headers for IN/OUT transfers */ |
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#define CY_UDC_REQ_HEADER_SIZE 8 |
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#define CY_UDC_REQ_HEADER_ADDR(ep_num) (CY_UDC_REQ_HEADER_BASE + \ |
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((ep_num) * CY_UDC_REQ_HEADER_SIZE)) |
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#define CY_UDC_DESC_BASE_ADDRESS (CY_UDC_REQ_HEADER_ADDR(8)) |
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#define CY_UDC_BIOS_REPLACE_BASE 0x1800 |
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#define CY_UDC_REQ_BUFFER_BASE 0x2000 |
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#define CY_UDC_REQ_BUFFER_SIZE 0x0400 |
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#define CY_UDC_REQ_BUFFER_ADDR(ep_num) (CY_UDC_REQ_BUFFER_BASE + \ |
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((ep_num) * CY_UDC_REQ_BUFFER_SIZE)) |
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/* --------------------------------------------------------------------- |
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* Driver data structures |
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*/ |
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struct c67x00_device; |
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/** |
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* struct c67x00_sie - Common data associated with a SIE |
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* @lock: lock to protect this struct and the associated chip registers |
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* @private_data: subdriver dependent data |
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* @irq: subdriver dependent irq handler, set NULL when not used |
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* @dev: link to common driver structure |
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* @sie_num: SIE number on chip, starting from 0 |
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* @mode: SIE mode (host/peripheral/otg/not used) |
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*/ |
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struct c67x00_sie { |
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/* Entries to be used by the subdrivers */ |
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spinlock_t lock; /* protect this structure */ |
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void *private_data; |
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void (*irq) (struct c67x00_sie *sie, u16 int_status, u16 msg); |
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/* Read only: */ |
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struct c67x00_device *dev; |
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int sie_num; |
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int mode; |
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}; |
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#define sie_dev(s) (&(s)->dev->pdev->dev) |
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/** |
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* struct c67x00_lcp |
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*/ |
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struct c67x00_lcp { |
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/* Internal use only */ |
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struct mutex mutex; |
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struct completion msg_received; |
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u16 last_msg; |
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}; |
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/* |
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* struct c67x00_hpi |
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*/ |
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struct c67x00_hpi { |
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void __iomem *base; |
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int regstep; |
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spinlock_t lock; |
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struct c67x00_lcp lcp; |
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}; |
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#define C67X00_SIES 2 |
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#define C67X00_PORTS 2 |
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/** |
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* struct c67x00_device - Common data associated with a c67x00 instance |
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* @hpi: hpi addresses |
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* @sie: array of sie's on this chip |
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* @pdev: platform device of instance |
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* @pdata: configuration provided by the platform |
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*/ |
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struct c67x00_device { |
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struct c67x00_hpi hpi; |
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struct c67x00_sie sie[C67X00_SIES]; |
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struct platform_device *pdev; |
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struct c67x00_platform_data *pdata; |
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}; |
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/* --------------------------------------------------------------------- |
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* Low level interface functions |
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*/ |
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/* Host Port Interface (HPI) functions */ |
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u16 c67x00_ll_hpi_status(struct c67x00_device *dev); |
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void c67x00_ll_hpi_reg_init(struct c67x00_device *dev); |
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void c67x00_ll_hpi_enable_sofeop(struct c67x00_sie *sie); |
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void c67x00_ll_hpi_disable_sofeop(struct c67x00_sie *sie); |
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/* General functions */ |
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u16 c67x00_ll_fetch_siemsg(struct c67x00_device *dev, int sie_num); |
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u16 c67x00_ll_get_usb_ctl(struct c67x00_sie *sie); |
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void c67x00_ll_usb_clear_status(struct c67x00_sie *sie, u16 bits); |
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u16 c67x00_ll_usb_get_status(struct c67x00_sie *sie); |
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void c67x00_ll_write_mem_le16(struct c67x00_device *dev, u16 addr, |
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void *data, int len); |
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void c67x00_ll_read_mem_le16(struct c67x00_device *dev, u16 addr, |
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void *data, int len); |
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/* Host specific functions */ |
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void c67x00_ll_set_husb_eot(struct c67x00_device *dev, u16 value); |
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void c67x00_ll_husb_reset(struct c67x00_sie *sie, int port); |
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void c67x00_ll_husb_set_current_td(struct c67x00_sie *sie, u16 addr); |
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u16 c67x00_ll_husb_get_current_td(struct c67x00_sie *sie); |
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u16 c67x00_ll_husb_get_frame(struct c67x00_sie *sie); |
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void c67x00_ll_husb_init_host_port(struct c67x00_sie *sie); |
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void c67x00_ll_husb_reset_port(struct c67x00_sie *sie, int port); |
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/* Called by c67x00_irq to handle lcp interrupts */ |
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void c67x00_ll_irq(struct c67x00_device *dev, u16 int_status); |
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/* Setup and teardown */ |
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void c67x00_ll_init(struct c67x00_device *dev); |
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void c67x00_ll_release(struct c67x00_device *dev); |
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int c67x00_ll_reset(struct c67x00_device *dev); |
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#endif /* _USB_C67X00_H */
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