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59 lines
2.4 KiB
59 lines
2.4 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* io-unit.h: Definitions for the sun4d IO-UNIT. |
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* |
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* Copyright (C) 1997,1998 Jakub Jelinek ([email protected]) |
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*/ |
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#ifndef _SPARC_IO_UNIT_H |
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#define _SPARC_IO_UNIT_H |
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#include <linux/spinlock.h> |
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#include <linux/pgtable.h> |
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#include <asm/page.h> |
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/* The io-unit handles all virtual to physical address translations |
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* that occur between the SBUS and physical memory. Access by |
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* the cpu to IO registers and similar go over the xdbus so are |
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* translated by the on chip SRMMU. The io-unit and the srmmu do |
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* not need to have the same translations at all, in fact most |
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* of the time the translations they handle are a disjunct set. |
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* Basically the io-unit handles all dvma sbus activity. |
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*/ |
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/* AIEEE, unlike the nice sun4m, these monsters have |
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fixed DMA range 64M */ |
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#define IOUNIT_DMA_BASE 0xfc000000 /* TOP - 64M */ |
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#define IOUNIT_DMA_SIZE 0x04000000 /* 64M */ |
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/* We use last 1M for sparc_dvma_malloc */ |
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#define IOUNIT_DVMA_SIZE 0x00100000 /* 1M */ |
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/* The format of an iopte in the external page tables */ |
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#define IOUPTE_PAGE 0xffffff00 /* Physical page number (PA[35:12]) */ |
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#define IOUPTE_CACHE 0x00000080 /* Cached (in Viking/MXCC) */ |
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/* XXX Jakub, find out how to program SBUS streaming cache on XDBUS/sun4d. |
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* XXX Actually, all you should need to do is find out where the registers |
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* XXX are and copy over the sparc64 implementation I wrote. There may be |
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* XXX some horrible hwbugs though, so be careful. -DaveM |
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*/ |
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#define IOUPTE_STREAM 0x00000040 /* Translation can use streaming cache */ |
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#define IOUPTE_INTRA 0x00000008 /* SBUS direct slot->slot transfer */ |
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#define IOUPTE_WRITE 0x00000004 /* Writeable */ |
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#define IOUPTE_VALID 0x00000002 /* IOPTE is valid */ |
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#define IOUPTE_PARITY 0x00000001 /* Parity is checked during DVMA */ |
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struct iounit_struct { |
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unsigned long bmap[(IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 3)) / sizeof(unsigned long)]; |
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spinlock_t lock; |
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iopte_t __iomem *page_table; |
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unsigned long rotor[3]; |
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unsigned long limit[4]; |
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}; |
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#define IOUNIT_BMAP1_START 0x00000000 |
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#define IOUNIT_BMAP1_END (IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 1)) |
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#define IOUNIT_BMAP2_START IOUNIT_BMAP1_END |
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#define IOUNIT_BMAP2_END IOUNIT_BMAP2_START + (IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 2)) |
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#define IOUNIT_BMAPM_START IOUNIT_BMAP2_END |
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#define IOUNIT_BMAPM_END ((IOUNIT_DMA_SIZE - IOUNIT_DVMA_SIZE) >> PAGE_SHIFT) |
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#endif /* !(_SPARC_IO_UNIT_H) */
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