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37 lines
1.1 KiB
37 lines
1.1 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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// Copyright (C) 2012 ARM Limited |
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// Copyright (C) 2005-2017 Andes Technology Corporation |
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#ifndef __ASM_VDSO_DATAPAGE_H |
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#define __ASM_VDSO_DATAPAGE_H |
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#ifdef __KERNEL__ |
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#ifndef __ASSEMBLY__ |
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struct vdso_data { |
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bool cycle_count_down; /* timer cyclye counter is decrease with time */ |
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u32 cycle_count_offset; /* offset of timer cycle counter register */ |
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u32 seq_count; /* sequence count - odd during updates */ |
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u32 xtime_coarse_sec; /* coarse time */ |
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u32 xtime_coarse_nsec; |
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u32 wtm_clock_sec; /* wall to monotonic offset */ |
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u32 wtm_clock_nsec; |
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u32 xtime_clock_sec; /* CLOCK_REALTIME - seconds */ |
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u32 cs_mult; /* clocksource multiplier */ |
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u32 cs_shift; /* Cycle to nanosecond divisor (power of two) */ |
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u32 hrtimer_res; /* hrtimer resolution */ |
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u64 cs_cycle_last; /* last cycle value */ |
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u64 cs_mask; /* clocksource mask */ |
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u64 xtime_clock_nsec; /* CLOCK_REALTIME sub-ns base */ |
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u32 tz_minuteswest; /* timezone info for gettimeofday(2) */ |
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u32 tz_dsttime; |
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}; |
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#endif /* !__ASSEMBLY__ */ |
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#endif /* __KERNEL__ */ |
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#endif /* __ASM_VDSO_DATAPAGE_H */
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