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121 lines
2.8 KiB
121 lines
2.8 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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// |
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// Copyright (c) 2004-2006 Simtec Electronics |
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// Ben Dooks <[email protected]> |
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// |
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// S3C24XX Power Manager (Suspend-To-RAM) support |
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// |
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// See Documentation/arm/samsung-s3c24xx/suspend.rst for more information |
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// |
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// Parts based on arch/arm/mach-pxa/pm.c |
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// |
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// Thanks to Dimitry Andric for debugging |
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#include <linux/init.h> |
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#include <linux/suspend.h> |
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#include <linux/errno.h> |
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#include <linux/time.h> |
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#include <linux/gpio.h> |
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#include <linux/interrupt.h> |
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#include <linux/serial_core.h> |
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#include <linux/serial_s3c.h> |
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#include <linux/io.h> |
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#include "regs-clock.h" |
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#include "regs-gpio.h" |
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#include "regs-irq.h" |
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#include "gpio-samsung.h" |
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#include <asm/mach/time.h> |
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#include "gpio-cfg.h" |
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#include "pm.h" |
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#include "regs-mem-s3c24xx.h" |
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#define PFX "s3c24xx-pm: " |
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#ifdef CONFIG_PM_SLEEP |
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static struct sleep_save core_save[] = { |
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/* we restore the timings here, with the proviso that the board |
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* brings the system up in an slower, or equal frequency setting |
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* to the original system. |
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* |
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* if we cannot guarantee this, then things are going to go very |
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* wrong here, as we modify the refresh and both pll settings. |
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*/ |
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SAVE_ITEM(S3C2410_BWSCON), |
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SAVE_ITEM(S3C2410_BANKCON0), |
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SAVE_ITEM(S3C2410_BANKCON1), |
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SAVE_ITEM(S3C2410_BANKCON2), |
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SAVE_ITEM(S3C2410_BANKCON3), |
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SAVE_ITEM(S3C2410_BANKCON4), |
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SAVE_ITEM(S3C2410_BANKCON5), |
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}; |
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#endif |
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/* s3c_pm_check_resume_pin |
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* |
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* check to see if the pin is configured correctly for sleep mode, and |
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* make any necessary adjustments if it is not |
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*/ |
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static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) |
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{ |
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unsigned long irqstate; |
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unsigned long pinstate; |
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int irq = gpio_to_irq(pin); |
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if (irqoffs < 4) |
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irqstate = s3c_irqwake_intmask & (1L<<irqoffs); |
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else |
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irqstate = s3c_irqwake_eintmask & (1L<<irqoffs); |
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pinstate = s3c_gpio_getcfg(pin); |
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if (!irqstate) { |
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if (pinstate == S3C2410_GPIO_IRQ) |
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S3C_PMDBG("Leaving IRQ %d (pin %d) as is\n", irq, pin); |
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} else { |
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if (pinstate == S3C2410_GPIO_IRQ) { |
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S3C_PMDBG("Disabling IRQ %d (pin %d)\n", irq, pin); |
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s3c_gpio_cfgpin(pin, S3C2410_GPIO_INPUT); |
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} |
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} |
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} |
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/* s3c_pm_configure_extint |
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* |
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* configure all external interrupt pins |
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*/ |
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void s3c_pm_configure_extint(void) |
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{ |
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int pin; |
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/* for each of the external interrupts (EINT0..EINT15) we |
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* need to check whether it is an external interrupt source, |
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* and then configure it as an input if it is not |
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*/ |
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for (pin = S3C2410_GPF(0); pin <= S3C2410_GPF(7); pin++) { |
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s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF(0)); |
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} |
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for (pin = S3C2410_GPG(0); pin <= S3C2410_GPG(7); pin++) { |
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s3c_pm_check_resume_pin(pin, (pin - S3C2410_GPG(0))+8); |
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} |
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} |
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#ifdef CONFIG_PM_SLEEP |
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void s3c_pm_restore_core(void) |
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{ |
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s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); |
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} |
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void s3c_pm_save_core(void) |
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{ |
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s3c_pm_do_save(core_save, ARRAY_SIZE(core_save)); |
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} |
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#endif
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