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209 lines
5.3 KiB
209 lines
5.3 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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#ifndef _TDFX_H |
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#define _TDFX_H |
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#include <linux/i2c.h> |
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#include <linux/i2c-algo-bit.h> |
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/* membase0 register offsets */ |
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#define STATUS 0x00 |
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#define PCIINIT0 0x04 |
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#define SIPMONITOR 0x08 |
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#define LFBMEMORYCONFIG 0x0c |
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#define MISCINIT0 0x10 |
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#define MISCINIT1 0x14 |
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#define DRAMINIT0 0x18 |
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#define DRAMINIT1 0x1c |
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#define AGPINIT 0x20 |
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#define TMUGBEINIT 0x24 |
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#define VGAINIT0 0x28 |
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#define VGAINIT1 0x2c |
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#define DRAMCOMMAND 0x30 |
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#define DRAMDATA 0x34 |
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/* reserved 0x38 */ |
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/* reserved 0x3c */ |
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#define PLLCTRL0 0x40 |
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#define PLLCTRL1 0x44 |
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#define PLLCTRL2 0x48 |
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#define DACMODE 0x4c |
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#define DACADDR 0x50 |
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#define DACDATA 0x54 |
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#define RGBMAXDELTA 0x58 |
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#define VIDPROCCFG 0x5c |
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#define HWCURPATADDR 0x60 |
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#define HWCURLOC 0x64 |
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#define HWCURC0 0x68 |
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#define HWCURC1 0x6c |
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#define VIDINFORMAT 0x70 |
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#define VIDINSTATUS 0x74 |
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#define VIDSERPARPORT 0x78 |
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#define VIDINXDELTA 0x7c |
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#define VIDININITERR 0x80 |
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#define VIDINYDELTA 0x84 |
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#define VIDPIXBUFTHOLD 0x88 |
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#define VIDCHRMIN 0x8c |
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#define VIDCHRMAX 0x90 |
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#define VIDCURLIN 0x94 |
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#define VIDSCREENSIZE 0x98 |
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#define VIDOVRSTARTCRD 0x9c |
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#define VIDOVRENDCRD 0xa0 |
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#define VIDOVRDUDX 0xa4 |
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#define VIDOVRDUDXOFF 0xa8 |
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#define VIDOVRDVDY 0xac |
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/* ... */ |
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#define VIDOVRDVDYOFF 0xe0 |
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#define VIDDESKSTART 0xe4 |
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#define VIDDESKSTRIDE 0xe8 |
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#define VIDINADDR0 0xec |
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#define VIDINADDR1 0xf0 |
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#define VIDINADDR2 0xf4 |
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#define VIDINSTRIDE 0xf8 |
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#define VIDCUROVRSTART 0xfc |
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#define INTCTRL (0x00100000 + 0x04) |
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#define CLIP0MIN (0x00100000 + 0x08) |
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#define CLIP0MAX (0x00100000 + 0x0c) |
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#define DSTBASE (0x00100000 + 0x10) |
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#define DSTFORMAT (0x00100000 + 0x14) |
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#define SRCBASE (0x00100000 + 0x34) |
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#define COMMANDEXTRA_2D (0x00100000 + 0x38) |
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#define CLIP1MIN (0x00100000 + 0x4c) |
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#define CLIP1MAX (0x00100000 + 0x50) |
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#define SRCFORMAT (0x00100000 + 0x54) |
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#define SRCSIZE (0x00100000 + 0x58) |
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#define SRCXY (0x00100000 + 0x5c) |
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#define COLORBACK (0x00100000 + 0x60) |
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#define COLORFORE (0x00100000 + 0x64) |
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#define DSTSIZE (0x00100000 + 0x68) |
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#define DSTXY (0x00100000 + 0x6c) |
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#define COMMAND_2D (0x00100000 + 0x70) |
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#define LAUNCH_2D (0x00100000 + 0x80) |
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#define COMMAND_3D (0x00200000 + 0x120) |
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/* register bitfields (not all, only as needed) */ |
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/* COMMAND_2D reg. values */ |
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#define TDFX_ROP_COPY 0xcc /* src */ |
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#define TDFX_ROP_INVERT 0x55 /* NOT dst */ |
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#define TDFX_ROP_XOR 0x66 /* src XOR dst */ |
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#define AUTOINC_DSTX BIT(10) |
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#define AUTOINC_DSTY BIT(11) |
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#define COMMAND_2D_FILLRECT 0x05 |
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#define COMMAND_2D_S2S_BITBLT 0x01 /* screen to screen */ |
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#define COMMAND_2D_H2S_BITBLT 0x03 /* host to screen */ |
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#define COMMAND_3D_NOP 0x00 |
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#define STATUS_RETRACE BIT(6) |
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#define STATUS_BUSY BIT(9) |
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#define MISCINIT1_CLUT_INV BIT(0) |
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#define MISCINIT1_2DBLOCK_DIS BIT(15) |
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#define DRAMINIT0_SGRAM_NUM BIT(26) |
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#define DRAMINIT0_SGRAM_TYPE BIT(27) |
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#define DRAMINIT0_SGRAM_TYPE_MASK (BIT(27) | BIT(28) | BIT(29)) |
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#define DRAMINIT0_SGRAM_TYPE_SHIFT 27 |
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#define DRAMINIT1_MEM_SDRAM BIT(30) |
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#define VGAINIT0_VGA_DISABLE BIT(0) |
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#define VGAINIT0_EXT_TIMING BIT(1) |
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#define VGAINIT0_8BIT_DAC BIT(2) |
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#define VGAINIT0_EXT_ENABLE BIT(6) |
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#define VGAINIT0_WAKEUP_3C3 BIT(8) |
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#define VGAINIT0_LEGACY_DISABLE BIT(9) |
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#define VGAINIT0_ALT_READBACK BIT(10) |
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#define VGAINIT0_FAST_BLINK BIT(11) |
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#define VGAINIT0_EXTSHIFTOUT BIT(12) |
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#define VGAINIT0_DECODE_3C6 BIT(13) |
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#define VGAINIT0_SGRAM_HBLANK_DISABLE BIT(22) |
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#define VGAINIT1_MASK 0x1fffff |
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#define VIDCFG_VIDPROC_ENABLE BIT(0) |
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#define VIDCFG_CURS_X11 BIT(1) |
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#define VIDCFG_INTERLACE BIT(3) |
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#define VIDCFG_HALF_MODE BIT(4) |
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#define VIDCFG_DESK_ENABLE BIT(7) |
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#define VIDCFG_CLUT_BYPASS BIT(10) |
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#define VIDCFG_2X BIT(26) |
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#define VIDCFG_HWCURSOR_ENABLE BIT(27) |
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#define VIDCFG_PIXFMT_SHIFT 18 |
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#define DACMODE_2X BIT(0) |
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/* I2C bit locations in the VIDSERPARPORT register */ |
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#define DDC_ENAB 0x00040000 |
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#define DDC_SCL_OUT 0x00080000 |
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#define DDC_SDA_OUT 0x00100000 |
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#define DDC_SCL_IN 0x00200000 |
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#define DDC_SDA_IN 0x00400000 |
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#define I2C_ENAB 0x00800000 |
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#define I2C_SCL_OUT 0x01000000 |
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#define I2C_SDA_OUT 0x02000000 |
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#define I2C_SCL_IN 0x04000000 |
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#define I2C_SDA_IN 0x08000000 |
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/* VGA rubbish, need to change this for multihead support */ |
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#define MISC_W 0x3c2 |
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#define MISC_R 0x3cc |
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#define SEQ_I 0x3c4 |
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#define SEQ_D 0x3c5 |
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#define CRT_I 0x3d4 |
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#define CRT_D 0x3d5 |
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#define ATT_IW 0x3c0 |
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#define IS1_R 0x3da |
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#define GRA_I 0x3ce |
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#define GRA_D 0x3cf |
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#ifdef __KERNEL__ |
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struct banshee_reg { |
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/* VGA rubbish */ |
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unsigned char att[21]; |
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unsigned char crt[25]; |
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unsigned char gra[9]; |
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unsigned char misc[1]; |
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unsigned char seq[5]; |
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/* Banshee extensions */ |
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unsigned char ext[2]; |
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unsigned long vidcfg; |
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unsigned long vidpll; |
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unsigned long mempll; |
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unsigned long gfxpll; |
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unsigned long dacmode; |
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unsigned long vgainit0; |
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unsigned long vgainit1; |
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unsigned long screensize; |
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unsigned long stride; |
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unsigned long cursloc; |
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unsigned long curspataddr; |
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unsigned long cursc0; |
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unsigned long cursc1; |
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unsigned long startaddr; |
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unsigned long clip0min; |
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unsigned long clip0max; |
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unsigned long clip1min; |
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unsigned long clip1max; |
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unsigned long miscinit0; |
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}; |
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struct tdfx_par; |
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struct tdfxfb_i2c_chan { |
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struct tdfx_par *par; |
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struct i2c_adapter adapter; |
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struct i2c_algo_bit_data algo; |
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}; |
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struct tdfx_par { |
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u32 max_pixclock; |
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u32 palette[16]; |
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void __iomem *regbase_virt; |
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unsigned long iobase; |
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int wc_cookie; |
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#ifdef CONFIG_FB_3DFX_I2C |
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struct tdfxfb_i2c_chan chan[2]; |
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#endif |
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}; |
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#endif /* __KERNEL__ */ |
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#endif /* _TDFX_H */ |
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