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307 lines
6.9 KiB
307 lines
6.9 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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/* |
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* ST's LPC Watchdog |
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* |
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* Copyright (C) 2014 STMicroelectronics -- All Rights Reserved |
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* |
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* Author: David Paris <[email protected]> for STMicroelectronics |
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* Lee Jones <[email protected]> for STMicroelectronics |
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*/ |
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#include <linux/clk.h> |
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#include <linux/init.h> |
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#include <linux/io.h> |
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#include <linux/kernel.h> |
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#include <linux/mfd/syscon.h> |
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#include <linux/module.h> |
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#include <linux/of.h> |
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#include <linux/of_platform.h> |
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#include <linux/platform_device.h> |
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#include <linux/regmap.h> |
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#include <linux/watchdog.h> |
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#include <dt-bindings/mfd/st-lpc.h> |
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/* Low Power Alarm */ |
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#define LPC_LPA_LSB_OFF 0x410 |
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#define LPC_LPA_START_OFF 0x418 |
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/* LPC as WDT */ |
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#define LPC_WDT_OFF 0x510 |
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static struct watchdog_device st_wdog_dev; |
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struct st_wdog_syscfg { |
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unsigned int reset_type_reg; |
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unsigned int reset_type_mask; |
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unsigned int enable_reg; |
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unsigned int enable_mask; |
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}; |
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struct st_wdog { |
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void __iomem *base; |
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struct device *dev; |
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struct regmap *regmap; |
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struct st_wdog_syscfg *syscfg; |
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struct clk *clk; |
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unsigned long clkrate; |
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bool warm_reset; |
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}; |
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static struct st_wdog_syscfg stih407_syscfg = { |
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.enable_reg = 0x204, |
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.enable_mask = BIT(19), |
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}; |
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static const struct of_device_id st_wdog_match[] = { |
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{ |
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.compatible = "st,stih407-lpc", |
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.data = &stih407_syscfg, |
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}, |
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{}, |
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}; |
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MODULE_DEVICE_TABLE(of, st_wdog_match); |
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static void st_wdog_setup(struct st_wdog *st_wdog, bool enable) |
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{ |
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/* Type of watchdog reset - 0: Cold 1: Warm */ |
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if (st_wdog->syscfg->reset_type_reg) |
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regmap_update_bits(st_wdog->regmap, |
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st_wdog->syscfg->reset_type_reg, |
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st_wdog->syscfg->reset_type_mask, |
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st_wdog->warm_reset); |
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/* Mask/unmask watchdog reset */ |
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regmap_update_bits(st_wdog->regmap, |
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st_wdog->syscfg->enable_reg, |
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st_wdog->syscfg->enable_mask, |
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enable ? 0 : st_wdog->syscfg->enable_mask); |
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} |
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static void st_wdog_load_timer(struct st_wdog *st_wdog, unsigned int timeout) |
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{ |
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unsigned long clkrate = st_wdog->clkrate; |
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writel_relaxed(timeout * clkrate, st_wdog->base + LPC_LPA_LSB_OFF); |
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writel_relaxed(1, st_wdog->base + LPC_LPA_START_OFF); |
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} |
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static int st_wdog_start(struct watchdog_device *wdd) |
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{ |
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struct st_wdog *st_wdog = watchdog_get_drvdata(wdd); |
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writel_relaxed(1, st_wdog->base + LPC_WDT_OFF); |
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return 0; |
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} |
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static int st_wdog_stop(struct watchdog_device *wdd) |
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{ |
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struct st_wdog *st_wdog = watchdog_get_drvdata(wdd); |
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writel_relaxed(0, st_wdog->base + LPC_WDT_OFF); |
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return 0; |
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} |
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static int st_wdog_set_timeout(struct watchdog_device *wdd, |
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unsigned int timeout) |
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{ |
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struct st_wdog *st_wdog = watchdog_get_drvdata(wdd); |
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wdd->timeout = timeout; |
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st_wdog_load_timer(st_wdog, timeout); |
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return 0; |
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} |
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static int st_wdog_keepalive(struct watchdog_device *wdd) |
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{ |
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struct st_wdog *st_wdog = watchdog_get_drvdata(wdd); |
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st_wdog_load_timer(st_wdog, wdd->timeout); |
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return 0; |
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} |
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static const struct watchdog_info st_wdog_info = { |
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, |
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.identity = "ST LPC WDT", |
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}; |
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static const struct watchdog_ops st_wdog_ops = { |
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.owner = THIS_MODULE, |
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.start = st_wdog_start, |
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.stop = st_wdog_stop, |
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.ping = st_wdog_keepalive, |
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.set_timeout = st_wdog_set_timeout, |
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}; |
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static struct watchdog_device st_wdog_dev = { |
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.info = &st_wdog_info, |
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.ops = &st_wdog_ops, |
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}; |
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static void st_clk_disable_unprepare(void *data) |
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{ |
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clk_disable_unprepare(data); |
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} |
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static int st_wdog_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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const struct of_device_id *match; |
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struct device_node *np = dev->of_node; |
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struct st_wdog *st_wdog; |
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struct regmap *regmap; |
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struct clk *clk; |
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void __iomem *base; |
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uint32_t mode; |
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int ret; |
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ret = of_property_read_u32(np, "st,lpc-mode", &mode); |
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if (ret) { |
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dev_err(dev, "An LPC mode must be provided\n"); |
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return -EINVAL; |
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} |
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/* LPC can either run as a Clocksource or in RTC or WDT mode */ |
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if (mode != ST_LPC_MODE_WDT) |
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return -ENODEV; |
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st_wdog = devm_kzalloc(dev, sizeof(*st_wdog), GFP_KERNEL); |
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if (!st_wdog) |
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return -ENOMEM; |
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match = of_match_device(st_wdog_match, dev); |
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if (!match) { |
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dev_err(dev, "Couldn't match device\n"); |
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return -ENODEV; |
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} |
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st_wdog->syscfg = (struct st_wdog_syscfg *)match->data; |
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base = devm_platform_ioremap_resource(pdev, 0); |
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if (IS_ERR(base)) |
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return PTR_ERR(base); |
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regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); |
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if (IS_ERR(regmap)) { |
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dev_err(dev, "No syscfg phandle specified\n"); |
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return PTR_ERR(regmap); |
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} |
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clk = devm_clk_get(dev, NULL); |
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if (IS_ERR(clk)) { |
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dev_err(dev, "Unable to request clock\n"); |
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return PTR_ERR(clk); |
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} |
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st_wdog->dev = dev; |
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st_wdog->base = base; |
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st_wdog->clk = clk; |
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st_wdog->regmap = regmap; |
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st_wdog->warm_reset = of_property_read_bool(np, "st,warm_reset"); |
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st_wdog->clkrate = clk_get_rate(st_wdog->clk); |
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if (!st_wdog->clkrate) { |
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dev_err(dev, "Unable to fetch clock rate\n"); |
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return -EINVAL; |
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} |
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st_wdog_dev.max_timeout = 0xFFFFFFFF / st_wdog->clkrate; |
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st_wdog_dev.parent = dev; |
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ret = clk_prepare_enable(clk); |
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if (ret) { |
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dev_err(dev, "Unable to enable clock\n"); |
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return ret; |
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} |
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ret = devm_add_action_or_reset(dev, st_clk_disable_unprepare, clk); |
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if (ret) |
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return ret; |
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watchdog_set_drvdata(&st_wdog_dev, st_wdog); |
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watchdog_set_nowayout(&st_wdog_dev, WATCHDOG_NOWAYOUT); |
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/* Init Watchdog timeout with value in DT */ |
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ret = watchdog_init_timeout(&st_wdog_dev, 0, dev); |
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if (ret) |
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return ret; |
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ret = devm_watchdog_register_device(dev, &st_wdog_dev); |
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if (ret) |
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return ret; |
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st_wdog_setup(st_wdog, true); |
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dev_info(dev, "LPC Watchdog driver registered, reset type is %s", |
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st_wdog->warm_reset ? "warm" : "cold"); |
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return ret; |
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} |
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static int st_wdog_remove(struct platform_device *pdev) |
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{ |
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struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev); |
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st_wdog_setup(st_wdog, false); |
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return 0; |
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} |
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#ifdef CONFIG_PM_SLEEP |
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static int st_wdog_suspend(struct device *dev) |
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{ |
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struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev); |
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if (watchdog_active(&st_wdog_dev)) |
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st_wdog_stop(&st_wdog_dev); |
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st_wdog_setup(st_wdog, false); |
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clk_disable(st_wdog->clk); |
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return 0; |
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} |
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static int st_wdog_resume(struct device *dev) |
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{ |
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struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev); |
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int ret; |
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ret = clk_enable(st_wdog->clk); |
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if (ret) { |
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dev_err(dev, "Unable to re-enable clock\n"); |
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watchdog_unregister_device(&st_wdog_dev); |
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clk_unprepare(st_wdog->clk); |
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return ret; |
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} |
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st_wdog_setup(st_wdog, true); |
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if (watchdog_active(&st_wdog_dev)) { |
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st_wdog_load_timer(st_wdog, st_wdog_dev.timeout); |
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st_wdog_start(&st_wdog_dev); |
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} |
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return 0; |
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} |
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#endif |
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static SIMPLE_DEV_PM_OPS(st_wdog_pm_ops, |
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st_wdog_suspend, |
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st_wdog_resume); |
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static struct platform_driver st_wdog_driver = { |
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.driver = { |
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.name = "st-lpc-wdt", |
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.pm = &st_wdog_pm_ops, |
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.of_match_table = st_wdog_match, |
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}, |
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.probe = st_wdog_probe, |
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.remove = st_wdog_remove, |
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}; |
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module_platform_driver(st_wdog_driver); |
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MODULE_AUTHOR("David Paris <[email protected]>"); |
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MODULE_DESCRIPTION("ST LPC Watchdog Driver"); |
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MODULE_LICENSE("GPL");
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