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875 lines
21 KiB
875 lines
21 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/*************************************************************************** |
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* Copyright (C) 2006 by Hans Edgington <[email protected]> * |
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* Copyright (C) 2007-2009 Hans de Goede <[email protected]> * |
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* Copyright (C) 2010 Giel van Schijndel <[email protected]> * |
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* * |
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***************************************************************************/ |
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
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#include <linux/err.h> |
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#include <linux/fs.h> |
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#include <linux/init.h> |
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#include <linux/io.h> |
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#include <linux/ioport.h> |
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#include <linux/miscdevice.h> |
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#include <linux/module.h> |
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#include <linux/mutex.h> |
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#include <linux/notifier.h> |
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#include <linux/reboot.h> |
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#include <linux/uaccess.h> |
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#include <linux/watchdog.h> |
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#define DRVNAME "f71808e_wdt" |
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#define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */ |
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#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */ |
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#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */ |
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#define SIO_REG_LDSEL 0x07 /* Logical device select */ |
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#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ |
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#define SIO_REG_DEVREV 0x22 /* Device revision */ |
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#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ |
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#define SIO_REG_CLOCK_SEL 0x26 /* Clock select */ |
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#define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */ |
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#define SIO_F81866_REG_PORT_SEL 0x27 /* F81866 Multi-Function Register */ |
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#define SIO_REG_TSI_LEVEL_SEL 0x28 /* TSI Level select */ |
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#define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */ |
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#define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */ |
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#define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */ |
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#define SIO_F81866_REG_GPIO1 0x2c /* F81866 GPIO1 Enable Register */ |
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#define SIO_REG_ENABLE 0x30 /* Logical device enable */ |
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#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ |
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#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */ |
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#define SIO_F71808_ID 0x0901 /* Chipset ID */ |
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#define SIO_F71858_ID 0x0507 /* Chipset ID */ |
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#define SIO_F71862_ID 0x0601 /* Chipset ID */ |
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#define SIO_F71868_ID 0x1106 /* Chipset ID */ |
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#define SIO_F71869_ID 0x0814 /* Chipset ID */ |
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#define SIO_F71869A_ID 0x1007 /* Chipset ID */ |
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#define SIO_F71882_ID 0x0541 /* Chipset ID */ |
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#define SIO_F71889_ID 0x0723 /* Chipset ID */ |
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#define SIO_F81803_ID 0x1210 /* Chipset ID */ |
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#define SIO_F81865_ID 0x0704 /* Chipset ID */ |
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#define SIO_F81866_ID 0x1010 /* Chipset ID */ |
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#define F71808FG_REG_WDO_CONF 0xf0 |
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#define F71808FG_REG_WDT_CONF 0xf5 |
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#define F71808FG_REG_WD_TIME 0xf6 |
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#define F71808FG_FLAG_WDOUT_EN 7 |
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#define F71808FG_FLAG_WDTMOUT_STS 6 |
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#define F71808FG_FLAG_WD_EN 5 |
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#define F71808FG_FLAG_WD_PULSE 4 |
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#define F71808FG_FLAG_WD_UNIT 3 |
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#define F81865_REG_WDO_CONF 0xfa |
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#define F81865_FLAG_WDOUT_EN 0 |
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/* Default values */ |
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#define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */ |
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#define WATCHDOG_MAX_TIMEOUT (60 * 255) |
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#define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for |
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watchdog signal */ |
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#define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output |
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pin number 63 */ |
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static unsigned short force_id; |
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module_param(force_id, ushort, 0); |
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MODULE_PARM_DESC(force_id, "Override the detected device ID"); |
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static const int max_timeout = WATCHDOG_MAX_TIMEOUT; |
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static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */ |
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module_param(timeout, int, 0); |
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MODULE_PARM_DESC(timeout, |
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"Watchdog timeout in seconds. 1<= timeout <=" |
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__MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default=" |
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__MODULE_STRING(WATCHDOG_TIMEOUT) ")"); |
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static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH; |
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module_param(pulse_width, uint, 0); |
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MODULE_PARM_DESC(pulse_width, |
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"Watchdog signal pulse width. 0(=level), 1, 25, 30, 125, 150, 5000 or 6000 ms" |
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" (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")"); |
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static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN; |
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module_param(f71862fg_pin, uint, 0); |
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MODULE_PARM_DESC(f71862fg_pin, |
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"Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63" |
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" (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")"); |
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static bool nowayout = WATCHDOG_NOWAYOUT; |
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module_param(nowayout, bool, 0444); |
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MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close"); |
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static unsigned int start_withtimeout; |
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module_param(start_withtimeout, uint, 0); |
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MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with" |
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" given initial timeout. Zero (default) disables this feature."); |
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enum chips { f71808fg, f71858fg, f71862fg, f71868, f71869, f71882fg, f71889fg, |
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f81803, f81865, f81866}; |
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static const char *f71808e_names[] = { |
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"f71808fg", |
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"f71858fg", |
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"f71862fg", |
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"f71868", |
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"f71869", |
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"f71882fg", |
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"f71889fg", |
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"f81803", |
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"f81865", |
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"f81866", |
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}; |
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/* Super-I/O Function prototypes */ |
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static inline int superio_inb(int base, int reg); |
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static inline int superio_inw(int base, int reg); |
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static inline void superio_outb(int base, int reg, u8 val); |
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static inline void superio_set_bit(int base, int reg, int bit); |
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static inline void superio_clear_bit(int base, int reg, int bit); |
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static inline int superio_enter(int base); |
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static inline void superio_select(int base, int ld); |
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static inline void superio_exit(int base); |
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struct watchdog_data { |
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unsigned short sioaddr; |
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enum chips type; |
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unsigned long opened; |
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struct mutex lock; |
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char expect_close; |
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struct watchdog_info ident; |
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unsigned short timeout; |
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u8 timer_val; /* content for the wd_time register */ |
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char minutes_mode; |
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u8 pulse_val; /* pulse width flag */ |
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char pulse_mode; /* enable pulse output mode? */ |
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char caused_reboot; /* last reboot was by the watchdog */ |
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}; |
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static struct watchdog_data watchdog = { |
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.lock = __MUTEX_INITIALIZER(watchdog.lock), |
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}; |
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/* Super I/O functions */ |
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static inline int superio_inb(int base, int reg) |
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{ |
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outb(reg, base); |
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return inb(base + 1); |
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} |
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static int superio_inw(int base, int reg) |
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{ |
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int val; |
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val = superio_inb(base, reg) << 8; |
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val |= superio_inb(base, reg + 1); |
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return val; |
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} |
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static inline void superio_outb(int base, int reg, u8 val) |
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{ |
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outb(reg, base); |
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outb(val, base + 1); |
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} |
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static inline void superio_set_bit(int base, int reg, int bit) |
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{ |
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unsigned long val = superio_inb(base, reg); |
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__set_bit(bit, &val); |
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superio_outb(base, reg, val); |
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} |
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static inline void superio_clear_bit(int base, int reg, int bit) |
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{ |
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unsigned long val = superio_inb(base, reg); |
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__clear_bit(bit, &val); |
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superio_outb(base, reg, val); |
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} |
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static inline int superio_enter(int base) |
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{ |
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/* Don't step on other drivers' I/O space by accident */ |
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if (!request_muxed_region(base, 2, DRVNAME)) { |
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pr_err("I/O address 0x%04x already in use\n", (int)base); |
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return -EBUSY; |
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} |
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/* according to the datasheet the key must be sent twice! */ |
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outb(SIO_UNLOCK_KEY, base); |
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outb(SIO_UNLOCK_KEY, base); |
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return 0; |
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} |
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static inline void superio_select(int base, int ld) |
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{ |
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outb(SIO_REG_LDSEL, base); |
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outb(ld, base + 1); |
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} |
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static inline void superio_exit(int base) |
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{ |
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outb(SIO_LOCK_KEY, base); |
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release_region(base, 2); |
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} |
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static int watchdog_set_timeout(int timeout) |
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{ |
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if (timeout <= 0 |
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|| timeout > max_timeout) { |
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pr_err("watchdog timeout out of range\n"); |
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return -EINVAL; |
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} |
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mutex_lock(&watchdog.lock); |
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watchdog.timeout = timeout; |
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if (timeout > 0xff) { |
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watchdog.timer_val = DIV_ROUND_UP(timeout, 60); |
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watchdog.minutes_mode = true; |
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} else { |
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watchdog.timer_val = timeout; |
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watchdog.minutes_mode = false; |
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} |
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mutex_unlock(&watchdog.lock); |
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return 0; |
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} |
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static int watchdog_set_pulse_width(unsigned int pw) |
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{ |
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int err = 0; |
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unsigned int t1 = 25, t2 = 125, t3 = 5000; |
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if (watchdog.type == f71868) { |
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t1 = 30; |
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t2 = 150; |
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t3 = 6000; |
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} |
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mutex_lock(&watchdog.lock); |
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if (pw <= 1) { |
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watchdog.pulse_val = 0; |
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} else if (pw <= t1) { |
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watchdog.pulse_val = 1; |
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} else if (pw <= t2) { |
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watchdog.pulse_val = 2; |
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} else if (pw <= t3) { |
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watchdog.pulse_val = 3; |
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} else { |
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pr_err("pulse width out of range\n"); |
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err = -EINVAL; |
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goto exit_unlock; |
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} |
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watchdog.pulse_mode = pw; |
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exit_unlock: |
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mutex_unlock(&watchdog.lock); |
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return err; |
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} |
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static int watchdog_keepalive(void) |
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{ |
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int err = 0; |
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mutex_lock(&watchdog.lock); |
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err = superio_enter(watchdog.sioaddr); |
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if (err) |
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goto exit_unlock; |
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superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); |
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if (watchdog.minutes_mode) |
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/* select minutes for timer units */ |
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superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, |
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F71808FG_FLAG_WD_UNIT); |
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else |
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/* select seconds for timer units */ |
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superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, |
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F71808FG_FLAG_WD_UNIT); |
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/* Set timer value */ |
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superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME, |
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watchdog.timer_val); |
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superio_exit(watchdog.sioaddr); |
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exit_unlock: |
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mutex_unlock(&watchdog.lock); |
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return err; |
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} |
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static int watchdog_start(void) |
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{ |
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int err; |
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u8 tmp; |
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/* Make sure we don't die as soon as the watchdog is enabled below */ |
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err = watchdog_keepalive(); |
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if (err) |
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return err; |
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mutex_lock(&watchdog.lock); |
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err = superio_enter(watchdog.sioaddr); |
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if (err) |
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goto exit_unlock; |
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superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); |
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/* Watchdog pin configuration */ |
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switch (watchdog.type) { |
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case f71808fg: |
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/* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */ |
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superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3); |
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superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3); |
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break; |
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case f71862fg: |
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if (f71862fg_pin == 63) { |
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/* SPI must be disabled first to use this pin! */ |
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superio_clear_bit(watchdog.sioaddr, SIO_REG_ROM_ADDR_SEL, 6); |
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superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 4); |
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} else if (f71862fg_pin == 56) { |
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superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1); |
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} |
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break; |
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case f71868: |
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case f71869: |
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/* GPIO14 --> WDTRST# */ |
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superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4); |
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break; |
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case f71882fg: |
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/* Set pin 56 to WDTRST# */ |
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superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1); |
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break; |
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case f71889fg: |
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/* set pin 40 to WDTRST# */ |
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superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3, |
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superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf); |
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break; |
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case f81803: |
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/* Enable TSI Level register bank */ |
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superio_clear_bit(watchdog.sioaddr, SIO_REG_CLOCK_SEL, 3); |
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/* Set pin 27 to WDTRST# */ |
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superio_outb(watchdog.sioaddr, SIO_REG_TSI_LEVEL_SEL, 0x5f & |
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superio_inb(watchdog.sioaddr, SIO_REG_TSI_LEVEL_SEL)); |
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break; |
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case f81865: |
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/* Set pin 70 to WDTRST# */ |
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superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 5); |
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break; |
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case f81866: |
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/* |
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* GPIO1 Control Register when 27h BIT3:2 = 01 & BIT0 = 0. |
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* The PIN 70(GPIO15/WDTRST) is controlled by 2Ch: |
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* BIT5: 0 -> WDTRST# |
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* 1 -> GPIO15 |
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*/ |
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tmp = superio_inb(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL); |
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tmp &= ~(BIT(3) | BIT(0)); |
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tmp |= BIT(2); |
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superio_outb(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, tmp); |
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superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1, 5); |
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break; |
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default: |
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/* |
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* 'default' label to shut up the compiler and catch |
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* programmer errors |
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*/ |
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err = -ENODEV; |
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goto exit_superio; |
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} |
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superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); |
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superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0); |
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if (watchdog.type == f81865 || watchdog.type == f81866) |
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superio_set_bit(watchdog.sioaddr, F81865_REG_WDO_CONF, |
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F81865_FLAG_WDOUT_EN); |
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else |
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superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF, |
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F71808FG_FLAG_WDOUT_EN); |
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superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, |
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F71808FG_FLAG_WD_EN); |
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if (watchdog.pulse_mode) { |
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/* Select "pulse" output mode with given duration */ |
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u8 wdt_conf = superio_inb(watchdog.sioaddr, |
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F71808FG_REG_WDT_CONF); |
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/* Set WD_PSWIDTH bits (1:0) */ |
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wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03); |
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/* Set WD_PULSE to "pulse" mode */ |
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wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE); |
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superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF, |
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wdt_conf); |
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} else { |
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/* Select "level" output mode */ |
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superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, |
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F71808FG_FLAG_WD_PULSE); |
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} |
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exit_superio: |
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superio_exit(watchdog.sioaddr); |
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exit_unlock: |
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mutex_unlock(&watchdog.lock); |
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return err; |
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} |
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static int watchdog_stop(void) |
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{ |
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int err = 0; |
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mutex_lock(&watchdog.lock); |
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err = superio_enter(watchdog.sioaddr); |
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if (err) |
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goto exit_unlock; |
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superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); |
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superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, |
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F71808FG_FLAG_WD_EN); |
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superio_exit(watchdog.sioaddr); |
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exit_unlock: |
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mutex_unlock(&watchdog.lock); |
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return err; |
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} |
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static int watchdog_get_status(void) |
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{ |
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int status = 0; |
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mutex_lock(&watchdog.lock); |
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status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0; |
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mutex_unlock(&watchdog.lock); |
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return status; |
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} |
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static bool watchdog_is_running(void) |
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{ |
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/* |
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* if we fail to determine the watchdog's status assume it to be |
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* running to be on the safe side |
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*/ |
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bool is_running = true; |
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mutex_lock(&watchdog.lock); |
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if (superio_enter(watchdog.sioaddr)) |
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goto exit_unlock; |
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superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); |
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is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0)) |
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&& (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF) |
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& BIT(F71808FG_FLAG_WD_EN)); |
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superio_exit(watchdog.sioaddr); |
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exit_unlock: |
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mutex_unlock(&watchdog.lock); |
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return is_running; |
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} |
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/* /dev/watchdog api */ |
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static int watchdog_open(struct inode *inode, struct file *file) |
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{ |
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int err; |
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/* If the watchdog is alive we don't need to start it again */ |
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if (test_and_set_bit(0, &watchdog.opened)) |
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return -EBUSY; |
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err = watchdog_start(); |
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if (err) { |
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clear_bit(0, &watchdog.opened); |
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return err; |
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} |
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if (nowayout) |
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__module_get(THIS_MODULE); |
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watchdog.expect_close = 0; |
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return stream_open(inode, file); |
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} |
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static int watchdog_release(struct inode *inode, struct file *file) |
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{ |
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clear_bit(0, &watchdog.opened); |
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if (!watchdog.expect_close) { |
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watchdog_keepalive(); |
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pr_crit("Unexpected close, not stopping watchdog!\n"); |
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} else if (!nowayout) { |
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watchdog_stop(); |
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} |
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return 0; |
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} |
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/* |
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* watchdog_write: |
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* @file: file handle to the watchdog |
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* @buf: buffer to write |
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* @count: count of bytes |
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* @ppos: pointer to the position to write. No seeks allowed |
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* |
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* A write to a watchdog device is defined as a keepalive signal. Any |
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* write of data will do, as we we don't define content meaning. |
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*/ |
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static ssize_t watchdog_write(struct file *file, const char __user *buf, |
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size_t count, loff_t *ppos) |
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{ |
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if (count) { |
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if (!nowayout) { |
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size_t i; |
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|
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/* In case it was set long ago */ |
|
bool expect_close = false; |
|
|
|
for (i = 0; i != count; i++) { |
|
char c; |
|
if (get_user(c, buf + i)) |
|
return -EFAULT; |
|
if (c == 'V') |
|
expect_close = true; |
|
} |
|
|
|
/* Properly order writes across fork()ed processes */ |
|
mutex_lock(&watchdog.lock); |
|
watchdog.expect_close = expect_close; |
|
mutex_unlock(&watchdog.lock); |
|
} |
|
|
|
/* someone wrote to us, we should restart timer */ |
|
watchdog_keepalive(); |
|
} |
|
return count; |
|
} |
|
|
|
/* |
|
* watchdog_ioctl: |
|
* @inode: inode of the device |
|
* @file: file handle to the device |
|
* @cmd: watchdog command |
|
* @arg: argument pointer |
|
* |
|
* The watchdog API defines a common set of functions for all watchdogs |
|
* according to their available features. |
|
*/ |
|
static long watchdog_ioctl(struct file *file, unsigned int cmd, |
|
unsigned long arg) |
|
{ |
|
int status; |
|
int new_options; |
|
int new_timeout; |
|
union { |
|
struct watchdog_info __user *ident; |
|
int __user *i; |
|
} uarg; |
|
|
|
uarg.i = (int __user *)arg; |
|
|
|
switch (cmd) { |
|
case WDIOC_GETSUPPORT: |
|
return copy_to_user(uarg.ident, &watchdog.ident, |
|
sizeof(watchdog.ident)) ? -EFAULT : 0; |
|
|
|
case WDIOC_GETSTATUS: |
|
status = watchdog_get_status(); |
|
if (status < 0) |
|
return status; |
|
return put_user(status, uarg.i); |
|
|
|
case WDIOC_GETBOOTSTATUS: |
|
return put_user(0, uarg.i); |
|
|
|
case WDIOC_SETOPTIONS: |
|
if (get_user(new_options, uarg.i)) |
|
return -EFAULT; |
|
|
|
if (new_options & WDIOS_DISABLECARD) |
|
watchdog_stop(); |
|
|
|
if (new_options & WDIOS_ENABLECARD) |
|
return watchdog_start(); |
|
fallthrough; |
|
|
|
case WDIOC_KEEPALIVE: |
|
watchdog_keepalive(); |
|
return 0; |
|
|
|
case WDIOC_SETTIMEOUT: |
|
if (get_user(new_timeout, uarg.i)) |
|
return -EFAULT; |
|
|
|
if (watchdog_set_timeout(new_timeout)) |
|
return -EINVAL; |
|
|
|
watchdog_keepalive(); |
|
fallthrough; |
|
|
|
case WDIOC_GETTIMEOUT: |
|
return put_user(watchdog.timeout, uarg.i); |
|
|
|
default: |
|
return -ENOTTY; |
|
|
|
} |
|
} |
|
|
|
static int watchdog_notify_sys(struct notifier_block *this, unsigned long code, |
|
void *unused) |
|
{ |
|
if (code == SYS_DOWN || code == SYS_HALT) |
|
watchdog_stop(); |
|
return NOTIFY_DONE; |
|
} |
|
|
|
static const struct file_operations watchdog_fops = { |
|
.owner = THIS_MODULE, |
|
.llseek = no_llseek, |
|
.open = watchdog_open, |
|
.release = watchdog_release, |
|
.write = watchdog_write, |
|
.unlocked_ioctl = watchdog_ioctl, |
|
.compat_ioctl = compat_ptr_ioctl, |
|
}; |
|
|
|
static struct miscdevice watchdog_miscdev = { |
|
.minor = WATCHDOG_MINOR, |
|
.name = "watchdog", |
|
.fops = &watchdog_fops, |
|
}; |
|
|
|
static struct notifier_block watchdog_notifier = { |
|
.notifier_call = watchdog_notify_sys, |
|
}; |
|
|
|
static int __init watchdog_init(int sioaddr) |
|
{ |
|
int wdt_conf, err = 0; |
|
|
|
/* No need to lock watchdog.lock here because no entry points |
|
* into the module have been registered yet. |
|
*/ |
|
watchdog.sioaddr = sioaddr; |
|
watchdog.ident.options = WDIOF_MAGICCLOSE |
|
| WDIOF_KEEPALIVEPING |
|
| WDIOF_CARDRESET; |
|
|
|
snprintf(watchdog.ident.identity, |
|
sizeof(watchdog.ident.identity), "%s watchdog", |
|
f71808e_names[watchdog.type]); |
|
|
|
err = superio_enter(sioaddr); |
|
if (err) |
|
return err; |
|
superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); |
|
|
|
wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF); |
|
watchdog.caused_reboot = wdt_conf & BIT(F71808FG_FLAG_WDTMOUT_STS); |
|
|
|
/* |
|
* We don't want WDTMOUT_STS to stick around till regular reboot. |
|
* Write 1 to the bit to clear it to zero. |
|
*/ |
|
superio_outb(sioaddr, F71808FG_REG_WDT_CONF, |
|
wdt_conf | BIT(F71808FG_FLAG_WDTMOUT_STS)); |
|
|
|
superio_exit(sioaddr); |
|
|
|
err = watchdog_set_timeout(timeout); |
|
if (err) |
|
return err; |
|
err = watchdog_set_pulse_width(pulse_width); |
|
if (err) |
|
return err; |
|
|
|
err = register_reboot_notifier(&watchdog_notifier); |
|
if (err) |
|
return err; |
|
|
|
err = misc_register(&watchdog_miscdev); |
|
if (err) { |
|
pr_err("cannot register miscdev on minor=%d\n", |
|
watchdog_miscdev.minor); |
|
goto exit_reboot; |
|
} |
|
|
|
if (start_withtimeout) { |
|
if (start_withtimeout <= 0 |
|
|| start_withtimeout > max_timeout) { |
|
pr_err("starting timeout out of range\n"); |
|
err = -EINVAL; |
|
goto exit_miscdev; |
|
} |
|
|
|
err = watchdog_start(); |
|
if (err) { |
|
pr_err("cannot start watchdog timer\n"); |
|
goto exit_miscdev; |
|
} |
|
|
|
mutex_lock(&watchdog.lock); |
|
err = superio_enter(sioaddr); |
|
if (err) |
|
goto exit_unlock; |
|
superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); |
|
|
|
if (start_withtimeout > 0xff) { |
|
/* select minutes for timer units */ |
|
superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF, |
|
F71808FG_FLAG_WD_UNIT); |
|
superio_outb(sioaddr, F71808FG_REG_WD_TIME, |
|
DIV_ROUND_UP(start_withtimeout, 60)); |
|
} else { |
|
/* select seconds for timer units */ |
|
superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF, |
|
F71808FG_FLAG_WD_UNIT); |
|
superio_outb(sioaddr, F71808FG_REG_WD_TIME, |
|
start_withtimeout); |
|
} |
|
|
|
superio_exit(sioaddr); |
|
mutex_unlock(&watchdog.lock); |
|
|
|
if (nowayout) |
|
__module_get(THIS_MODULE); |
|
|
|
pr_info("watchdog started with initial timeout of %u sec\n", |
|
start_withtimeout); |
|
} |
|
|
|
return 0; |
|
|
|
exit_unlock: |
|
mutex_unlock(&watchdog.lock); |
|
exit_miscdev: |
|
misc_deregister(&watchdog_miscdev); |
|
exit_reboot: |
|
unregister_reboot_notifier(&watchdog_notifier); |
|
|
|
return err; |
|
} |
|
|
|
static int __init f71808e_find(int sioaddr) |
|
{ |
|
u16 devid; |
|
int err = superio_enter(sioaddr); |
|
if (err) |
|
return err; |
|
|
|
devid = superio_inw(sioaddr, SIO_REG_MANID); |
|
if (devid != SIO_FINTEK_ID) { |
|
pr_debug("Not a Fintek device\n"); |
|
err = -ENODEV; |
|
goto exit; |
|
} |
|
|
|
devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID); |
|
switch (devid) { |
|
case SIO_F71808_ID: |
|
watchdog.type = f71808fg; |
|
break; |
|
case SIO_F71862_ID: |
|
watchdog.type = f71862fg; |
|
break; |
|
case SIO_F71868_ID: |
|
watchdog.type = f71868; |
|
break; |
|
case SIO_F71869_ID: |
|
case SIO_F71869A_ID: |
|
watchdog.type = f71869; |
|
break; |
|
case SIO_F71882_ID: |
|
watchdog.type = f71882fg; |
|
break; |
|
case SIO_F71889_ID: |
|
watchdog.type = f71889fg; |
|
break; |
|
case SIO_F71858_ID: |
|
/* Confirmed (by datasheet) not to have a watchdog. */ |
|
err = -ENODEV; |
|
goto exit; |
|
case SIO_F81803_ID: |
|
watchdog.type = f81803; |
|
break; |
|
case SIO_F81865_ID: |
|
watchdog.type = f81865; |
|
break; |
|
case SIO_F81866_ID: |
|
watchdog.type = f81866; |
|
break; |
|
default: |
|
pr_info("Unrecognized Fintek device: %04x\n", |
|
(unsigned int)devid); |
|
err = -ENODEV; |
|
goto exit; |
|
} |
|
|
|
pr_info("Found %s watchdog chip, revision %d\n", |
|
f71808e_names[watchdog.type], |
|
(int)superio_inb(sioaddr, SIO_REG_DEVREV)); |
|
exit: |
|
superio_exit(sioaddr); |
|
return err; |
|
} |
|
|
|
static int __init f71808e_init(void) |
|
{ |
|
static const unsigned short addrs[] = { 0x2e, 0x4e }; |
|
int err = -ENODEV; |
|
int i; |
|
|
|
if (f71862fg_pin != 63 && f71862fg_pin != 56) { |
|
pr_err("Invalid argument f71862fg_pin=%d\n", f71862fg_pin); |
|
return -EINVAL; |
|
} |
|
|
|
for (i = 0; i < ARRAY_SIZE(addrs); i++) { |
|
err = f71808e_find(addrs[i]); |
|
if (err == 0) |
|
break; |
|
} |
|
if (i == ARRAY_SIZE(addrs)) |
|
return err; |
|
|
|
return watchdog_init(addrs[i]); |
|
} |
|
|
|
static void __exit f71808e_exit(void) |
|
{ |
|
if (watchdog_is_running()) { |
|
pr_warn("Watchdog timer still running, stopping it\n"); |
|
watchdog_stop(); |
|
} |
|
misc_deregister(&watchdog_miscdev); |
|
unregister_reboot_notifier(&watchdog_notifier); |
|
} |
|
|
|
MODULE_DESCRIPTION("F71808E Watchdog Driver"); |
|
MODULE_AUTHOR("Giel van Schijndel <[email protected]>"); |
|
MODULE_LICENSE("GPL"); |
|
|
|
module_init(f71808e_init); |
|
module_exit(f71808e_exit);
|
|
|