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745 lines
18 KiB
745 lines
18 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (C) 2010 Alexey Charkov <[email protected]> |
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* |
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* Based on msm_serial.c, which is: |
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* Copyright (C) 2007 Google, Inc. |
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* Author: Robert Love <[email protected]> |
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*/ |
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|
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#include <linux/hrtimer.h> |
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#include <linux/delay.h> |
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#include <linux/io.h> |
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#include <linux/ioport.h> |
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#include <linux/irq.h> |
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#include <linux/init.h> |
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#include <linux/console.h> |
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#include <linux/tty.h> |
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#include <linux/tty_flip.h> |
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#include <linux/serial_core.h> |
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#include <linux/serial.h> |
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#include <linux/slab.h> |
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#include <linux/clk.h> |
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#include <linux/of.h> |
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#include <linux/of_device.h> |
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#include <linux/err.h> |
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/* |
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* UART Register offsets |
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*/ |
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#define VT8500_URTDR 0x0000 /* Transmit data */ |
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#define VT8500_URRDR 0x0004 /* Receive data */ |
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#define VT8500_URDIV 0x0008 /* Clock/Baud rate divisor */ |
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#define VT8500_URLCR 0x000C /* Line control */ |
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#define VT8500_URICR 0x0010 /* IrDA control */ |
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#define VT8500_URIER 0x0014 /* Interrupt enable */ |
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#define VT8500_URISR 0x0018 /* Interrupt status */ |
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#define VT8500_URUSR 0x001c /* UART status */ |
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#define VT8500_URFCR 0x0020 /* FIFO control */ |
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#define VT8500_URFIDX 0x0024 /* FIFO index */ |
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#define VT8500_URBKR 0x0028 /* Break signal count */ |
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#define VT8500_URTOD 0x002c /* Time out divisor */ |
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#define VT8500_TXFIFO 0x1000 /* Transmit FIFO (16x8) */ |
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#define VT8500_RXFIFO 0x1020 /* Receive FIFO (16x10) */ |
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/* |
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* Interrupt enable and status bits |
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*/ |
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#define TXDE (1 << 0) /* Tx Data empty */ |
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#define RXDF (1 << 1) /* Rx Data full */ |
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#define TXFAE (1 << 2) /* Tx FIFO almost empty */ |
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#define TXFE (1 << 3) /* Tx FIFO empty */ |
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#define RXFAF (1 << 4) /* Rx FIFO almost full */ |
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#define RXFF (1 << 5) /* Rx FIFO full */ |
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#define TXUDR (1 << 6) /* Tx underrun */ |
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#define RXOVER (1 << 7) /* Rx overrun */ |
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#define PER (1 << 8) /* Parity error */ |
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#define FER (1 << 9) /* Frame error */ |
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#define TCTS (1 << 10) /* Toggle of CTS */ |
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#define RXTOUT (1 << 11) /* Rx timeout */ |
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#define BKDONE (1 << 12) /* Break signal done */ |
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#define ERR (1 << 13) /* AHB error response */ |
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#define RX_FIFO_INTS (RXFAF | RXFF | RXOVER | PER | FER | RXTOUT) |
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#define TX_FIFO_INTS (TXFAE | TXFE | TXUDR) |
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/* |
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* Line control bits |
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*/ |
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#define VT8500_TXEN (1 << 0) /* Enable transmit logic */ |
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#define VT8500_RXEN (1 << 1) /* Enable receive logic */ |
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#define VT8500_CS8 (1 << 2) /* 8-bit data length (vs. 7-bit) */ |
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#define VT8500_CSTOPB (1 << 3) /* 2 stop bits (vs. 1) */ |
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#define VT8500_PARENB (1 << 4) /* Enable parity */ |
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#define VT8500_PARODD (1 << 5) /* Odd parity (vs. even) */ |
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#define VT8500_RTS (1 << 6) /* Ready to send */ |
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#define VT8500_LOOPBK (1 << 7) /* Enable internal loopback */ |
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#define VT8500_DMA (1 << 8) /* Enable DMA mode (needs FIFO) */ |
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#define VT8500_BREAK (1 << 9) /* Initiate break signal */ |
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#define VT8500_PSLVERR (1 << 10) /* APB error upon empty RX FIFO read */ |
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#define VT8500_SWRTSCTS (1 << 11) /* Software-controlled RTS/CTS */ |
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/* |
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* Capability flags (driver-internal) |
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*/ |
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#define VT8500_HAS_SWRTSCTS_SWITCH (1 << 1) |
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#define VT8500_RECOMMENDED_CLK 12000000 |
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#define VT8500_OVERSAMPLING_DIVISOR 13 |
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#define VT8500_MAX_PORTS 6 |
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struct vt8500_port { |
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struct uart_port uart; |
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char name[16]; |
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struct clk *clk; |
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unsigned int clk_predivisor; |
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unsigned int ier; |
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unsigned int vt8500_uart_flags; |
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}; |
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/* |
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* we use this variable to keep track of which ports |
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* have been allocated as we can't use pdev->id in |
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* devicetree |
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*/ |
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static DECLARE_BITMAP(vt8500_ports_in_use, VT8500_MAX_PORTS); |
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static inline void vt8500_write(struct uart_port *port, unsigned int val, |
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unsigned int off) |
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{ |
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writel(val, port->membase + off); |
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} |
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static inline unsigned int vt8500_read(struct uart_port *port, unsigned int off) |
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{ |
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return readl(port->membase + off); |
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} |
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static void vt8500_stop_tx(struct uart_port *port) |
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{ |
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struct vt8500_port *vt8500_port = container_of(port, |
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struct vt8500_port, |
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uart); |
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vt8500_port->ier &= ~TX_FIFO_INTS; |
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vt8500_write(port, vt8500_port->ier, VT8500_URIER); |
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} |
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static void vt8500_stop_rx(struct uart_port *port) |
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{ |
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struct vt8500_port *vt8500_port = container_of(port, |
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struct vt8500_port, |
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uart); |
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vt8500_port->ier &= ~RX_FIFO_INTS; |
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vt8500_write(port, vt8500_port->ier, VT8500_URIER); |
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} |
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static void vt8500_enable_ms(struct uart_port *port) |
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{ |
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struct vt8500_port *vt8500_port = container_of(port, |
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struct vt8500_port, |
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uart); |
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vt8500_port->ier |= TCTS; |
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vt8500_write(port, vt8500_port->ier, VT8500_URIER); |
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} |
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static void handle_rx(struct uart_port *port) |
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{ |
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struct tty_port *tport = &port->state->port; |
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/* |
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* Handle overrun |
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*/ |
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if ((vt8500_read(port, VT8500_URISR) & RXOVER)) { |
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port->icount.overrun++; |
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tty_insert_flip_char(tport, 0, TTY_OVERRUN); |
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} |
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/* and now the main RX loop */ |
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while (vt8500_read(port, VT8500_URFIDX) & 0x1f00) { |
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unsigned int c; |
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char flag = TTY_NORMAL; |
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c = readw(port->membase + VT8500_RXFIFO) & 0x3ff; |
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/* Mask conditions we're ignorning. */ |
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c &= ~port->read_status_mask; |
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if (c & FER) { |
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port->icount.frame++; |
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flag = TTY_FRAME; |
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} else if (c & PER) { |
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port->icount.parity++; |
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flag = TTY_PARITY; |
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} |
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port->icount.rx++; |
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if (!uart_handle_sysrq_char(port, c)) |
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tty_insert_flip_char(tport, c, flag); |
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} |
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spin_unlock(&port->lock); |
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tty_flip_buffer_push(tport); |
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spin_lock(&port->lock); |
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} |
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static void handle_tx(struct uart_port *port) |
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{ |
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struct circ_buf *xmit = &port->state->xmit; |
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if (port->x_char) { |
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writeb(port->x_char, port->membase + VT8500_TXFIFO); |
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port->icount.tx++; |
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port->x_char = 0; |
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} |
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if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
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vt8500_stop_tx(port); |
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return; |
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} |
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while ((vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16) { |
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if (uart_circ_empty(xmit)) |
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break; |
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writeb(xmit->buf[xmit->tail], port->membase + VT8500_TXFIFO); |
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
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port->icount.tx++; |
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} |
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
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uart_write_wakeup(port); |
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if (uart_circ_empty(xmit)) |
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vt8500_stop_tx(port); |
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} |
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static void vt8500_start_tx(struct uart_port *port) |
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{ |
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struct vt8500_port *vt8500_port = container_of(port, |
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struct vt8500_port, |
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uart); |
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vt8500_port->ier &= ~TX_FIFO_INTS; |
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vt8500_write(port, vt8500_port->ier, VT8500_URIER); |
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handle_tx(port); |
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vt8500_port->ier |= TX_FIFO_INTS; |
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vt8500_write(port, vt8500_port->ier, VT8500_URIER); |
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} |
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static void handle_delta_cts(struct uart_port *port) |
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{ |
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port->icount.cts++; |
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wake_up_interruptible(&port->state->port.delta_msr_wait); |
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} |
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static irqreturn_t vt8500_irq(int irq, void *dev_id) |
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{ |
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struct uart_port *port = dev_id; |
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unsigned long isr; |
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spin_lock(&port->lock); |
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isr = vt8500_read(port, VT8500_URISR); |
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/* Acknowledge active status bits */ |
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vt8500_write(port, isr, VT8500_URISR); |
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if (isr & RX_FIFO_INTS) |
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handle_rx(port); |
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if (isr & TX_FIFO_INTS) |
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handle_tx(port); |
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if (isr & TCTS) |
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handle_delta_cts(port); |
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spin_unlock(&port->lock); |
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return IRQ_HANDLED; |
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} |
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static unsigned int vt8500_tx_empty(struct uart_port *port) |
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{ |
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return (vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16 ? |
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TIOCSER_TEMT : 0; |
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} |
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static unsigned int vt8500_get_mctrl(struct uart_port *port) |
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{ |
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unsigned int usr; |
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usr = vt8500_read(port, VT8500_URUSR); |
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if (usr & (1 << 4)) |
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return TIOCM_CTS; |
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else |
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return 0; |
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} |
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static void vt8500_set_mctrl(struct uart_port *port, unsigned int mctrl) |
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{ |
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unsigned int lcr = vt8500_read(port, VT8500_URLCR); |
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if (mctrl & TIOCM_RTS) |
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lcr |= VT8500_RTS; |
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else |
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lcr &= ~VT8500_RTS; |
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vt8500_write(port, lcr, VT8500_URLCR); |
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} |
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static void vt8500_break_ctl(struct uart_port *port, int break_ctl) |
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{ |
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if (break_ctl) |
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vt8500_write(port, |
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vt8500_read(port, VT8500_URLCR) | VT8500_BREAK, |
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VT8500_URLCR); |
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} |
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static int vt8500_set_baud_rate(struct uart_port *port, unsigned int baud) |
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{ |
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struct vt8500_port *vt8500_port = |
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container_of(port, struct vt8500_port, uart); |
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unsigned long div; |
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unsigned int loops = 1000; |
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div = ((vt8500_port->clk_predivisor - 1) & 0xf) << 16; |
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div |= (uart_get_divisor(port, baud) - 1) & 0x3ff; |
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/* Effective baud rate */ |
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baud = port->uartclk / 16 / ((div & 0x3ff) + 1); |
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while ((vt8500_read(port, VT8500_URUSR) & (1 << 5)) && --loops) |
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cpu_relax(); |
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vt8500_write(port, div, VT8500_URDIV); |
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/* Break signal timing depends on baud rate, update accordingly */ |
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vt8500_write(port, mult_frac(baud, 4096, 1000000), VT8500_URBKR); |
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return baud; |
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} |
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static int vt8500_startup(struct uart_port *port) |
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{ |
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struct vt8500_port *vt8500_port = |
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container_of(port, struct vt8500_port, uart); |
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int ret; |
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snprintf(vt8500_port->name, sizeof(vt8500_port->name), |
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"vt8500_serial%d", port->line); |
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ret = request_irq(port->irq, vt8500_irq, IRQF_TRIGGER_HIGH, |
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vt8500_port->name, port); |
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if (unlikely(ret)) |
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return ret; |
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vt8500_write(port, 0x03, VT8500_URLCR); /* enable TX & RX */ |
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return 0; |
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} |
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static void vt8500_shutdown(struct uart_port *port) |
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{ |
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struct vt8500_port *vt8500_port = |
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container_of(port, struct vt8500_port, uart); |
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vt8500_port->ier = 0; |
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/* disable interrupts and FIFOs */ |
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vt8500_write(&vt8500_port->uart, 0, VT8500_URIER); |
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vt8500_write(&vt8500_port->uart, 0x880, VT8500_URFCR); |
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free_irq(port->irq, port); |
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} |
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static void vt8500_set_termios(struct uart_port *port, |
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struct ktermios *termios, |
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struct ktermios *old) |
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{ |
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struct vt8500_port *vt8500_port = |
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container_of(port, struct vt8500_port, uart); |
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unsigned long flags; |
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unsigned int baud, lcr; |
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unsigned int loops = 1000; |
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spin_lock_irqsave(&port->lock, flags); |
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/* calculate and set baud rate */ |
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baud = uart_get_baud_rate(port, termios, old, 900, 921600); |
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baud = vt8500_set_baud_rate(port, baud); |
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if (tty_termios_baud_rate(termios)) |
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tty_termios_encode_baud_rate(termios, baud, baud); |
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/* calculate parity */ |
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lcr = vt8500_read(&vt8500_port->uart, VT8500_URLCR); |
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lcr &= ~(VT8500_PARENB | VT8500_PARODD); |
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if (termios->c_cflag & PARENB) { |
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lcr |= VT8500_PARENB; |
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termios->c_cflag &= ~CMSPAR; |
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if (termios->c_cflag & PARODD) |
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lcr |= VT8500_PARODD; |
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} |
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/* calculate bits per char */ |
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lcr &= ~VT8500_CS8; |
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switch (termios->c_cflag & CSIZE) { |
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case CS7: |
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break; |
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case CS8: |
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default: |
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lcr |= VT8500_CS8; |
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termios->c_cflag &= ~CSIZE; |
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termios->c_cflag |= CS8; |
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break; |
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} |
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/* calculate stop bits */ |
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lcr &= ~VT8500_CSTOPB; |
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if (termios->c_cflag & CSTOPB) |
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lcr |= VT8500_CSTOPB; |
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lcr &= ~VT8500_SWRTSCTS; |
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if (vt8500_port->vt8500_uart_flags & VT8500_HAS_SWRTSCTS_SWITCH) |
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lcr |= VT8500_SWRTSCTS; |
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/* set parity, bits per char, and stop bit */ |
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vt8500_write(&vt8500_port->uart, lcr, VT8500_URLCR); |
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/* Configure status bits to ignore based on termio flags. */ |
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port->read_status_mask = 0; |
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if (termios->c_iflag & IGNPAR) |
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port->read_status_mask = FER | PER; |
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uart_update_timeout(port, termios->c_cflag, baud); |
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/* Reset FIFOs */ |
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vt8500_write(&vt8500_port->uart, 0x88c, VT8500_URFCR); |
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while ((vt8500_read(&vt8500_port->uart, VT8500_URFCR) & 0xc) |
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&& --loops) |
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cpu_relax(); |
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/* Every possible FIFO-related interrupt */ |
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vt8500_port->ier = RX_FIFO_INTS | TX_FIFO_INTS; |
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/* |
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* CTS flow control |
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*/ |
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if (UART_ENABLE_MS(&vt8500_port->uart, termios->c_cflag)) |
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vt8500_port->ier |= TCTS; |
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vt8500_write(&vt8500_port->uart, 0x881, VT8500_URFCR); |
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vt8500_write(&vt8500_port->uart, vt8500_port->ier, VT8500_URIER); |
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spin_unlock_irqrestore(&port->lock, flags); |
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} |
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static const char *vt8500_type(struct uart_port *port) |
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{ |
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struct vt8500_port *vt8500_port = |
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container_of(port, struct vt8500_port, uart); |
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return vt8500_port->name; |
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} |
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static void vt8500_release_port(struct uart_port *port) |
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{ |
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} |
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static int vt8500_request_port(struct uart_port *port) |
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{ |
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return 0; |
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} |
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static void vt8500_config_port(struct uart_port *port, int flags) |
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{ |
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port->type = PORT_VT8500; |
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} |
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static int vt8500_verify_port(struct uart_port *port, |
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struct serial_struct *ser) |
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{ |
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if (unlikely(ser->type != PORT_UNKNOWN && ser->type != PORT_VT8500)) |
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return -EINVAL; |
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if (unlikely(port->irq != ser->irq)) |
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return -EINVAL; |
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return 0; |
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} |
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static struct vt8500_port *vt8500_uart_ports[VT8500_MAX_PORTS]; |
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static struct uart_driver vt8500_uart_driver; |
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#ifdef CONFIG_SERIAL_VT8500_CONSOLE |
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static void wait_for_xmitr(struct uart_port *port) |
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{ |
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unsigned int status, tmout = 10000; |
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/* Wait up to 10ms for the character(s) to be sent. */ |
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do { |
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status = vt8500_read(port, VT8500_URFIDX); |
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if (--tmout == 0) |
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break; |
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udelay(1); |
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} while (status & 0x10); |
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} |
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static void vt8500_console_putchar(struct uart_port *port, int c) |
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{ |
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wait_for_xmitr(port); |
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writeb(c, port->membase + VT8500_TXFIFO); |
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} |
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static void vt8500_console_write(struct console *co, const char *s, |
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unsigned int count) |
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{ |
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struct vt8500_port *vt8500_port = vt8500_uart_ports[co->index]; |
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unsigned long ier; |
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BUG_ON(co->index < 0 || co->index >= vt8500_uart_driver.nr); |
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ier = vt8500_read(&vt8500_port->uart, VT8500_URIER); |
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vt8500_write(&vt8500_port->uart, VT8500_URIER, 0); |
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uart_console_write(&vt8500_port->uart, s, count, |
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vt8500_console_putchar); |
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/* |
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* Finally, wait for transmitter to become empty |
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* and switch back to FIFO |
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*/ |
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wait_for_xmitr(&vt8500_port->uart); |
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vt8500_write(&vt8500_port->uart, VT8500_URIER, ier); |
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} |
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static int __init vt8500_console_setup(struct console *co, char *options) |
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{ |
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struct vt8500_port *vt8500_port; |
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int baud = 9600; |
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int bits = 8; |
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int parity = 'n'; |
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int flow = 'n'; |
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if (unlikely(co->index >= vt8500_uart_driver.nr || co->index < 0)) |
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return -ENXIO; |
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vt8500_port = vt8500_uart_ports[co->index]; |
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if (!vt8500_port) |
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return -ENODEV; |
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if (options) |
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uart_parse_options(options, &baud, &parity, &bits, &flow); |
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return uart_set_options(&vt8500_port->uart, |
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co, baud, parity, bits, flow); |
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} |
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|
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static struct console vt8500_console = { |
|
.name = "ttyWMT", |
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.write = vt8500_console_write, |
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.device = uart_console_device, |
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.setup = vt8500_console_setup, |
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.flags = CON_PRINTBUFFER, |
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.index = -1, |
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.data = &vt8500_uart_driver, |
|
}; |
|
|
|
#define VT8500_CONSOLE (&vt8500_console) |
|
|
|
#else |
|
#define VT8500_CONSOLE NULL |
|
#endif |
|
|
|
#ifdef CONFIG_CONSOLE_POLL |
|
static int vt8500_get_poll_char(struct uart_port *port) |
|
{ |
|
unsigned int status = vt8500_read(port, VT8500_URFIDX); |
|
|
|
if (!(status & 0x1f00)) |
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return NO_POLL_CHAR; |
|
|
|
return vt8500_read(port, VT8500_RXFIFO) & 0xff; |
|
} |
|
|
|
static void vt8500_put_poll_char(struct uart_port *port, unsigned char c) |
|
{ |
|
unsigned int status, tmout = 10000; |
|
|
|
do { |
|
status = vt8500_read(port, VT8500_URFIDX); |
|
|
|
if (--tmout == 0) |
|
break; |
|
udelay(1); |
|
} while (status & 0x10); |
|
|
|
vt8500_write(port, c, VT8500_TXFIFO); |
|
} |
|
#endif |
|
|
|
static const struct uart_ops vt8500_uart_pops = { |
|
.tx_empty = vt8500_tx_empty, |
|
.set_mctrl = vt8500_set_mctrl, |
|
.get_mctrl = vt8500_get_mctrl, |
|
.stop_tx = vt8500_stop_tx, |
|
.start_tx = vt8500_start_tx, |
|
.stop_rx = vt8500_stop_rx, |
|
.enable_ms = vt8500_enable_ms, |
|
.break_ctl = vt8500_break_ctl, |
|
.startup = vt8500_startup, |
|
.shutdown = vt8500_shutdown, |
|
.set_termios = vt8500_set_termios, |
|
.type = vt8500_type, |
|
.release_port = vt8500_release_port, |
|
.request_port = vt8500_request_port, |
|
.config_port = vt8500_config_port, |
|
.verify_port = vt8500_verify_port, |
|
#ifdef CONFIG_CONSOLE_POLL |
|
.poll_get_char = vt8500_get_poll_char, |
|
.poll_put_char = vt8500_put_poll_char, |
|
#endif |
|
}; |
|
|
|
static struct uart_driver vt8500_uart_driver = { |
|
.owner = THIS_MODULE, |
|
.driver_name = "vt8500_serial", |
|
.dev_name = "ttyWMT", |
|
.nr = 6, |
|
.cons = VT8500_CONSOLE, |
|
}; |
|
|
|
static unsigned int vt8500_flags; /* none required so far */ |
|
static unsigned int wm8880_flags = VT8500_HAS_SWRTSCTS_SWITCH; |
|
|
|
static const struct of_device_id wmt_dt_ids[] = { |
|
{ .compatible = "via,vt8500-uart", .data = &vt8500_flags}, |
|
{ .compatible = "wm,wm8880-uart", .data = &wm8880_flags}, |
|
{} |
|
}; |
|
|
|
static int vt8500_serial_probe(struct platform_device *pdev) |
|
{ |
|
struct vt8500_port *vt8500_port; |
|
struct resource *mmres, *irqres; |
|
struct device_node *np = pdev->dev.of_node; |
|
const struct of_device_id *match; |
|
const unsigned int *flags; |
|
int ret; |
|
int port; |
|
|
|
match = of_match_device(wmt_dt_ids, &pdev->dev); |
|
if (!match) |
|
return -EINVAL; |
|
|
|
flags = match->data; |
|
|
|
mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
|
irqres = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
|
if (!mmres || !irqres) |
|
return -ENODEV; |
|
|
|
if (np) { |
|
port = of_alias_get_id(np, "serial"); |
|
if (port >= VT8500_MAX_PORTS) |
|
port = -1; |
|
} else { |
|
port = -1; |
|
} |
|
|
|
if (port < 0) { |
|
/* calculate the port id */ |
|
port = find_first_zero_bit(vt8500_ports_in_use, |
|
VT8500_MAX_PORTS); |
|
} |
|
|
|
if (port >= VT8500_MAX_PORTS) |
|
return -ENODEV; |
|
|
|
/* reserve the port id */ |
|
if (test_and_set_bit(port, vt8500_ports_in_use)) { |
|
/* port already in use - shouldn't really happen */ |
|
return -EBUSY; |
|
} |
|
|
|
vt8500_port = devm_kzalloc(&pdev->dev, sizeof(struct vt8500_port), |
|
GFP_KERNEL); |
|
if (!vt8500_port) |
|
return -ENOMEM; |
|
|
|
vt8500_port->uart.membase = devm_ioremap_resource(&pdev->dev, mmres); |
|
if (IS_ERR(vt8500_port->uart.membase)) |
|
return PTR_ERR(vt8500_port->uart.membase); |
|
|
|
vt8500_port->clk = of_clk_get(pdev->dev.of_node, 0); |
|
if (IS_ERR(vt8500_port->clk)) { |
|
dev_err(&pdev->dev, "failed to get clock\n"); |
|
return -EINVAL; |
|
} |
|
|
|
ret = clk_prepare_enable(vt8500_port->clk); |
|
if (ret) { |
|
dev_err(&pdev->dev, "failed to enable clock\n"); |
|
return ret; |
|
} |
|
|
|
vt8500_port->vt8500_uart_flags = *flags; |
|
vt8500_port->clk_predivisor = DIV_ROUND_CLOSEST( |
|
clk_get_rate(vt8500_port->clk), |
|
VT8500_RECOMMENDED_CLK |
|
); |
|
vt8500_port->uart.type = PORT_VT8500; |
|
vt8500_port->uart.iotype = UPIO_MEM; |
|
vt8500_port->uart.mapbase = mmres->start; |
|
vt8500_port->uart.irq = irqres->start; |
|
vt8500_port->uart.fifosize = 16; |
|
vt8500_port->uart.ops = &vt8500_uart_pops; |
|
vt8500_port->uart.line = port; |
|
vt8500_port->uart.dev = &pdev->dev; |
|
vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; |
|
vt8500_port->uart.has_sysrq = IS_ENABLED(CONFIG_SERIAL_VT8500_CONSOLE); |
|
|
|
/* Serial core uses the magic "16" everywhere - adjust for it */ |
|
vt8500_port->uart.uartclk = 16 * clk_get_rate(vt8500_port->clk) / |
|
vt8500_port->clk_predivisor / |
|
VT8500_OVERSAMPLING_DIVISOR; |
|
|
|
snprintf(vt8500_port->name, sizeof(vt8500_port->name), |
|
"VT8500 UART%d", pdev->id); |
|
|
|
vt8500_uart_ports[port] = vt8500_port; |
|
|
|
uart_add_one_port(&vt8500_uart_driver, &vt8500_port->uart); |
|
|
|
platform_set_drvdata(pdev, vt8500_port); |
|
|
|
return 0; |
|
} |
|
|
|
static struct platform_driver vt8500_platform_driver = { |
|
.probe = vt8500_serial_probe, |
|
.driver = { |
|
.name = "vt8500_serial", |
|
.of_match_table = wmt_dt_ids, |
|
.suppress_bind_attrs = true, |
|
}, |
|
}; |
|
|
|
static int __init vt8500_serial_init(void) |
|
{ |
|
int ret; |
|
|
|
ret = uart_register_driver(&vt8500_uart_driver); |
|
if (unlikely(ret)) |
|
return ret; |
|
|
|
ret = platform_driver_register(&vt8500_platform_driver); |
|
|
|
if (unlikely(ret)) |
|
uart_unregister_driver(&vt8500_uart_driver); |
|
|
|
return ret; |
|
} |
|
device_initcall(vt8500_serial_init);
|
|
|