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1324 lines
33 KiB
1324 lines
33 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Derived from many drivers using generic_serial interface, |
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* especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c |
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* (was in Linux/VR tree) by Jim Pick. |
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* |
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* Copyright (C) 1999 Harald Koerfgen |
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* Copyright (C) 2000 Jim Pick <[email protected]> |
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* Copyright (C) 2001 Steven J. Hill ([email protected]) |
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* Copyright (C) 2000-2002 Toshiba Corporation |
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* |
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* Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller |
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*/ |
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|
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#include <linux/module.h> |
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#include <linux/ioport.h> |
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#include <linux/init.h> |
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#include <linux/console.h> |
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#include <linux/delay.h> |
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#include <linux/platform_device.h> |
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#include <linux/pci.h> |
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#include <linux/serial_core.h> |
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#include <linux/serial.h> |
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#include <linux/tty.h> |
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#include <linux/tty_flip.h> |
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#include <asm/io.h> |
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static char *serial_version = "1.11"; |
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static char *serial_name = "TX39/49 Serial driver"; |
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|
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#define PASS_LIMIT 256 |
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#if !defined(CONFIG_SERIAL_TXX9_STDSERIAL) |
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/* "ttyS" is used for standard serial driver */ |
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#define TXX9_TTY_NAME "ttyTX" |
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#define TXX9_TTY_MINOR_START 196 |
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#define TXX9_TTY_MAJOR 204 |
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#else |
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/* acts like standard serial driver */ |
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#define TXX9_TTY_NAME "ttyS" |
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#define TXX9_TTY_MINOR_START 64 |
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#define TXX9_TTY_MAJOR TTY_MAJOR |
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#endif |
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|
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/* flag aliases */ |
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#define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART |
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#define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER |
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|
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#ifdef CONFIG_PCI |
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/* support for Toshiba TC86C001 SIO */ |
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#define ENABLE_SERIAL_TXX9_PCI |
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#endif |
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|
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/* |
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* Number of serial ports |
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*/ |
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#define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS |
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|
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struct uart_txx9_port { |
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struct uart_port port; |
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/* No additional info for now */ |
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}; |
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|
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#define TXX9_REGION_SIZE 0x24 |
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|
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/* TXX9 Serial Registers */ |
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#define TXX9_SILCR 0x00 |
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#define TXX9_SIDICR 0x04 |
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#define TXX9_SIDISR 0x08 |
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#define TXX9_SICISR 0x0c |
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#define TXX9_SIFCR 0x10 |
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#define TXX9_SIFLCR 0x14 |
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#define TXX9_SIBGR 0x18 |
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#define TXX9_SITFIFO 0x1c |
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#define TXX9_SIRFIFO 0x20 |
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|
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/* SILCR : Line Control */ |
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#define TXX9_SILCR_SCS_MASK 0x00000060 |
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#define TXX9_SILCR_SCS_IMCLK 0x00000000 |
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#define TXX9_SILCR_SCS_IMCLK_BG 0x00000020 |
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#define TXX9_SILCR_SCS_SCLK 0x00000040 |
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#define TXX9_SILCR_SCS_SCLK_BG 0x00000060 |
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#define TXX9_SILCR_UEPS 0x00000010 |
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#define TXX9_SILCR_UPEN 0x00000008 |
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#define TXX9_SILCR_USBL_MASK 0x00000004 |
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#define TXX9_SILCR_USBL_1BIT 0x00000000 |
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#define TXX9_SILCR_USBL_2BIT 0x00000004 |
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#define TXX9_SILCR_UMODE_MASK 0x00000003 |
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#define TXX9_SILCR_UMODE_8BIT 0x00000000 |
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#define TXX9_SILCR_UMODE_7BIT 0x00000001 |
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|
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/* SIDICR : DMA/Int. Control */ |
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#define TXX9_SIDICR_TDE 0x00008000 |
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#define TXX9_SIDICR_RDE 0x00004000 |
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#define TXX9_SIDICR_TIE 0x00002000 |
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#define TXX9_SIDICR_RIE 0x00001000 |
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#define TXX9_SIDICR_SPIE 0x00000800 |
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#define TXX9_SIDICR_CTSAC 0x00000600 |
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#define TXX9_SIDICR_STIE_MASK 0x0000003f |
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#define TXX9_SIDICR_STIE_OERS 0x00000020 |
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#define TXX9_SIDICR_STIE_CTSS 0x00000010 |
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#define TXX9_SIDICR_STIE_RBRKD 0x00000008 |
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#define TXX9_SIDICR_STIE_TRDY 0x00000004 |
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#define TXX9_SIDICR_STIE_TXALS 0x00000002 |
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#define TXX9_SIDICR_STIE_UBRKD 0x00000001 |
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|
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/* SIDISR : DMA/Int. Status */ |
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#define TXX9_SIDISR_UBRK 0x00008000 |
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#define TXX9_SIDISR_UVALID 0x00004000 |
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#define TXX9_SIDISR_UFER 0x00002000 |
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#define TXX9_SIDISR_UPER 0x00001000 |
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#define TXX9_SIDISR_UOER 0x00000800 |
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#define TXX9_SIDISR_ERI 0x00000400 |
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#define TXX9_SIDISR_TOUT 0x00000200 |
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#define TXX9_SIDISR_TDIS 0x00000100 |
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#define TXX9_SIDISR_RDIS 0x00000080 |
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#define TXX9_SIDISR_STIS 0x00000040 |
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#define TXX9_SIDISR_RFDN_MASK 0x0000001f |
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|
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/* SICISR : Change Int. Status */ |
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#define TXX9_SICISR_OERS 0x00000020 |
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#define TXX9_SICISR_CTSS 0x00000010 |
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#define TXX9_SICISR_RBRKD 0x00000008 |
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#define TXX9_SICISR_TRDY 0x00000004 |
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#define TXX9_SICISR_TXALS 0x00000002 |
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#define TXX9_SICISR_UBRKD 0x00000001 |
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|
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/* SIFCR : FIFO Control */ |
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#define TXX9_SIFCR_SWRST 0x00008000 |
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#define TXX9_SIFCR_RDIL_MASK 0x00000180 |
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#define TXX9_SIFCR_RDIL_1 0x00000000 |
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#define TXX9_SIFCR_RDIL_4 0x00000080 |
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#define TXX9_SIFCR_RDIL_8 0x00000100 |
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#define TXX9_SIFCR_RDIL_12 0x00000180 |
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#define TXX9_SIFCR_RDIL_MAX 0x00000180 |
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#define TXX9_SIFCR_TDIL_MASK 0x00000018 |
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#define TXX9_SIFCR_TDIL_1 0x00000000 |
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#define TXX9_SIFCR_TDIL_4 0x00000001 |
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#define TXX9_SIFCR_TDIL_8 0x00000010 |
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#define TXX9_SIFCR_TDIL_MAX 0x00000010 |
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#define TXX9_SIFCR_TFRST 0x00000004 |
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#define TXX9_SIFCR_RFRST 0x00000002 |
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#define TXX9_SIFCR_FRSTE 0x00000001 |
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#define TXX9_SIO_TX_FIFO 8 |
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#define TXX9_SIO_RX_FIFO 16 |
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|
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/* SIFLCR : Flow Control */ |
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#define TXX9_SIFLCR_RCS 0x00001000 |
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#define TXX9_SIFLCR_TES 0x00000800 |
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#define TXX9_SIFLCR_RTSSC 0x00000200 |
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#define TXX9_SIFLCR_RSDE 0x00000100 |
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#define TXX9_SIFLCR_TSDE 0x00000080 |
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#define TXX9_SIFLCR_RTSTL_MASK 0x0000001e |
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#define TXX9_SIFLCR_RTSTL_MAX 0x0000001e |
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#define TXX9_SIFLCR_TBRK 0x00000001 |
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|
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/* SIBGR : Baudrate Control */ |
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#define TXX9_SIBGR_BCLK_MASK 0x00000300 |
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#define TXX9_SIBGR_BCLK_T0 0x00000000 |
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#define TXX9_SIBGR_BCLK_T2 0x00000100 |
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#define TXX9_SIBGR_BCLK_T4 0x00000200 |
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#define TXX9_SIBGR_BCLK_T6 0x00000300 |
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#define TXX9_SIBGR_BRD_MASK 0x000000ff |
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|
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static inline unsigned int sio_in(struct uart_txx9_port *up, int offset) |
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{ |
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switch (up->port.iotype) { |
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default: |
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return __raw_readl(up->port.membase + offset); |
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case UPIO_PORT: |
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return inl(up->port.iobase + offset); |
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} |
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} |
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static inline void |
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sio_out(struct uart_txx9_port *up, int offset, int value) |
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{ |
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switch (up->port.iotype) { |
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default: |
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__raw_writel(value, up->port.membase + offset); |
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break; |
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case UPIO_PORT: |
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outl(value, up->port.iobase + offset); |
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break; |
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} |
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} |
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static inline void |
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sio_mask(struct uart_txx9_port *up, int offset, unsigned int value) |
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{ |
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sio_out(up, offset, sio_in(up, offset) & ~value); |
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} |
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static inline void |
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sio_set(struct uart_txx9_port *up, int offset, unsigned int value) |
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{ |
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sio_out(up, offset, sio_in(up, offset) | value); |
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} |
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static inline void |
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sio_quot_set(struct uart_txx9_port *up, int quot) |
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{ |
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quot >>= 1; |
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if (quot < 256) |
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sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0); |
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else if (quot < (256 << 2)) |
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sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2); |
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else if (quot < (256 << 4)) |
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sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4); |
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else if (quot < (256 << 6)) |
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sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6); |
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else |
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sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6); |
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} |
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static struct uart_txx9_port *to_uart_txx9_port(struct uart_port *port) |
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{ |
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return container_of(port, struct uart_txx9_port, port); |
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} |
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static void serial_txx9_stop_tx(struct uart_port *port) |
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{ |
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struct uart_txx9_port *up = to_uart_txx9_port(port); |
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sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE); |
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} |
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static void serial_txx9_start_tx(struct uart_port *port) |
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{ |
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struct uart_txx9_port *up = to_uart_txx9_port(port); |
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sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE); |
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} |
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static void serial_txx9_stop_rx(struct uart_port *port) |
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{ |
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struct uart_txx9_port *up = to_uart_txx9_port(port); |
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up->port.read_status_mask &= ~TXX9_SIDISR_RDIS; |
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} |
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static void serial_txx9_initialize(struct uart_port *port) |
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{ |
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struct uart_txx9_port *up = to_uart_txx9_port(port); |
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unsigned int tmout = 10000; |
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sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST); |
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/* TX4925 BUG WORKAROUND. Accessing SIOC register |
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* immediately after soft reset causes bus error. */ |
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udelay(1); |
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while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout) |
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udelay(1); |
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/* TX Int by FIFO Empty, RX Int by Receiving 1 char. */ |
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sio_set(up, TXX9_SIFCR, |
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TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1); |
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/* initial settings */ |
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sio_out(up, TXX9_SILCR, |
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TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT | |
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((up->port.flags & UPF_TXX9_USE_SCLK) ? |
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TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG)); |
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sio_quot_set(up, uart_get_divisor(port, 9600)); |
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sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */); |
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sio_out(up, TXX9_SIDICR, 0); |
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} |
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static inline void |
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receive_chars(struct uart_txx9_port *up, unsigned int *status) |
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{ |
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unsigned char ch; |
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unsigned int disr = *status; |
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int max_count = 256; |
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char flag; |
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unsigned int next_ignore_status_mask; |
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do { |
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ch = sio_in(up, TXX9_SIRFIFO); |
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flag = TTY_NORMAL; |
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up->port.icount.rx++; |
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/* mask out RFDN_MASK bit added by previous overrun */ |
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next_ignore_status_mask = |
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up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK; |
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if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER | |
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TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) { |
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/* |
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* For statistics only |
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*/ |
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if (disr & TXX9_SIDISR_UBRK) { |
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disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER); |
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up->port.icount.brk++; |
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/* |
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* We do the SysRQ and SAK checking |
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* here because otherwise the break |
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* may get masked by ignore_status_mask |
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* or read_status_mask. |
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*/ |
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if (uart_handle_break(&up->port)) |
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goto ignore_char; |
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} else if (disr & TXX9_SIDISR_UPER) |
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up->port.icount.parity++; |
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else if (disr & TXX9_SIDISR_UFER) |
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up->port.icount.frame++; |
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if (disr & TXX9_SIDISR_UOER) { |
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up->port.icount.overrun++; |
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/* |
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* The receiver read buffer still hold |
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* a char which caused overrun. |
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* Ignore next char by adding RFDN_MASK |
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* to ignore_status_mask temporarily. |
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*/ |
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next_ignore_status_mask |= |
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TXX9_SIDISR_RFDN_MASK; |
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} |
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/* |
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* Mask off conditions which should be ingored. |
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*/ |
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disr &= up->port.read_status_mask; |
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|
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if (disr & TXX9_SIDISR_UBRK) { |
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flag = TTY_BREAK; |
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} else if (disr & TXX9_SIDISR_UPER) |
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flag = TTY_PARITY; |
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else if (disr & TXX9_SIDISR_UFER) |
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flag = TTY_FRAME; |
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} |
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if (uart_handle_sysrq_char(&up->port, ch)) |
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goto ignore_char; |
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uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag); |
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ignore_char: |
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up->port.ignore_status_mask = next_ignore_status_mask; |
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disr = sio_in(up, TXX9_SIDISR); |
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} while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0)); |
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spin_unlock(&up->port.lock); |
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tty_flip_buffer_push(&up->port.state->port); |
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spin_lock(&up->port.lock); |
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*status = disr; |
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} |
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static inline void transmit_chars(struct uart_txx9_port *up) |
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{ |
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struct circ_buf *xmit = &up->port.state->xmit; |
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int count; |
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|
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if (up->port.x_char) { |
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sio_out(up, TXX9_SITFIFO, up->port.x_char); |
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up->port.icount.tx++; |
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up->port.x_char = 0; |
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return; |
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} |
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if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { |
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serial_txx9_stop_tx(&up->port); |
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return; |
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} |
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count = TXX9_SIO_TX_FIFO; |
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do { |
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sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]); |
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
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up->port.icount.tx++; |
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if (uart_circ_empty(xmit)) |
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break; |
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} while (--count > 0); |
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
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uart_write_wakeup(&up->port); |
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|
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if (uart_circ_empty(xmit)) |
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serial_txx9_stop_tx(&up->port); |
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} |
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static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id) |
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{ |
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int pass_counter = 0; |
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struct uart_txx9_port *up = dev_id; |
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unsigned int status; |
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|
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while (1) { |
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spin_lock(&up->port.lock); |
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status = sio_in(up, TXX9_SIDISR); |
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if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE)) |
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status &= ~TXX9_SIDISR_TDIS; |
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if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS | |
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TXX9_SIDISR_TOUT))) { |
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spin_unlock(&up->port.lock); |
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break; |
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} |
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|
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if (status & TXX9_SIDISR_RDIS) |
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receive_chars(up, &status); |
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if (status & TXX9_SIDISR_TDIS) |
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transmit_chars(up); |
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/* Clear TX/RX Int. Status */ |
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sio_mask(up, TXX9_SIDISR, |
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TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS | |
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TXX9_SIDISR_TOUT); |
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spin_unlock(&up->port.lock); |
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|
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if (pass_counter++ > PASS_LIMIT) |
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break; |
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} |
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|
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return pass_counter ? IRQ_HANDLED : IRQ_NONE; |
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} |
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|
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static unsigned int serial_txx9_tx_empty(struct uart_port *port) |
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{ |
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struct uart_txx9_port *up = to_uart_txx9_port(port); |
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unsigned long flags; |
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unsigned int ret; |
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|
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spin_lock_irqsave(&up->port.lock, flags); |
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ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0; |
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spin_unlock_irqrestore(&up->port.lock, flags); |
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|
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return ret; |
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} |
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|
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static unsigned int serial_txx9_get_mctrl(struct uart_port *port) |
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{ |
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struct uart_txx9_port *up = to_uart_txx9_port(port); |
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unsigned int ret; |
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|
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/* no modem control lines */ |
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ret = TIOCM_CAR | TIOCM_DSR; |
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ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS; |
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ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS; |
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|
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return ret; |
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} |
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|
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static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl) |
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{ |
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struct uart_txx9_port *up = to_uart_txx9_port(port); |
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|
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if (mctrl & TIOCM_RTS) |
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sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC); |
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else |
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sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC); |
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} |
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|
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static void serial_txx9_break_ctl(struct uart_port *port, int break_state) |
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{ |
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struct uart_txx9_port *up = to_uart_txx9_port(port); |
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unsigned long flags; |
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|
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spin_lock_irqsave(&up->port.lock, flags); |
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if (break_state == -1) |
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sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); |
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else |
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sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); |
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spin_unlock_irqrestore(&up->port.lock, flags); |
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} |
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|
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#if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL) |
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/* |
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* Wait for transmitter & holding register to empty |
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*/ |
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static void wait_for_xmitr(struct uart_txx9_port *up) |
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{ |
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unsigned int tmout = 10000; |
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|
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/* Wait up to 10ms for the character(s) to be sent. */ |
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while (--tmout && |
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!(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS)) |
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udelay(1); |
|
|
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/* Wait up to 1s for flow control if necessary */ |
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if (up->port.flags & UPF_CONS_FLOW) { |
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tmout = 1000000; |
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while (--tmout && |
|
(sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS)) |
|
udelay(1); |
|
} |
|
} |
|
#endif |
|
|
|
#ifdef CONFIG_CONSOLE_POLL |
|
/* |
|
* Console polling routines for writing and reading from the uart while |
|
* in an interrupt or debug context. |
|
*/ |
|
|
|
static int serial_txx9_get_poll_char(struct uart_port *port) |
|
{ |
|
unsigned int ier; |
|
unsigned char c; |
|
struct uart_txx9_port *up = to_uart_txx9_port(port); |
|
|
|
/* |
|
* First save the IER then disable the interrupts |
|
*/ |
|
ier = sio_in(up, TXX9_SIDICR); |
|
sio_out(up, TXX9_SIDICR, 0); |
|
|
|
while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID) |
|
; |
|
|
|
c = sio_in(up, TXX9_SIRFIFO); |
|
|
|
/* |
|
* Finally, clear RX interrupt status |
|
* and restore the IER |
|
*/ |
|
sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS); |
|
sio_out(up, TXX9_SIDICR, ier); |
|
return c; |
|
} |
|
|
|
|
|
static void serial_txx9_put_poll_char(struct uart_port *port, unsigned char c) |
|
{ |
|
unsigned int ier; |
|
struct uart_txx9_port *up = to_uart_txx9_port(port); |
|
|
|
/* |
|
* First save the IER then disable the interrupts |
|
*/ |
|
ier = sio_in(up, TXX9_SIDICR); |
|
sio_out(up, TXX9_SIDICR, 0); |
|
|
|
wait_for_xmitr(up); |
|
/* |
|
* Send the character out. |
|
*/ |
|
sio_out(up, TXX9_SITFIFO, c); |
|
|
|
/* |
|
* Finally, wait for transmitter to become empty |
|
* and restore the IER |
|
*/ |
|
wait_for_xmitr(up); |
|
sio_out(up, TXX9_SIDICR, ier); |
|
} |
|
|
|
#endif /* CONFIG_CONSOLE_POLL */ |
|
|
|
static int serial_txx9_startup(struct uart_port *port) |
|
{ |
|
struct uart_txx9_port *up = to_uart_txx9_port(port); |
|
unsigned long flags; |
|
int retval; |
|
|
|
/* |
|
* Clear the FIFO buffers and disable them. |
|
* (they will be reenabled in set_termios()) |
|
*/ |
|
sio_set(up, TXX9_SIFCR, |
|
TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); |
|
/* clear reset */ |
|
sio_mask(up, TXX9_SIFCR, |
|
TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); |
|
sio_out(up, TXX9_SIDICR, 0); |
|
|
|
/* |
|
* Clear the interrupt registers. |
|
*/ |
|
sio_out(up, TXX9_SIDISR, 0); |
|
|
|
retval = request_irq(up->port.irq, serial_txx9_interrupt, |
|
IRQF_SHARED, "serial_txx9", up); |
|
if (retval) |
|
return retval; |
|
|
|
/* |
|
* Now, initialize the UART |
|
*/ |
|
spin_lock_irqsave(&up->port.lock, flags); |
|
serial_txx9_set_mctrl(&up->port, up->port.mctrl); |
|
spin_unlock_irqrestore(&up->port.lock, flags); |
|
|
|
/* Enable RX/TX */ |
|
sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE); |
|
|
|
/* |
|
* Finally, enable interrupts. |
|
*/ |
|
sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE); |
|
|
|
return 0; |
|
} |
|
|
|
static void serial_txx9_shutdown(struct uart_port *port) |
|
{ |
|
struct uart_txx9_port *up = to_uart_txx9_port(port); |
|
unsigned long flags; |
|
|
|
/* |
|
* Disable interrupts from this port |
|
*/ |
|
sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */ |
|
|
|
spin_lock_irqsave(&up->port.lock, flags); |
|
serial_txx9_set_mctrl(&up->port, up->port.mctrl); |
|
spin_unlock_irqrestore(&up->port.lock, flags); |
|
|
|
/* |
|
* Disable break condition |
|
*/ |
|
sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); |
|
|
|
#ifdef CONFIG_SERIAL_TXX9_CONSOLE |
|
if (up->port.cons && up->port.line == up->port.cons->index) { |
|
free_irq(up->port.irq, up); |
|
return; |
|
} |
|
#endif |
|
/* reset FIFOs */ |
|
sio_set(up, TXX9_SIFCR, |
|
TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); |
|
/* clear reset */ |
|
sio_mask(up, TXX9_SIFCR, |
|
TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); |
|
|
|
/* Disable RX/TX */ |
|
sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE); |
|
|
|
free_irq(up->port.irq, up); |
|
} |
|
|
|
static void |
|
serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios, |
|
struct ktermios *old) |
|
{ |
|
struct uart_txx9_port *up = to_uart_txx9_port(port); |
|
unsigned int cval, fcr = 0; |
|
unsigned long flags; |
|
unsigned int baud, quot; |
|
|
|
/* |
|
* We don't support modem control lines. |
|
*/ |
|
termios->c_cflag &= ~(HUPCL | CMSPAR); |
|
termios->c_cflag |= CLOCAL; |
|
|
|
cval = sio_in(up, TXX9_SILCR); |
|
/* byte size and parity */ |
|
cval &= ~TXX9_SILCR_UMODE_MASK; |
|
switch (termios->c_cflag & CSIZE) { |
|
case CS7: |
|
cval |= TXX9_SILCR_UMODE_7BIT; |
|
break; |
|
default: |
|
case CS5: /* not supported */ |
|
case CS6: /* not supported */ |
|
case CS8: |
|
cval |= TXX9_SILCR_UMODE_8BIT; |
|
break; |
|
} |
|
|
|
cval &= ~TXX9_SILCR_USBL_MASK; |
|
if (termios->c_cflag & CSTOPB) |
|
cval |= TXX9_SILCR_USBL_2BIT; |
|
else |
|
cval |= TXX9_SILCR_USBL_1BIT; |
|
cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS); |
|
if (termios->c_cflag & PARENB) |
|
cval |= TXX9_SILCR_UPEN; |
|
if (!(termios->c_cflag & PARODD)) |
|
cval |= TXX9_SILCR_UEPS; |
|
|
|
/* |
|
* Ask the core to calculate the divisor for us. |
|
*/ |
|
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2); |
|
quot = uart_get_divisor(port, baud); |
|
|
|
/* Set up FIFOs */ |
|
/* TX Int by FIFO Empty, RX Int by Receiving 1 char. */ |
|
fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1; |
|
|
|
/* |
|
* Ok, we're now changing the port state. Do it with |
|
* interrupts disabled. |
|
*/ |
|
spin_lock_irqsave(&up->port.lock, flags); |
|
|
|
/* |
|
* Update the per-port timeout. |
|
*/ |
|
uart_update_timeout(port, termios->c_cflag, baud); |
|
|
|
up->port.read_status_mask = TXX9_SIDISR_UOER | |
|
TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS; |
|
if (termios->c_iflag & INPCK) |
|
up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER; |
|
if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) |
|
up->port.read_status_mask |= TXX9_SIDISR_UBRK; |
|
|
|
/* |
|
* Characteres to ignore |
|
*/ |
|
up->port.ignore_status_mask = 0; |
|
if (termios->c_iflag & IGNPAR) |
|
up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER; |
|
if (termios->c_iflag & IGNBRK) { |
|
up->port.ignore_status_mask |= TXX9_SIDISR_UBRK; |
|
/* |
|
* If we're ignoring parity and break indicators, |
|
* ignore overruns too (for real raw support). |
|
*/ |
|
if (termios->c_iflag & IGNPAR) |
|
up->port.ignore_status_mask |= TXX9_SIDISR_UOER; |
|
} |
|
|
|
/* |
|
* ignore all characters if CREAD is not set |
|
*/ |
|
if ((termios->c_cflag & CREAD) == 0) |
|
up->port.ignore_status_mask |= TXX9_SIDISR_RDIS; |
|
|
|
/* CTS flow control flag */ |
|
if ((termios->c_cflag & CRTSCTS) && |
|
(up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) { |
|
sio_set(up, TXX9_SIFLCR, |
|
TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES); |
|
} else { |
|
sio_mask(up, TXX9_SIFLCR, |
|
TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES); |
|
} |
|
|
|
sio_out(up, TXX9_SILCR, cval); |
|
sio_quot_set(up, quot); |
|
sio_out(up, TXX9_SIFCR, fcr); |
|
|
|
serial_txx9_set_mctrl(&up->port, up->port.mctrl); |
|
spin_unlock_irqrestore(&up->port.lock, flags); |
|
} |
|
|
|
static void |
|
serial_txx9_pm(struct uart_port *port, unsigned int state, |
|
unsigned int oldstate) |
|
{ |
|
/* |
|
* If oldstate was -1 this is called from |
|
* uart_configure_port(). In this case do not initialize the |
|
* port now, because the port was already initialized (for |
|
* non-console port) or should not be initialized here (for |
|
* console port). If we initialized the port here we lose |
|
* serial console settings. |
|
*/ |
|
if (state == 0 && oldstate != -1) |
|
serial_txx9_initialize(port); |
|
} |
|
|
|
static int serial_txx9_request_resource(struct uart_txx9_port *up) |
|
{ |
|
unsigned int size = TXX9_REGION_SIZE; |
|
int ret = 0; |
|
|
|
switch (up->port.iotype) { |
|
default: |
|
if (!up->port.mapbase) |
|
break; |
|
|
|
if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) { |
|
ret = -EBUSY; |
|
break; |
|
} |
|
|
|
if (up->port.flags & UPF_IOREMAP) { |
|
up->port.membase = ioremap(up->port.mapbase, size); |
|
if (!up->port.membase) { |
|
release_mem_region(up->port.mapbase, size); |
|
ret = -ENOMEM; |
|
} |
|
} |
|
break; |
|
|
|
case UPIO_PORT: |
|
if (!request_region(up->port.iobase, size, "serial_txx9")) |
|
ret = -EBUSY; |
|
break; |
|
} |
|
return ret; |
|
} |
|
|
|
static void serial_txx9_release_resource(struct uart_txx9_port *up) |
|
{ |
|
unsigned int size = TXX9_REGION_SIZE; |
|
|
|
switch (up->port.iotype) { |
|
default: |
|
if (!up->port.mapbase) |
|
break; |
|
|
|
if (up->port.flags & UPF_IOREMAP) { |
|
iounmap(up->port.membase); |
|
up->port.membase = NULL; |
|
} |
|
|
|
release_mem_region(up->port.mapbase, size); |
|
break; |
|
|
|
case UPIO_PORT: |
|
release_region(up->port.iobase, size); |
|
break; |
|
} |
|
} |
|
|
|
static void serial_txx9_release_port(struct uart_port *port) |
|
{ |
|
struct uart_txx9_port *up = to_uart_txx9_port(port); |
|
serial_txx9_release_resource(up); |
|
} |
|
|
|
static int serial_txx9_request_port(struct uart_port *port) |
|
{ |
|
struct uart_txx9_port *up = to_uart_txx9_port(port); |
|
return serial_txx9_request_resource(up); |
|
} |
|
|
|
static void serial_txx9_config_port(struct uart_port *port, int uflags) |
|
{ |
|
struct uart_txx9_port *up = to_uart_txx9_port(port); |
|
int ret; |
|
|
|
/* |
|
* Find the region that we can probe for. This in turn |
|
* tells us whether we can probe for the type of port. |
|
*/ |
|
ret = serial_txx9_request_resource(up); |
|
if (ret < 0) |
|
return; |
|
port->type = PORT_TXX9; |
|
up->port.fifosize = TXX9_SIO_TX_FIFO; |
|
|
|
#ifdef CONFIG_SERIAL_TXX9_CONSOLE |
|
if (up->port.line == up->port.cons->index) |
|
return; |
|
#endif |
|
serial_txx9_initialize(port); |
|
} |
|
|
|
static const char * |
|
serial_txx9_type(struct uart_port *port) |
|
{ |
|
return "txx9"; |
|
} |
|
|
|
static const struct uart_ops serial_txx9_pops = { |
|
.tx_empty = serial_txx9_tx_empty, |
|
.set_mctrl = serial_txx9_set_mctrl, |
|
.get_mctrl = serial_txx9_get_mctrl, |
|
.stop_tx = serial_txx9_stop_tx, |
|
.start_tx = serial_txx9_start_tx, |
|
.stop_rx = serial_txx9_stop_rx, |
|
.break_ctl = serial_txx9_break_ctl, |
|
.startup = serial_txx9_startup, |
|
.shutdown = serial_txx9_shutdown, |
|
.set_termios = serial_txx9_set_termios, |
|
.pm = serial_txx9_pm, |
|
.type = serial_txx9_type, |
|
.release_port = serial_txx9_release_port, |
|
.request_port = serial_txx9_request_port, |
|
.config_port = serial_txx9_config_port, |
|
#ifdef CONFIG_CONSOLE_POLL |
|
.poll_get_char = serial_txx9_get_poll_char, |
|
.poll_put_char = serial_txx9_put_poll_char, |
|
#endif |
|
}; |
|
|
|
static struct uart_txx9_port serial_txx9_ports[UART_NR]; |
|
|
|
static void __init serial_txx9_register_ports(struct uart_driver *drv, |
|
struct device *dev) |
|
{ |
|
int i; |
|
|
|
for (i = 0; i < UART_NR; i++) { |
|
struct uart_txx9_port *up = &serial_txx9_ports[i]; |
|
|
|
up->port.line = i; |
|
up->port.ops = &serial_txx9_pops; |
|
up->port.dev = dev; |
|
if (up->port.iobase || up->port.mapbase) |
|
uart_add_one_port(drv, &up->port); |
|
} |
|
} |
|
|
|
#ifdef CONFIG_SERIAL_TXX9_CONSOLE |
|
|
|
static void serial_txx9_console_putchar(struct uart_port *port, int ch) |
|
{ |
|
struct uart_txx9_port *up = to_uart_txx9_port(port); |
|
|
|
wait_for_xmitr(up); |
|
sio_out(up, TXX9_SITFIFO, ch); |
|
} |
|
|
|
/* |
|
* Print a string to the serial port trying not to disturb |
|
* any possible real use of the port... |
|
* |
|
* The console_lock must be held when we get here. |
|
*/ |
|
static void |
|
serial_txx9_console_write(struct console *co, const char *s, unsigned int count) |
|
{ |
|
struct uart_txx9_port *up = &serial_txx9_ports[co->index]; |
|
unsigned int ier, flcr; |
|
|
|
/* |
|
* First save the UER then disable the interrupts |
|
*/ |
|
ier = sio_in(up, TXX9_SIDICR); |
|
sio_out(up, TXX9_SIDICR, 0); |
|
/* |
|
* Disable flow-control if enabled (and unnecessary) |
|
*/ |
|
flcr = sio_in(up, TXX9_SIFLCR); |
|
if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES)) |
|
sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES); |
|
|
|
uart_console_write(&up->port, s, count, serial_txx9_console_putchar); |
|
|
|
/* |
|
* Finally, wait for transmitter to become empty |
|
* and restore the IER |
|
*/ |
|
wait_for_xmitr(up); |
|
sio_out(up, TXX9_SIFLCR, flcr); |
|
sio_out(up, TXX9_SIDICR, ier); |
|
} |
|
|
|
static int __init serial_txx9_console_setup(struct console *co, char *options) |
|
{ |
|
struct uart_port *port; |
|
struct uart_txx9_port *up; |
|
int baud = 9600; |
|
int bits = 8; |
|
int parity = 'n'; |
|
int flow = 'n'; |
|
|
|
/* |
|
* Check whether an invalid uart number has been specified, and |
|
* if so, search for the first available port that does have |
|
* console support. |
|
*/ |
|
if (co->index >= UART_NR) |
|
co->index = 0; |
|
up = &serial_txx9_ports[co->index]; |
|
port = &up->port; |
|
if (!port->ops) |
|
return -ENODEV; |
|
|
|
serial_txx9_initialize(&up->port); |
|
|
|
if (options) |
|
uart_parse_options(options, &baud, &parity, &bits, &flow); |
|
|
|
return uart_set_options(port, co, baud, parity, bits, flow); |
|
} |
|
|
|
static struct uart_driver serial_txx9_reg; |
|
static struct console serial_txx9_console = { |
|
.name = TXX9_TTY_NAME, |
|
.write = serial_txx9_console_write, |
|
.device = uart_console_device, |
|
.setup = serial_txx9_console_setup, |
|
.flags = CON_PRINTBUFFER, |
|
.index = -1, |
|
.data = &serial_txx9_reg, |
|
}; |
|
|
|
static int __init serial_txx9_console_init(void) |
|
{ |
|
register_console(&serial_txx9_console); |
|
return 0; |
|
} |
|
console_initcall(serial_txx9_console_init); |
|
|
|
#define SERIAL_TXX9_CONSOLE &serial_txx9_console |
|
#else |
|
#define SERIAL_TXX9_CONSOLE NULL |
|
#endif |
|
|
|
static struct uart_driver serial_txx9_reg = { |
|
.owner = THIS_MODULE, |
|
.driver_name = "serial_txx9", |
|
.dev_name = TXX9_TTY_NAME, |
|
.major = TXX9_TTY_MAJOR, |
|
.minor = TXX9_TTY_MINOR_START, |
|
.nr = UART_NR, |
|
.cons = SERIAL_TXX9_CONSOLE, |
|
}; |
|
|
|
int __init early_serial_txx9_setup(struct uart_port *port) |
|
{ |
|
if (port->line >= ARRAY_SIZE(serial_txx9_ports)) |
|
return -ENODEV; |
|
|
|
serial_txx9_ports[port->line].port = *port; |
|
serial_txx9_ports[port->line].port.ops = &serial_txx9_pops; |
|
serial_txx9_ports[port->line].port.flags |= |
|
UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; |
|
return 0; |
|
} |
|
|
|
static DEFINE_MUTEX(serial_txx9_mutex); |
|
|
|
/** |
|
* serial_txx9_register_port - register a serial port |
|
* @port: serial port template |
|
* |
|
* Configure the serial port specified by the request. |
|
* |
|
* The port is then probed and if necessary the IRQ is autodetected |
|
* If this fails an error is returned. |
|
* |
|
* On success the port is ready to use and the line number is returned. |
|
*/ |
|
static int serial_txx9_register_port(struct uart_port *port) |
|
{ |
|
int i; |
|
struct uart_txx9_port *uart; |
|
int ret = -ENOSPC; |
|
|
|
mutex_lock(&serial_txx9_mutex); |
|
for (i = 0; i < UART_NR; i++) { |
|
uart = &serial_txx9_ports[i]; |
|
if (uart_match_port(&uart->port, port)) { |
|
uart_remove_one_port(&serial_txx9_reg, &uart->port); |
|
break; |
|
} |
|
} |
|
if (i == UART_NR) { |
|
/* Find unused port */ |
|
for (i = 0; i < UART_NR; i++) { |
|
uart = &serial_txx9_ports[i]; |
|
if (!(uart->port.iobase || uart->port.mapbase)) |
|
break; |
|
} |
|
} |
|
if (i < UART_NR) { |
|
uart->port.iobase = port->iobase; |
|
uart->port.membase = port->membase; |
|
uart->port.irq = port->irq; |
|
uart->port.uartclk = port->uartclk; |
|
uart->port.iotype = port->iotype; |
|
uart->port.flags = port->flags |
|
| UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; |
|
uart->port.mapbase = port->mapbase; |
|
if (port->dev) |
|
uart->port.dev = port->dev; |
|
ret = uart_add_one_port(&serial_txx9_reg, &uart->port); |
|
if (ret == 0) |
|
ret = uart->port.line; |
|
} |
|
mutex_unlock(&serial_txx9_mutex); |
|
return ret; |
|
} |
|
|
|
/** |
|
* serial_txx9_unregister_port - remove a txx9 serial port at runtime |
|
* @line: serial line number |
|
* |
|
* Remove one serial port. This may not be called from interrupt |
|
* context. We hand the port back to the our control. |
|
*/ |
|
static void serial_txx9_unregister_port(int line) |
|
{ |
|
struct uart_txx9_port *uart = &serial_txx9_ports[line]; |
|
|
|
mutex_lock(&serial_txx9_mutex); |
|
uart_remove_one_port(&serial_txx9_reg, &uart->port); |
|
uart->port.flags = 0; |
|
uart->port.type = PORT_UNKNOWN; |
|
uart->port.iobase = 0; |
|
uart->port.mapbase = 0; |
|
uart->port.membase = NULL; |
|
uart->port.dev = NULL; |
|
mutex_unlock(&serial_txx9_mutex); |
|
} |
|
|
|
/* |
|
* Register a set of serial devices attached to a platform device. |
|
*/ |
|
static int serial_txx9_probe(struct platform_device *dev) |
|
{ |
|
struct uart_port *p = dev_get_platdata(&dev->dev); |
|
struct uart_port port; |
|
int ret, i; |
|
|
|
memset(&port, 0, sizeof(struct uart_port)); |
|
for (i = 0; p && p->uartclk != 0; p++, i++) { |
|
port.iobase = p->iobase; |
|
port.membase = p->membase; |
|
port.irq = p->irq; |
|
port.uartclk = p->uartclk; |
|
port.iotype = p->iotype; |
|
port.flags = p->flags; |
|
port.mapbase = p->mapbase; |
|
port.dev = &dev->dev; |
|
port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_TXX9_CONSOLE); |
|
ret = serial_txx9_register_port(&port); |
|
if (ret < 0) { |
|
dev_err(&dev->dev, "unable to register port at index %d " |
|
"(IO%lx MEM%llx IRQ%d): %d\n", i, |
|
p->iobase, (unsigned long long)p->mapbase, |
|
p->irq, ret); |
|
} |
|
} |
|
return 0; |
|
} |
|
|
|
/* |
|
* Remove serial ports registered against a platform device. |
|
*/ |
|
static int serial_txx9_remove(struct platform_device *dev) |
|
{ |
|
int i; |
|
|
|
for (i = 0; i < UART_NR; i++) { |
|
struct uart_txx9_port *up = &serial_txx9_ports[i]; |
|
|
|
if (up->port.dev == &dev->dev) |
|
serial_txx9_unregister_port(i); |
|
} |
|
return 0; |
|
} |
|
|
|
#ifdef CONFIG_PM |
|
static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state) |
|
{ |
|
int i; |
|
|
|
for (i = 0; i < UART_NR; i++) { |
|
struct uart_txx9_port *up = &serial_txx9_ports[i]; |
|
|
|
if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev) |
|
uart_suspend_port(&serial_txx9_reg, &up->port); |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int serial_txx9_resume(struct platform_device *dev) |
|
{ |
|
int i; |
|
|
|
for (i = 0; i < UART_NR; i++) { |
|
struct uart_txx9_port *up = &serial_txx9_ports[i]; |
|
|
|
if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev) |
|
uart_resume_port(&serial_txx9_reg, &up->port); |
|
} |
|
|
|
return 0; |
|
} |
|
#endif |
|
|
|
static struct platform_driver serial_txx9_plat_driver = { |
|
.probe = serial_txx9_probe, |
|
.remove = serial_txx9_remove, |
|
#ifdef CONFIG_PM |
|
.suspend = serial_txx9_suspend, |
|
.resume = serial_txx9_resume, |
|
#endif |
|
.driver = { |
|
.name = "serial_txx9", |
|
}, |
|
}; |
|
|
|
#ifdef ENABLE_SERIAL_TXX9_PCI |
|
/* |
|
* Probe one serial board. Unfortunately, there is no rhyme nor reason |
|
* to the arrangement of serial ports on a PCI card. |
|
*/ |
|
static int |
|
pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent) |
|
{ |
|
struct uart_port port; |
|
int line; |
|
int rc; |
|
|
|
rc = pci_enable_device(dev); |
|
if (rc) |
|
return rc; |
|
|
|
memset(&port, 0, sizeof(port)); |
|
port.ops = &serial_txx9_pops; |
|
port.flags |= UPF_TXX9_HAVE_CTS_LINE; |
|
port.uartclk = 66670000; |
|
port.irq = dev->irq; |
|
port.iotype = UPIO_PORT; |
|
port.iobase = pci_resource_start(dev, 1); |
|
port.dev = &dev->dev; |
|
line = serial_txx9_register_port(&port); |
|
if (line < 0) { |
|
printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line); |
|
pci_disable_device(dev); |
|
return line; |
|
} |
|
pci_set_drvdata(dev, &serial_txx9_ports[line]); |
|
|
|
return 0; |
|
} |
|
|
|
static void pciserial_txx9_remove_one(struct pci_dev *dev) |
|
{ |
|
struct uart_txx9_port *up = pci_get_drvdata(dev); |
|
|
|
if (up) { |
|
serial_txx9_unregister_port(up->port.line); |
|
pci_disable_device(dev); |
|
} |
|
} |
|
|
|
#ifdef CONFIG_PM |
|
static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state) |
|
{ |
|
struct uart_txx9_port *up = pci_get_drvdata(dev); |
|
|
|
if (up) |
|
uart_suspend_port(&serial_txx9_reg, &up->port); |
|
pci_save_state(dev); |
|
pci_set_power_state(dev, pci_choose_state(dev, state)); |
|
return 0; |
|
} |
|
|
|
static int pciserial_txx9_resume_one(struct pci_dev *dev) |
|
{ |
|
struct uart_txx9_port *up = pci_get_drvdata(dev); |
|
|
|
pci_set_power_state(dev, PCI_D0); |
|
pci_restore_state(dev); |
|
if (up) |
|
uart_resume_port(&serial_txx9_reg, &up->port); |
|
return 0; |
|
} |
|
#endif |
|
|
|
static const struct pci_device_id serial_txx9_pci_tbl[] = { |
|
{ PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) }, |
|
{ 0, } |
|
}; |
|
|
|
static struct pci_driver serial_txx9_pci_driver = { |
|
.name = "serial_txx9", |
|
.probe = pciserial_txx9_init_one, |
|
.remove = pciserial_txx9_remove_one, |
|
#ifdef CONFIG_PM |
|
.suspend = pciserial_txx9_suspend_one, |
|
.resume = pciserial_txx9_resume_one, |
|
#endif |
|
.id_table = serial_txx9_pci_tbl, |
|
}; |
|
|
|
MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl); |
|
#endif /* ENABLE_SERIAL_TXX9_PCI */ |
|
|
|
static struct platform_device *serial_txx9_plat_devs; |
|
|
|
static int __init serial_txx9_init(void) |
|
{ |
|
int ret; |
|
|
|
printk(KERN_INFO "%s version %s\n", serial_name, serial_version); |
|
|
|
ret = uart_register_driver(&serial_txx9_reg); |
|
if (ret) |
|
goto out; |
|
|
|
serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1); |
|
if (!serial_txx9_plat_devs) { |
|
ret = -ENOMEM; |
|
goto unreg_uart_drv; |
|
} |
|
|
|
ret = platform_device_add(serial_txx9_plat_devs); |
|
if (ret) |
|
goto put_dev; |
|
|
|
serial_txx9_register_ports(&serial_txx9_reg, |
|
&serial_txx9_plat_devs->dev); |
|
|
|
ret = platform_driver_register(&serial_txx9_plat_driver); |
|
if (ret) |
|
goto del_dev; |
|
|
|
#ifdef ENABLE_SERIAL_TXX9_PCI |
|
ret = pci_register_driver(&serial_txx9_pci_driver); |
|
if (ret) { |
|
platform_driver_unregister(&serial_txx9_plat_driver); |
|
} |
|
#endif |
|
if (ret == 0) |
|
goto out; |
|
|
|
del_dev: |
|
platform_device_del(serial_txx9_plat_devs); |
|
put_dev: |
|
platform_device_put(serial_txx9_plat_devs); |
|
unreg_uart_drv: |
|
uart_unregister_driver(&serial_txx9_reg); |
|
out: |
|
return ret; |
|
} |
|
|
|
static void __exit serial_txx9_exit(void) |
|
{ |
|
int i; |
|
|
|
#ifdef ENABLE_SERIAL_TXX9_PCI |
|
pci_unregister_driver(&serial_txx9_pci_driver); |
|
#endif |
|
platform_driver_unregister(&serial_txx9_plat_driver); |
|
platform_device_unregister(serial_txx9_plat_devs); |
|
for (i = 0; i < UART_NR; i++) { |
|
struct uart_txx9_port *up = &serial_txx9_ports[i]; |
|
if (up->port.iobase || up->port.mapbase) |
|
uart_remove_one_port(&serial_txx9_reg, &up->port); |
|
} |
|
|
|
uart_unregister_driver(&serial_txx9_reg); |
|
} |
|
|
|
module_init(serial_txx9_init); |
|
module_exit(serial_txx9_exit); |
|
|
|
MODULE_LICENSE("GPL"); |
|
MODULE_DESCRIPTION("TX39/49 serial driver"); |
|
|
|
MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);
|
|
|