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612 lines
14 KiB
612 lines
14 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* AM33XX Power Management Routines |
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* |
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* Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/ |
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* Vaibhav Bedia, Dave Gerlach |
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*/ |
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|
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#include <linux/clk.h> |
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#include <linux/cpu.h> |
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#include <linux/err.h> |
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#include <linux/genalloc.h> |
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#include <linux/kernel.h> |
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#include <linux/init.h> |
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#include <linux/io.h> |
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#include <linux/module.h> |
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#include <linux/nvmem-consumer.h> |
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#include <linux/of.h> |
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#include <linux/of_address.h> |
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#include <linux/platform_data/pm33xx.h> |
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#include <linux/platform_device.h> |
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#include <linux/pm_runtime.h> |
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#include <linux/rtc.h> |
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#include <linux/rtc/rtc-omap.h> |
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#include <linux/sizes.h> |
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#include <linux/sram.h> |
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#include <linux/suspend.h> |
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#include <linux/ti-emif-sram.h> |
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#include <linux/wkup_m3_ipc.h> |
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#include <asm/proc-fns.h> |
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#include <asm/suspend.h> |
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#include <asm/system_misc.h> |
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#define AMX3_PM_SRAM_SYMBOL_OFFSET(sym) ((unsigned long)(sym) - \ |
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(unsigned long)pm_sram->do_wfi) |
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|
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#define RTC_SCRATCH_RESUME_REG 0 |
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#define RTC_SCRATCH_MAGIC_REG 1 |
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#define RTC_REG_BOOT_MAGIC 0x8cd0 /* RTC */ |
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#define GIC_INT_SET_PENDING_BASE 0x200 |
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#define AM43XX_GIC_DIST_BASE 0x48241000 |
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static void __iomem *rtc_base_virt; |
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static struct clk *rtc_fck; |
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static u32 rtc_magic_val; |
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static int (*am33xx_do_wfi_sram)(unsigned long unused); |
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static phys_addr_t am33xx_do_wfi_sram_phys; |
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static struct gen_pool *sram_pool, *sram_pool_data; |
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static unsigned long ocmcram_location, ocmcram_location_data; |
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static struct rtc_device *omap_rtc; |
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static void __iomem *gic_dist_base; |
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static struct am33xx_pm_platform_data *pm_ops; |
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static struct am33xx_pm_sram_addr *pm_sram; |
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static struct device *pm33xx_dev; |
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static struct wkup_m3_ipc *m3_ipc; |
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#ifdef CONFIG_SUSPEND |
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static int rtc_only_idle; |
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static int retrigger_irq; |
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static unsigned long suspend_wfi_flags; |
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static struct wkup_m3_wakeup_src wakeup_src = {.irq_nr = 0, |
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.src = "Unknown", |
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}; |
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static struct wkup_m3_wakeup_src rtc_alarm_wakeup = { |
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.irq_nr = 108, .src = "RTC Alarm", |
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}; |
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static struct wkup_m3_wakeup_src rtc_ext_wakeup = { |
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.irq_nr = 0, .src = "Ext wakeup", |
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}; |
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#endif |
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static u32 sram_suspend_address(unsigned long addr) |
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{ |
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return ((unsigned long)am33xx_do_wfi_sram + |
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AMX3_PM_SRAM_SYMBOL_OFFSET(addr)); |
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} |
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static int am33xx_push_sram_idle(void) |
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{ |
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struct am33xx_pm_ro_sram_data ro_sram_data; |
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int ret; |
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u32 table_addr, ro_data_addr; |
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void *copy_addr; |
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ro_sram_data.amx3_pm_sram_data_virt = ocmcram_location_data; |
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ro_sram_data.amx3_pm_sram_data_phys = |
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gen_pool_virt_to_phys(sram_pool_data, ocmcram_location_data); |
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ro_sram_data.rtc_base_virt = rtc_base_virt; |
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/* Save physical address to calculate resume offset during pm init */ |
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am33xx_do_wfi_sram_phys = gen_pool_virt_to_phys(sram_pool, |
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ocmcram_location); |
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am33xx_do_wfi_sram = sram_exec_copy(sram_pool, (void *)ocmcram_location, |
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pm_sram->do_wfi, |
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*pm_sram->do_wfi_sz); |
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if (!am33xx_do_wfi_sram) { |
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dev_err(pm33xx_dev, |
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"PM: %s: am33xx_do_wfi copy to sram failed\n", |
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__func__); |
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return -ENODEV; |
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} |
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table_addr = |
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sram_suspend_address((unsigned long)pm_sram->emif_sram_table); |
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ret = ti_emif_copy_pm_function_table(sram_pool, (void *)table_addr); |
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if (ret) { |
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dev_dbg(pm33xx_dev, |
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"PM: %s: EMIF function copy failed\n", __func__); |
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return -EPROBE_DEFER; |
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} |
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ro_data_addr = |
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sram_suspend_address((unsigned long)pm_sram->ro_sram_data); |
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copy_addr = sram_exec_copy(sram_pool, (void *)ro_data_addr, |
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&ro_sram_data, |
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sizeof(ro_sram_data)); |
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if (!copy_addr) { |
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dev_err(pm33xx_dev, |
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"PM: %s: ro_sram_data copy to sram failed\n", |
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__func__); |
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return -ENODEV; |
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} |
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return 0; |
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} |
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static int am33xx_do_sram_idle(u32 wfi_flags) |
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{ |
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if (!m3_ipc || !pm_ops) |
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return 0; |
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if (wfi_flags & WFI_FLAG_WAKE_M3) |
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m3_ipc->ops->prepare_low_power(m3_ipc, WKUP_M3_IDLE); |
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return pm_ops->cpu_suspend(am33xx_do_wfi_sram, wfi_flags); |
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} |
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static int __init am43xx_map_gic(void) |
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{ |
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gic_dist_base = ioremap(AM43XX_GIC_DIST_BASE, SZ_4K); |
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if (!gic_dist_base) |
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return -ENOMEM; |
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return 0; |
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} |
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#ifdef CONFIG_SUSPEND |
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static struct wkup_m3_wakeup_src rtc_wake_src(void) |
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{ |
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u32 i; |
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i = __raw_readl(rtc_base_virt + 0x44) & 0x40; |
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if (i) { |
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retrigger_irq = rtc_alarm_wakeup.irq_nr; |
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return rtc_alarm_wakeup; |
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} |
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retrigger_irq = rtc_ext_wakeup.irq_nr; |
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return rtc_ext_wakeup; |
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} |
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static int am33xx_rtc_only_idle(unsigned long wfi_flags) |
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{ |
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omap_rtc_power_off_program(&omap_rtc->dev); |
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am33xx_do_wfi_sram(wfi_flags); |
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return 0; |
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} |
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/* |
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* Note that the RTC module clock must be re-enabled only for rtc+ddr suspend. |
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* And looks like the module can stay in SYSC_IDLE_SMART_WKUP mode configured |
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* by the interconnect code just fine for both rtc+ddr suspend and retention |
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* suspend. |
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*/ |
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static int am33xx_pm_suspend(suspend_state_t suspend_state) |
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{ |
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int i, ret = 0; |
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if (suspend_state == PM_SUSPEND_MEM && |
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pm_ops->check_off_mode_enable()) { |
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ret = clk_prepare_enable(rtc_fck); |
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if (ret) { |
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dev_err(pm33xx_dev, "Failed to enable clock: %i\n", ret); |
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return ret; |
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} |
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pm_ops->save_context(); |
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suspend_wfi_flags |= WFI_FLAG_RTC_ONLY; |
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clk_save_context(); |
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ret = pm_ops->soc_suspend(suspend_state, am33xx_rtc_only_idle, |
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suspend_wfi_flags); |
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suspend_wfi_flags &= ~WFI_FLAG_RTC_ONLY; |
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dev_info(pm33xx_dev, "Entering RTC Only mode with DDR in self-refresh\n"); |
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if (!ret) { |
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clk_restore_context(); |
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pm_ops->restore_context(); |
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m3_ipc->ops->set_rtc_only(m3_ipc); |
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am33xx_push_sram_idle(); |
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} |
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} else { |
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ret = pm_ops->soc_suspend(suspend_state, am33xx_do_wfi_sram, |
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suspend_wfi_flags); |
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} |
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if (ret) { |
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dev_err(pm33xx_dev, "PM: Kernel suspend failure\n"); |
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} else { |
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i = m3_ipc->ops->request_pm_status(m3_ipc); |
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switch (i) { |
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case 0: |
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dev_info(pm33xx_dev, |
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"PM: Successfully put all powerdomains to target state\n"); |
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break; |
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case 1: |
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dev_err(pm33xx_dev, |
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"PM: Could not transition all powerdomains to target state\n"); |
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ret = -1; |
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break; |
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default: |
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dev_err(pm33xx_dev, |
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"PM: CM3 returned unknown result = %d\n", i); |
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ret = -1; |
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} |
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/* print the wakeup reason */ |
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if (rtc_only_idle) { |
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wakeup_src = rtc_wake_src(); |
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pr_info("PM: Wakeup source %s\n", wakeup_src.src); |
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} else { |
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pr_info("PM: Wakeup source %s\n", |
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m3_ipc->ops->request_wake_src(m3_ipc)); |
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} |
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} |
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if (suspend_state == PM_SUSPEND_MEM && pm_ops->check_off_mode_enable()) |
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clk_disable_unprepare(rtc_fck); |
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return ret; |
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} |
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static int am33xx_pm_enter(suspend_state_t suspend_state) |
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{ |
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int ret = 0; |
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switch (suspend_state) { |
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case PM_SUSPEND_MEM: |
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case PM_SUSPEND_STANDBY: |
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ret = am33xx_pm_suspend(suspend_state); |
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break; |
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default: |
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ret = -EINVAL; |
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} |
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return ret; |
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} |
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static int am33xx_pm_begin(suspend_state_t state) |
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{ |
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int ret = -EINVAL; |
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struct nvmem_device *nvmem; |
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if (state == PM_SUSPEND_MEM && pm_ops->check_off_mode_enable()) { |
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nvmem = devm_nvmem_device_get(&omap_rtc->dev, |
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"omap_rtc_scratch0"); |
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if (!IS_ERR(nvmem)) |
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nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, 4, |
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(void *)&rtc_magic_val); |
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rtc_only_idle = 1; |
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} else { |
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rtc_only_idle = 0; |
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} |
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pm_ops->begin_suspend(); |
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switch (state) { |
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case PM_SUSPEND_MEM: |
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ret = m3_ipc->ops->prepare_low_power(m3_ipc, WKUP_M3_DEEPSLEEP); |
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break; |
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case PM_SUSPEND_STANDBY: |
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ret = m3_ipc->ops->prepare_low_power(m3_ipc, WKUP_M3_STANDBY); |
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break; |
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} |
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return ret; |
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} |
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static void am33xx_pm_end(void) |
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{ |
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u32 val = 0; |
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struct nvmem_device *nvmem; |
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nvmem = devm_nvmem_device_get(&omap_rtc->dev, "omap_rtc_scratch0"); |
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if (IS_ERR(nvmem)) |
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return; |
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m3_ipc->ops->finish_low_power(m3_ipc); |
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if (rtc_only_idle) { |
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if (retrigger_irq) { |
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/* |
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* 32 bits of Interrupt Set-Pending correspond to 32 |
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* 32 interrupts. Compute the bit offset of the |
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* Interrupt and set that particular bit |
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* Compute the register offset by dividing interrupt |
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* number by 32 and mutiplying by 4 |
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*/ |
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writel_relaxed(1 << (retrigger_irq & 31), |
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gic_dist_base + GIC_INT_SET_PENDING_BASE |
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+ retrigger_irq / 32 * 4); |
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} |
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nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, 4, |
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(void *)&val); |
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} |
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rtc_only_idle = 0; |
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pm_ops->finish_suspend(); |
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} |
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static int am33xx_pm_valid(suspend_state_t state) |
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{ |
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switch (state) { |
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case PM_SUSPEND_STANDBY: |
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case PM_SUSPEND_MEM: |
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return 1; |
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default: |
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return 0; |
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} |
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} |
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static const struct platform_suspend_ops am33xx_pm_ops = { |
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.begin = am33xx_pm_begin, |
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.end = am33xx_pm_end, |
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.enter = am33xx_pm_enter, |
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.valid = am33xx_pm_valid, |
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}; |
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#endif /* CONFIG_SUSPEND */ |
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static void am33xx_pm_set_ipc_ops(void) |
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{ |
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u32 resume_address; |
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int temp; |
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temp = ti_emif_get_mem_type(); |
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if (temp < 0) { |
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dev_err(pm33xx_dev, "PM: Cannot determine memory type, no PM available\n"); |
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return; |
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} |
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m3_ipc->ops->set_mem_type(m3_ipc, temp); |
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/* Physical resume address to be used by ROM code */ |
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resume_address = am33xx_do_wfi_sram_phys + |
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*pm_sram->resume_offset + 0x4; |
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m3_ipc->ops->set_resume_address(m3_ipc, (void *)resume_address); |
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} |
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static void am33xx_pm_free_sram(void) |
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{ |
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gen_pool_free(sram_pool, ocmcram_location, *pm_sram->do_wfi_sz); |
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gen_pool_free(sram_pool_data, ocmcram_location_data, |
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sizeof(struct am33xx_pm_ro_sram_data)); |
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} |
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/* |
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* Push the minimal suspend-resume code to SRAM |
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*/ |
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static int am33xx_pm_alloc_sram(void) |
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{ |
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struct device_node *np; |
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int ret = 0; |
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np = of_find_compatible_node(NULL, NULL, "ti,omap3-mpu"); |
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if (!np) { |
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np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu"); |
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if (!np) { |
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dev_err(pm33xx_dev, "PM: %s: Unable to find device node for mpu\n", |
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__func__); |
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return -ENODEV; |
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} |
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} |
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sram_pool = of_gen_pool_get(np, "pm-sram", 0); |
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if (!sram_pool) { |
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dev_err(pm33xx_dev, "PM: %s: Unable to get sram pool for ocmcram\n", |
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__func__); |
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ret = -ENODEV; |
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goto mpu_put_node; |
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} |
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sram_pool_data = of_gen_pool_get(np, "pm-sram", 1); |
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if (!sram_pool_data) { |
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dev_err(pm33xx_dev, "PM: %s: Unable to get sram data pool for ocmcram\n", |
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__func__); |
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ret = -ENODEV; |
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goto mpu_put_node; |
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} |
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ocmcram_location = gen_pool_alloc(sram_pool, *pm_sram->do_wfi_sz); |
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if (!ocmcram_location) { |
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dev_err(pm33xx_dev, "PM: %s: Unable to allocate memory from ocmcram\n", |
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__func__); |
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ret = -ENOMEM; |
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goto mpu_put_node; |
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} |
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ocmcram_location_data = gen_pool_alloc(sram_pool_data, |
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sizeof(struct emif_regs_amx3)); |
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if (!ocmcram_location_data) { |
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dev_err(pm33xx_dev, "PM: Unable to allocate memory from ocmcram\n"); |
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gen_pool_free(sram_pool, ocmcram_location, *pm_sram->do_wfi_sz); |
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ret = -ENOMEM; |
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} |
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mpu_put_node: |
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of_node_put(np); |
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return ret; |
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} |
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static int am33xx_pm_rtc_setup(void) |
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{ |
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struct device_node *np; |
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unsigned long val = 0; |
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struct nvmem_device *nvmem; |
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int error; |
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np = of_find_node_by_name(NULL, "rtc"); |
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if (of_device_is_available(np)) { |
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/* RTC interconnect target module clock */ |
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rtc_fck = of_clk_get_by_name(np->parent, "fck"); |
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if (IS_ERR(rtc_fck)) |
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return PTR_ERR(rtc_fck); |
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rtc_base_virt = of_iomap(np, 0); |
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if (!rtc_base_virt) { |
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pr_warn("PM: could not iomap rtc"); |
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error = -ENODEV; |
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goto err_clk_put; |
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} |
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omap_rtc = rtc_class_open("rtc0"); |
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if (!omap_rtc) { |
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pr_warn("PM: rtc0 not available"); |
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error = -EPROBE_DEFER; |
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goto err_iounmap; |
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} |
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nvmem = devm_nvmem_device_get(&omap_rtc->dev, |
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"omap_rtc_scratch0"); |
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if (!IS_ERR(nvmem)) { |
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nvmem_device_read(nvmem, RTC_SCRATCH_MAGIC_REG * 4, |
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4, (void *)&rtc_magic_val); |
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if ((rtc_magic_val & 0xffff) != RTC_REG_BOOT_MAGIC) |
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pr_warn("PM: bootloader does not support rtc-only!\n"); |
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nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, |
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4, (void *)&val); |
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val = pm_sram->resume_address; |
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nvmem_device_write(nvmem, RTC_SCRATCH_RESUME_REG * 4, |
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4, (void *)&val); |
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} |
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} else { |
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pr_warn("PM: no-rtc available, rtc-only mode disabled.\n"); |
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} |
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return 0; |
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err_iounmap: |
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iounmap(rtc_base_virt); |
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err_clk_put: |
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clk_put(rtc_fck); |
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return error; |
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} |
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static int am33xx_pm_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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int ret; |
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if (!of_machine_is_compatible("ti,am33xx") && |
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!of_machine_is_compatible("ti,am43")) |
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return -ENODEV; |
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pm_ops = dev->platform_data; |
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if (!pm_ops) { |
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dev_err(dev, "PM: Cannot get core PM ops!\n"); |
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return -ENODEV; |
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} |
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ret = am43xx_map_gic(); |
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if (ret) { |
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pr_err("PM: Could not ioremap GIC base\n"); |
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return ret; |
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} |
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pm_sram = pm_ops->get_sram_addrs(); |
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if (!pm_sram) { |
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dev_err(dev, "PM: Cannot get PM asm function addresses!!\n"); |
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return -ENODEV; |
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} |
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m3_ipc = wkup_m3_ipc_get(); |
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if (!m3_ipc) { |
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pr_err("PM: Cannot get wkup_m3_ipc handle\n"); |
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return -EPROBE_DEFER; |
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} |
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pm33xx_dev = dev; |
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ret = am33xx_pm_alloc_sram(); |
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if (ret) |
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return ret; |
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ret = am33xx_pm_rtc_setup(); |
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if (ret) |
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goto err_free_sram; |
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ret = am33xx_push_sram_idle(); |
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if (ret) |
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goto err_unsetup_rtc; |
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am33xx_pm_set_ipc_ops(); |
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|
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#ifdef CONFIG_SUSPEND |
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suspend_set_ops(&am33xx_pm_ops); |
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|
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/* |
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* For a system suspend we must flush the caches, we want |
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* the DDR in self-refresh, we want to save the context |
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* of the EMIF, and we want the wkup_m3 to handle low-power |
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* transition. |
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*/ |
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suspend_wfi_flags |= WFI_FLAG_FLUSH_CACHE; |
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suspend_wfi_flags |= WFI_FLAG_SELF_REFRESH; |
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suspend_wfi_flags |= WFI_FLAG_SAVE_EMIF; |
|
suspend_wfi_flags |= WFI_FLAG_WAKE_M3; |
|
#endif /* CONFIG_SUSPEND */ |
|
|
|
pm_runtime_enable(dev); |
|
ret = pm_runtime_get_sync(dev); |
|
if (ret < 0) { |
|
pm_runtime_put_noidle(dev); |
|
goto err_pm_runtime_disable; |
|
} |
|
|
|
ret = pm_ops->init(am33xx_do_sram_idle); |
|
if (ret) { |
|
dev_err(dev, "Unable to call core pm init!\n"); |
|
ret = -ENODEV; |
|
goto err_pm_runtime_put; |
|
} |
|
|
|
return 0; |
|
|
|
err_pm_runtime_put: |
|
pm_runtime_put_sync(dev); |
|
err_pm_runtime_disable: |
|
pm_runtime_disable(dev); |
|
wkup_m3_ipc_put(m3_ipc); |
|
err_unsetup_rtc: |
|
iounmap(rtc_base_virt); |
|
clk_put(rtc_fck); |
|
err_free_sram: |
|
am33xx_pm_free_sram(); |
|
pm33xx_dev = NULL; |
|
return ret; |
|
} |
|
|
|
static int am33xx_pm_remove(struct platform_device *pdev) |
|
{ |
|
pm_runtime_put_sync(&pdev->dev); |
|
pm_runtime_disable(&pdev->dev); |
|
if (pm_ops->deinit) |
|
pm_ops->deinit(); |
|
suspend_set_ops(NULL); |
|
wkup_m3_ipc_put(m3_ipc); |
|
am33xx_pm_free_sram(); |
|
iounmap(rtc_base_virt); |
|
clk_put(rtc_fck); |
|
return 0; |
|
} |
|
|
|
static struct platform_driver am33xx_pm_driver = { |
|
.driver = { |
|
.name = "pm33xx", |
|
}, |
|
.probe = am33xx_pm_probe, |
|
.remove = am33xx_pm_remove, |
|
}; |
|
module_platform_driver(am33xx_pm_driver); |
|
|
|
MODULE_ALIAS("platform:pm33xx"); |
|
MODULE_LICENSE("GPL v2"); |
|
MODULE_DESCRIPTION("am33xx power management driver");
|
|
|