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218 lines
5.2 KiB
218 lines
5.2 KiB
/* |
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* Instruction formats for the sequencer program downloaded to |
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* Aic7xxx SCSI host adapters |
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* |
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* Copyright (c) 1997, 1998, 2000 Justin T. Gibbs. |
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* All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions, and the following disclaimer, |
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* without modification. |
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer |
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* substantially similar to the "NO WARRANTY" disclaimer below |
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* ("Disclaimer") and any redistribution must be conditioned upon |
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* including a substantially similar Disclaimer requirement for further |
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* binary redistribution. |
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* 3. Neither the names of the above-listed copyright holders nor the names |
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* of any contributors may be used to endorse or promote products derived |
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* from this software without specific prior written permission. |
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* |
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* Alternatively, this software may be distributed under the terms of the |
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* GNU General Public License ("GPL") version 2 as published by the Free |
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* Software Foundation. |
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* |
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* NO WARRANTY |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR |
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
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* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING |
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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* POSSIBILITY OF SUCH DAMAGES. |
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* |
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* $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm_insformat.h#12 $ |
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* |
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* $FreeBSD$ |
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*/ |
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#include <asm/byteorder.h> |
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/* 8bit ALU logic operations */ |
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struct ins_format1 { |
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#ifdef __LITTLE_ENDIAN |
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uint32_t immediate : 8, |
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source : 9, |
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destination : 9, |
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ret : 1, |
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opcode : 4, |
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parity : 1; |
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#else |
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uint32_t parity : 1, |
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opcode : 4, |
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ret : 1, |
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destination : 9, |
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source : 9, |
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immediate : 8; |
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#endif |
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}; |
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/* 8bit ALU shift/rotate operations */ |
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struct ins_format2 { |
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#ifdef __LITTLE_ENDIAN |
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uint32_t shift_control : 8, |
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source : 9, |
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destination : 9, |
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ret : 1, |
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opcode : 4, |
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parity : 1; |
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#else |
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uint32_t parity : 1, |
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opcode : 4, |
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ret : 1, |
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destination : 9, |
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source : 9, |
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shift_control : 8; |
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#endif |
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}; |
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/* 8bit branch control operations */ |
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struct ins_format3 { |
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#ifdef __LITTLE_ENDIAN |
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uint32_t immediate : 8, |
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source : 9, |
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address : 10, |
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opcode : 4, |
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parity : 1; |
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#else |
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uint32_t parity : 1, |
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opcode : 4, |
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address : 10, |
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source : 9, |
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immediate : 8; |
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#endif |
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}; |
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/* 16bit ALU logic operations */ |
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struct ins_format4 { |
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#ifdef __LITTLE_ENDIAN |
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uint32_t opcode_ext : 8, |
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source : 9, |
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destination : 9, |
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ret : 1, |
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opcode : 4, |
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parity : 1; |
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#else |
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uint32_t parity : 1, |
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opcode : 4, |
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ret : 1, |
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destination : 9, |
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source : 9, |
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opcode_ext : 8; |
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#endif |
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}; |
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/* 16bit branch control operations */ |
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struct ins_format5 { |
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#ifdef __LITTLE_ENDIAN |
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uint32_t opcode_ext : 8, |
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source : 9, |
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address : 10, |
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opcode : 4, |
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parity : 1; |
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#else |
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uint32_t parity : 1, |
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opcode : 4, |
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address : 10, |
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source : 9, |
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opcode_ext : 8; |
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#endif |
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}; |
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/* Far branch operations */ |
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struct ins_format6 { |
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#ifdef __LITTLE_ENDIAN |
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uint32_t page : 3, |
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opcode_ext : 5, |
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source : 9, |
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address : 10, |
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opcode : 4, |
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parity : 1; |
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#else |
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uint32_t parity : 1, |
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opcode : 4, |
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address : 10, |
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source : 9, |
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opcode_ext : 5, |
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page : 3; |
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#endif |
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}; |
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union ins_formats { |
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struct ins_format1 format1; |
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struct ins_format2 format2; |
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struct ins_format3 format3; |
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struct ins_format4 format4; |
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struct ins_format5 format5; |
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struct ins_format6 format6; |
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uint8_t bytes[4]; |
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uint32_t integer; |
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}; |
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struct instruction { |
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union ins_formats format; |
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u_int srcline; |
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struct symbol *patch_label; |
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STAILQ_ENTRY(instruction) links; |
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}; |
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#define AIC_OP_OR 0x0 |
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#define AIC_OP_AND 0x1 |
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#define AIC_OP_XOR 0x2 |
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#define AIC_OP_ADD 0x3 |
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#define AIC_OP_ADC 0x4 |
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#define AIC_OP_ROL 0x5 |
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#define AIC_OP_BMOV 0x6 |
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#define AIC_OP_MVI16 0x7 |
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#define AIC_OP_JMP 0x8 |
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#define AIC_OP_JC 0x9 |
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#define AIC_OP_JNC 0xa |
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#define AIC_OP_CALL 0xb |
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#define AIC_OP_JNE 0xc |
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#define AIC_OP_JNZ 0xd |
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#define AIC_OP_JE 0xe |
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#define AIC_OP_JZ 0xf |
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/* Pseudo Ops */ |
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#define AIC_OP_SHL 0x10 |
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#define AIC_OP_SHR 0x20 |
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#define AIC_OP_ROR 0x30 |
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/* 16bit Ops. Low byte main opcode. High byte extended opcode. */ |
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#define AIC_OP_OR16 0x8005 |
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#define AIC_OP_AND16 0x8105 |
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#define AIC_OP_XOR16 0x8205 |
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#define AIC_OP_ADD16 0x8305 |
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#define AIC_OP_ADC16 0x8405 |
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#define AIC_OP_JNE16 0x8805 |
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#define AIC_OP_JNZ16 0x8905 |
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#define AIC_OP_JE16 0x8C05 |
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#define AIC_OP_JZ16 0x8B05 |
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#define AIC_OP_JMP16 0x9005 |
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#define AIC_OP_JC16 0x9105 |
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#define AIC_OP_JNC16 0x9205 |
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#define AIC_OP_CALL16 0x9305 |
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/* Page extension is low three bits of second opcode byte. */ |
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#define AIC_OP_JMPF 0xA005 |
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#define AIC_OP_CALLF 0xB005 |
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#define AIC_OP_JCF 0xC005 |
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#define AIC_OP_JNCF 0xD005 |
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#define AIC_OP_CMPXCHG 0xE005
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