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217 lines
5.6 KiB
217 lines
5.6 KiB
// SPDX-License-Identifier: GPL-2.0 |
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// |
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// Regulator controller driver for UniPhier SoC |
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// Copyright 2018 Socionext Inc. |
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// Author: Kunihiko Hayashi <[email protected]> |
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#include <linux/clk.h> |
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#include <linux/io.h> |
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#include <linux/module.h> |
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#include <linux/of_device.h> |
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#include <linux/platform_device.h> |
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#include <linux/regmap.h> |
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#include <linux/regulator/driver.h> |
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#include <linux/regulator/of_regulator.h> |
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#include <linux/reset.h> |
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#define MAX_CLKS 2 |
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#define MAX_RSTS 2 |
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struct uniphier_regulator_soc_data { |
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int nclks; |
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const char * const *clock_names; |
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int nrsts; |
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const char * const *reset_names; |
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const struct regulator_desc *desc; |
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const struct regmap_config *regconf; |
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}; |
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struct uniphier_regulator_priv { |
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struct clk_bulk_data clk[MAX_CLKS]; |
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struct reset_control *rst[MAX_RSTS]; |
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const struct uniphier_regulator_soc_data *data; |
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}; |
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static const struct regulator_ops uniphier_regulator_ops = { |
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.enable = regulator_enable_regmap, |
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.disable = regulator_disable_regmap, |
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.is_enabled = regulator_is_enabled_regmap, |
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}; |
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static int uniphier_regulator_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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struct uniphier_regulator_priv *priv; |
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struct regulator_config config = { }; |
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struct regulator_dev *rdev; |
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struct regmap *regmap; |
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void __iomem *base; |
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const char *name; |
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int i, ret, nr; |
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); |
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if (!priv) |
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return -ENOMEM; |
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priv->data = of_device_get_match_data(dev); |
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if (WARN_ON(!priv->data)) |
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return -EINVAL; |
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base = devm_platform_ioremap_resource(pdev, 0); |
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if (IS_ERR(base)) |
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return PTR_ERR(base); |
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for (i = 0; i < priv->data->nclks; i++) |
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priv->clk[i].id = priv->data->clock_names[i]; |
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ret = devm_clk_bulk_get(dev, priv->data->nclks, priv->clk); |
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if (ret) |
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return ret; |
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for (i = 0; i < priv->data->nrsts; i++) { |
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name = priv->data->reset_names[i]; |
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priv->rst[i] = devm_reset_control_get_shared(dev, name); |
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if (IS_ERR(priv->rst[i])) |
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return PTR_ERR(priv->rst[i]); |
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} |
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ret = clk_bulk_prepare_enable(priv->data->nclks, priv->clk); |
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if (ret) |
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return ret; |
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for (nr = 0; nr < priv->data->nrsts; nr++) { |
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ret = reset_control_deassert(priv->rst[nr]); |
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if (ret) |
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goto out_rst_assert; |
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} |
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regmap = devm_regmap_init_mmio(dev, base, priv->data->regconf); |
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if (IS_ERR(regmap)) { |
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ret = PTR_ERR(regmap); |
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goto out_rst_assert; |
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} |
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config.dev = dev; |
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config.driver_data = priv; |
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config.of_node = dev->of_node; |
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config.regmap = regmap; |
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config.init_data = of_get_regulator_init_data(dev, dev->of_node, |
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priv->data->desc); |
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rdev = devm_regulator_register(dev, priv->data->desc, &config); |
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if (IS_ERR(rdev)) { |
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ret = PTR_ERR(rdev); |
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goto out_rst_assert; |
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} |
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platform_set_drvdata(pdev, priv); |
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return 0; |
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out_rst_assert: |
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while (nr--) |
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reset_control_assert(priv->rst[nr]); |
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clk_bulk_disable_unprepare(priv->data->nclks, priv->clk); |
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return ret; |
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} |
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static int uniphier_regulator_remove(struct platform_device *pdev) |
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{ |
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struct uniphier_regulator_priv *priv = platform_get_drvdata(pdev); |
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int i; |
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for (i = 0; i < priv->data->nrsts; i++) |
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reset_control_assert(priv->rst[i]); |
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clk_bulk_disable_unprepare(priv->data->nclks, priv->clk); |
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return 0; |
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} |
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/* USB3 controller data */ |
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#define USB3VBUS_OFFSET 0x0 |
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#define USB3VBUS_REG BIT(4) |
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#define USB3VBUS_REG_EN BIT(3) |
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static const struct regulator_desc uniphier_usb3_regulator_desc = { |
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.name = "vbus", |
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.of_match = of_match_ptr("vbus"), |
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.ops = &uniphier_regulator_ops, |
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.type = REGULATOR_VOLTAGE, |
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.owner = THIS_MODULE, |
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.enable_reg = USB3VBUS_OFFSET, |
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.enable_mask = USB3VBUS_REG_EN | USB3VBUS_REG, |
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.enable_val = USB3VBUS_REG_EN | USB3VBUS_REG, |
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.disable_val = USB3VBUS_REG_EN, |
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}; |
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static const struct regmap_config uniphier_usb3_regulator_regconf = { |
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.reg_bits = 32, |
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.val_bits = 32, |
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.reg_stride = 4, |
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.max_register = 1, |
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}; |
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static const char * const uniphier_pro4_clock_reset_names[] = { |
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"gio", "link", |
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}; |
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static const struct uniphier_regulator_soc_data uniphier_pro4_usb3_data = { |
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.nclks = ARRAY_SIZE(uniphier_pro4_clock_reset_names), |
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.clock_names = uniphier_pro4_clock_reset_names, |
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.nrsts = ARRAY_SIZE(uniphier_pro4_clock_reset_names), |
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.reset_names = uniphier_pro4_clock_reset_names, |
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.desc = &uniphier_usb3_regulator_desc, |
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.regconf = &uniphier_usb3_regulator_regconf, |
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}; |
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static const char * const uniphier_pxs2_clock_reset_names[] = { |
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"link", |
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}; |
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static const struct uniphier_regulator_soc_data uniphier_pxs2_usb3_data = { |
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.nclks = ARRAY_SIZE(uniphier_pxs2_clock_reset_names), |
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.clock_names = uniphier_pxs2_clock_reset_names, |
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.nrsts = ARRAY_SIZE(uniphier_pxs2_clock_reset_names), |
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.reset_names = uniphier_pxs2_clock_reset_names, |
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.desc = &uniphier_usb3_regulator_desc, |
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.regconf = &uniphier_usb3_regulator_regconf, |
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}; |
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static const struct of_device_id uniphier_regulator_match[] = { |
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/* USB VBUS */ |
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{ |
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.compatible = "socionext,uniphier-pro4-usb3-regulator", |
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.data = &uniphier_pro4_usb3_data, |
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}, |
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{ |
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.compatible = "socionext,uniphier-pro5-usb3-regulator", |
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.data = &uniphier_pro4_usb3_data, |
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}, |
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{ |
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.compatible = "socionext,uniphier-pxs2-usb3-regulator", |
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.data = &uniphier_pxs2_usb3_data, |
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}, |
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{ |
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.compatible = "socionext,uniphier-ld20-usb3-regulator", |
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.data = &uniphier_pxs2_usb3_data, |
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}, |
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{ |
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.compatible = "socionext,uniphier-pxs3-usb3-regulator", |
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.data = &uniphier_pxs2_usb3_data, |
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}, |
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{ /* Sentinel */ }, |
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}; |
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static struct platform_driver uniphier_regulator_driver = { |
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.probe = uniphier_regulator_probe, |
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.remove = uniphier_regulator_remove, |
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.driver = { |
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.name = "uniphier-regulator", |
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.of_match_table = uniphier_regulator_match, |
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}, |
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}; |
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module_platform_driver(uniphier_regulator_driver); |
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MODULE_AUTHOR("Kunihiko Hayashi <[email protected]>"); |
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MODULE_DESCRIPTION("UniPhier Regulator Controller Driver"); |
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MODULE_LICENSE("GPL");
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