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685 lines
16 KiB
685 lines
16 KiB
/* |
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* Driver for the ST Microelectronics SPEAr300 pinmux |
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* |
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* Copyright (C) 2012 ST Microelectronics |
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* Viresh Kumar <[email protected]> |
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* |
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* This file is licensed under the terms of the GNU General Public |
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* License version 2. This program is licensed "as is" without any |
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* warranty of any kind, whether express or implied. |
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*/ |
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#include <linux/err.h> |
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#include <linux/init.h> |
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#include <linux/of_device.h> |
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#include <linux/platform_device.h> |
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#include "pinctrl-spear3xx.h" |
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#define DRIVER_NAME "spear300-pinmux" |
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/* addresses */ |
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#define PMX_CONFIG_REG 0x00 |
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#define MODE_CONFIG_REG 0x04 |
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/* modes */ |
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#define NAND_MODE (1 << 0) |
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#define NOR_MODE (1 << 1) |
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#define PHOTO_FRAME_MODE (1 << 2) |
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#define LEND_IP_PHONE_MODE (1 << 3) |
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#define HEND_IP_PHONE_MODE (1 << 4) |
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#define LEND_WIFI_PHONE_MODE (1 << 5) |
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#define HEND_WIFI_PHONE_MODE (1 << 6) |
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#define ATA_PABX_WI2S_MODE (1 << 7) |
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#define ATA_PABX_I2S_MODE (1 << 8) |
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#define CAML_LCDW_MODE (1 << 9) |
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#define CAMU_LCD_MODE (1 << 10) |
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#define CAMU_WLCD_MODE (1 << 11) |
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#define CAML_LCD_MODE (1 << 12) |
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static struct spear_pmx_mode pmx_mode_nand = { |
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.name = "nand", |
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.mode = NAND_MODE, |
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.reg = MODE_CONFIG_REG, |
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.mask = 0x0000000F, |
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.val = 0x00, |
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}; |
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static struct spear_pmx_mode pmx_mode_nor = { |
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.name = "nor", |
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.mode = NOR_MODE, |
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.reg = MODE_CONFIG_REG, |
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.mask = 0x0000000F, |
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.val = 0x01, |
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}; |
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static struct spear_pmx_mode pmx_mode_photo_frame = { |
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.name = "photo frame mode", |
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.mode = PHOTO_FRAME_MODE, |
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.reg = MODE_CONFIG_REG, |
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.mask = 0x0000000F, |
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.val = 0x02, |
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}; |
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static struct spear_pmx_mode pmx_mode_lend_ip_phone = { |
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.name = "lend ip phone mode", |
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.mode = LEND_IP_PHONE_MODE, |
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.reg = MODE_CONFIG_REG, |
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.mask = 0x0000000F, |
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.val = 0x03, |
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}; |
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static struct spear_pmx_mode pmx_mode_hend_ip_phone = { |
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.name = "hend ip phone mode", |
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.mode = HEND_IP_PHONE_MODE, |
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.reg = MODE_CONFIG_REG, |
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.mask = 0x0000000F, |
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.val = 0x04, |
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}; |
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static struct spear_pmx_mode pmx_mode_lend_wifi_phone = { |
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.name = "lend wifi phone mode", |
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.mode = LEND_WIFI_PHONE_MODE, |
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.reg = MODE_CONFIG_REG, |
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.mask = 0x0000000F, |
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.val = 0x05, |
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}; |
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static struct spear_pmx_mode pmx_mode_hend_wifi_phone = { |
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.name = "hend wifi phone mode", |
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.mode = HEND_WIFI_PHONE_MODE, |
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.reg = MODE_CONFIG_REG, |
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.mask = 0x0000000F, |
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.val = 0x06, |
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}; |
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static struct spear_pmx_mode pmx_mode_ata_pabx_wi2s = { |
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.name = "ata pabx wi2s mode", |
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.mode = ATA_PABX_WI2S_MODE, |
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.reg = MODE_CONFIG_REG, |
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.mask = 0x0000000F, |
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.val = 0x07, |
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}; |
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static struct spear_pmx_mode pmx_mode_ata_pabx_i2s = { |
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.name = "ata pabx i2s mode", |
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.mode = ATA_PABX_I2S_MODE, |
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.reg = MODE_CONFIG_REG, |
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.mask = 0x0000000F, |
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.val = 0x08, |
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}; |
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static struct spear_pmx_mode pmx_mode_caml_lcdw = { |
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.name = "caml lcdw mode", |
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.mode = CAML_LCDW_MODE, |
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.reg = MODE_CONFIG_REG, |
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.mask = 0x0000000F, |
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.val = 0x0C, |
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}; |
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static struct spear_pmx_mode pmx_mode_camu_lcd = { |
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.name = "camu lcd mode", |
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.mode = CAMU_LCD_MODE, |
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.reg = MODE_CONFIG_REG, |
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.mask = 0x0000000F, |
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.val = 0x0D, |
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}; |
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static struct spear_pmx_mode pmx_mode_camu_wlcd = { |
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.name = "camu wlcd mode", |
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.mode = CAMU_WLCD_MODE, |
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.reg = MODE_CONFIG_REG, |
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.mask = 0x0000000F, |
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.val = 0xE, |
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}; |
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static struct spear_pmx_mode pmx_mode_caml_lcd = { |
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.name = "caml lcd mode", |
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.mode = CAML_LCD_MODE, |
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.reg = MODE_CONFIG_REG, |
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.mask = 0x0000000F, |
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.val = 0x0F, |
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}; |
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static struct spear_pmx_mode *spear300_pmx_modes[] = { |
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&pmx_mode_nand, |
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&pmx_mode_nor, |
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&pmx_mode_photo_frame, |
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&pmx_mode_lend_ip_phone, |
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&pmx_mode_hend_ip_phone, |
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&pmx_mode_lend_wifi_phone, |
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&pmx_mode_hend_wifi_phone, |
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&pmx_mode_ata_pabx_wi2s, |
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&pmx_mode_ata_pabx_i2s, |
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&pmx_mode_caml_lcdw, |
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&pmx_mode_camu_lcd, |
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&pmx_mode_camu_wlcd, |
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&pmx_mode_caml_lcd, |
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}; |
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/* fsmc_2chips_pins */ |
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static const unsigned fsmc_2chips_pins[] = { 1, 97 }; |
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static struct spear_muxreg fsmc_2chips_muxreg[] = { |
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{ |
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.reg = PMX_CONFIG_REG, |
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.mask = PMX_FIRDA_MASK, |
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.val = 0, |
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}, |
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}; |
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static struct spear_modemux fsmc_2chips_modemux[] = { |
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{ |
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.modes = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE | |
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ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE, |
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.muxregs = fsmc_2chips_muxreg, |
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.nmuxregs = ARRAY_SIZE(fsmc_2chips_muxreg), |
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}, |
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}; |
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static struct spear_pingroup fsmc_2chips_pingroup = { |
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.name = "fsmc_2chips_grp", |
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.pins = fsmc_2chips_pins, |
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.npins = ARRAY_SIZE(fsmc_2chips_pins), |
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.modemuxs = fsmc_2chips_modemux, |
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.nmodemuxs = ARRAY_SIZE(fsmc_2chips_modemux), |
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}; |
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/* fsmc_4chips_pins */ |
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static const unsigned fsmc_4chips_pins[] = { 1, 2, 3, 97 }; |
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static struct spear_muxreg fsmc_4chips_muxreg[] = { |
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{ |
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.reg = PMX_CONFIG_REG, |
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.mask = PMX_FIRDA_MASK | PMX_UART0_MASK, |
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.val = 0, |
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}, |
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}; |
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static struct spear_modemux fsmc_4chips_modemux[] = { |
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{ |
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.modes = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE | |
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ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE, |
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.muxregs = fsmc_4chips_muxreg, |
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.nmuxregs = ARRAY_SIZE(fsmc_4chips_muxreg), |
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}, |
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}; |
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static struct spear_pingroup fsmc_4chips_pingroup = { |
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.name = "fsmc_4chips_grp", |
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.pins = fsmc_4chips_pins, |
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.npins = ARRAY_SIZE(fsmc_4chips_pins), |
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.modemuxs = fsmc_4chips_modemux, |
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.nmodemuxs = ARRAY_SIZE(fsmc_4chips_modemux), |
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}; |
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static const char *const fsmc_grps[] = { "fsmc_2chips_grp", "fsmc_4chips_grp" |
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}; |
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static struct spear_function fsmc_function = { |
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.name = "fsmc", |
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.groups = fsmc_grps, |
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.ngroups = ARRAY_SIZE(fsmc_grps), |
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}; |
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/* clcd_lcdmode_pins */ |
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static const unsigned clcd_lcdmode_pins[] = { 49, 50 }; |
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static struct spear_muxreg clcd_lcdmode_muxreg[] = { |
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{ |
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.reg = PMX_CONFIG_REG, |
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.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK, |
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.val = 0, |
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}, |
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}; |
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static struct spear_modemux clcd_lcdmode_modemux[] = { |
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{ |
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.modes = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE | |
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CAMU_LCD_MODE | CAML_LCD_MODE, |
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.muxregs = clcd_lcdmode_muxreg, |
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.nmuxregs = ARRAY_SIZE(clcd_lcdmode_muxreg), |
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}, |
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}; |
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static struct spear_pingroup clcd_lcdmode_pingroup = { |
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.name = "clcd_lcdmode_grp", |
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.pins = clcd_lcdmode_pins, |
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.npins = ARRAY_SIZE(clcd_lcdmode_pins), |
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.modemuxs = clcd_lcdmode_modemux, |
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.nmodemuxs = ARRAY_SIZE(clcd_lcdmode_modemux), |
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}; |
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/* clcd_pfmode_pins */ |
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static const unsigned clcd_pfmode_pins[] = { 47, 48, 49, 50 }; |
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static struct spear_muxreg clcd_pfmode_muxreg[] = { |
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{ |
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.reg = PMX_CONFIG_REG, |
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.mask = PMX_TIMER_2_3_MASK, |
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.val = 0, |
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}, |
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}; |
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static struct spear_modemux clcd_pfmode_modemux[] = { |
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{ |
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.modes = PHOTO_FRAME_MODE, |
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.muxregs = clcd_pfmode_muxreg, |
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.nmuxregs = ARRAY_SIZE(clcd_pfmode_muxreg), |
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}, |
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}; |
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static struct spear_pingroup clcd_pfmode_pingroup = { |
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.name = "clcd_pfmode_grp", |
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.pins = clcd_pfmode_pins, |
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.npins = ARRAY_SIZE(clcd_pfmode_pins), |
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.modemuxs = clcd_pfmode_modemux, |
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.nmodemuxs = ARRAY_SIZE(clcd_pfmode_modemux), |
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}; |
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static const char *const clcd_grps[] = { "clcd_lcdmode_grp", "clcd_pfmode_grp" |
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}; |
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static struct spear_function clcd_function = { |
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.name = "clcd", |
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.groups = clcd_grps, |
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.ngroups = ARRAY_SIZE(clcd_grps), |
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}; |
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/* tdm_pins */ |
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static const unsigned tdm_pins[] = { 34, 35, 36, 37, 38 }; |
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static struct spear_muxreg tdm_muxreg[] = { |
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{ |
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.reg = PMX_CONFIG_REG, |
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.mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK, |
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.val = 0, |
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}, |
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}; |
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static struct spear_modemux tdm_modemux[] = { |
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{ |
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.modes = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE | |
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HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
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| HEND_WIFI_PHONE_MODE | ATA_PABX_WI2S_MODE |
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| ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
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| CAMU_WLCD_MODE | CAML_LCD_MODE, |
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.muxregs = tdm_muxreg, |
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.nmuxregs = ARRAY_SIZE(tdm_muxreg), |
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}, |
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}; |
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static struct spear_pingroup tdm_pingroup = { |
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.name = "tdm_grp", |
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.pins = tdm_pins, |
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.npins = ARRAY_SIZE(tdm_pins), |
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.modemuxs = tdm_modemux, |
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.nmodemuxs = ARRAY_SIZE(tdm_modemux), |
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}; |
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static const char *const tdm_grps[] = { "tdm_grp" }; |
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static struct spear_function tdm_function = { |
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.name = "tdm", |
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.groups = tdm_grps, |
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.ngroups = ARRAY_SIZE(tdm_grps), |
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}; |
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/* i2c_clk_pins */ |
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static const unsigned i2c_clk_pins[] = { 45, 46, 47, 48 }; |
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static struct spear_muxreg i2c_clk_muxreg[] = { |
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{ |
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.reg = PMX_CONFIG_REG, |
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.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK, |
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.val = 0, |
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}, |
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}; |
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static struct spear_modemux i2c_clk_modemux[] = { |
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{ |
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.modes = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE | |
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LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE | |
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ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE | CAML_LCDW_MODE |
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| CAML_LCD_MODE, |
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.muxregs = i2c_clk_muxreg, |
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.nmuxregs = ARRAY_SIZE(i2c_clk_muxreg), |
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}, |
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}; |
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static struct spear_pingroup i2c_clk_pingroup = { |
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.name = "i2c_clk_grp_grp", |
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.pins = i2c_clk_pins, |
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.npins = ARRAY_SIZE(i2c_clk_pins), |
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.modemuxs = i2c_clk_modemux, |
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.nmodemuxs = ARRAY_SIZE(i2c_clk_modemux), |
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}; |
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static const char *const i2c_grps[] = { "i2c_clk_grp" }; |
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static struct spear_function i2c_function = { |
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.name = "i2c1", |
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.groups = i2c_grps, |
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.ngroups = ARRAY_SIZE(i2c_grps), |
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}; |
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/* caml_pins */ |
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static const unsigned caml_pins[] = { 12, 13, 14, 15, 16, 17, 18, 19, 20, 21 }; |
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static struct spear_muxreg caml_muxreg[] = { |
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{ |
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.reg = PMX_CONFIG_REG, |
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.mask = PMX_MII_MASK, |
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.val = 0, |
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}, |
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}; |
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static struct spear_modemux caml_modemux[] = { |
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{ |
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.modes = CAML_LCDW_MODE | CAML_LCD_MODE, |
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.muxregs = caml_muxreg, |
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.nmuxregs = ARRAY_SIZE(caml_muxreg), |
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}, |
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}; |
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static struct spear_pingroup caml_pingroup = { |
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.name = "caml_grp", |
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.pins = caml_pins, |
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.npins = ARRAY_SIZE(caml_pins), |
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.modemuxs = caml_modemux, |
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.nmodemuxs = ARRAY_SIZE(caml_modemux), |
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}; |
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/* camu_pins */ |
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static const unsigned camu_pins[] = { 16, 17, 18, 19, 20, 21, 45, 46, 47, 48 }; |
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static struct spear_muxreg camu_muxreg[] = { |
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{ |
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.reg = PMX_CONFIG_REG, |
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.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK | PMX_MII_MASK, |
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.val = 0, |
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}, |
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}; |
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static struct spear_modemux camu_modemux[] = { |
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{ |
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.modes = CAMU_LCD_MODE | CAMU_WLCD_MODE, |
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.muxregs = camu_muxreg, |
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.nmuxregs = ARRAY_SIZE(camu_muxreg), |
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}, |
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}; |
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static struct spear_pingroup camu_pingroup = { |
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.name = "camu_grp", |
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.pins = camu_pins, |
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.npins = ARRAY_SIZE(camu_pins), |
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.modemuxs = camu_modemux, |
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.nmodemuxs = ARRAY_SIZE(camu_modemux), |
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}; |
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static const char *const cam_grps[] = { "caml_grp", "camu_grp" }; |
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static struct spear_function cam_function = { |
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.name = "cam", |
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.groups = cam_grps, |
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.ngroups = ARRAY_SIZE(cam_grps), |
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}; |
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/* dac_pins */ |
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static const unsigned dac_pins[] = { 43, 44 }; |
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static struct spear_muxreg dac_muxreg[] = { |
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{ |
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.reg = PMX_CONFIG_REG, |
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.mask = PMX_TIMER_0_1_MASK, |
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.val = 0, |
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}, |
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}; |
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static struct spear_modemux dac_modemux[] = { |
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{ |
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.modes = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
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| CAMU_WLCD_MODE | CAML_LCD_MODE, |
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.muxregs = dac_muxreg, |
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.nmuxregs = ARRAY_SIZE(dac_muxreg), |
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}, |
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}; |
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static struct spear_pingroup dac_pingroup = { |
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.name = "dac_grp", |
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.pins = dac_pins, |
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.npins = ARRAY_SIZE(dac_pins), |
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.modemuxs = dac_modemux, |
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.nmodemuxs = ARRAY_SIZE(dac_modemux), |
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}; |
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static const char *const dac_grps[] = { "dac_grp" }; |
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static struct spear_function dac_function = { |
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.name = "dac", |
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.groups = dac_grps, |
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.ngroups = ARRAY_SIZE(dac_grps), |
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}; |
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/* i2s_pins */ |
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static const unsigned i2s_pins[] = { 39, 40, 41, 42 }; |
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static struct spear_muxreg i2s_muxreg[] = { |
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{ |
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.reg = PMX_CONFIG_REG, |
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.mask = PMX_UART0_MODEM_MASK, |
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.val = 0, |
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}, |
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}; |
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static struct spear_modemux i2s_modemux[] = { |
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{ |
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.modes = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
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| LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE | |
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ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
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| CAMU_WLCD_MODE | CAML_LCD_MODE, |
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.muxregs = i2s_muxreg, |
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.nmuxregs = ARRAY_SIZE(i2s_muxreg), |
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}, |
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}; |
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static struct spear_pingroup i2s_pingroup = { |
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.name = "i2s_grp", |
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.pins = i2s_pins, |
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.npins = ARRAY_SIZE(i2s_pins), |
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.modemuxs = i2s_modemux, |
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.nmodemuxs = ARRAY_SIZE(i2s_modemux), |
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}; |
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static const char *const i2s_grps[] = { "i2s_grp" }; |
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static struct spear_function i2s_function = { |
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.name = "i2s", |
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.groups = i2s_grps, |
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.ngroups = ARRAY_SIZE(i2s_grps), |
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}; |
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/* sdhci_4bit_pins */ |
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static const unsigned sdhci_4bit_pins[] = { 28, 29, 30, 31, 32, 33 }; |
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static struct spear_muxreg sdhci_4bit_muxreg[] = { |
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{ |
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.reg = PMX_CONFIG_REG, |
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.mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK | |
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PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK | |
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PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK, |
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.val = 0, |
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}, |
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}; |
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static struct spear_modemux sdhci_4bit_modemux[] = { |
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{ |
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.modes = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE | |
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HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE | |
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HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE | |
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CAMU_WLCD_MODE | CAML_LCD_MODE | ATA_PABX_WI2S_MODE, |
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.muxregs = sdhci_4bit_muxreg, |
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.nmuxregs = ARRAY_SIZE(sdhci_4bit_muxreg), |
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}, |
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}; |
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static struct spear_pingroup sdhci_4bit_pingroup = { |
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.name = "sdhci_4bit_grp", |
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.pins = sdhci_4bit_pins, |
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.npins = ARRAY_SIZE(sdhci_4bit_pins), |
|
.modemuxs = sdhci_4bit_modemux, |
|
.nmodemuxs = ARRAY_SIZE(sdhci_4bit_modemux), |
|
}; |
|
|
|
/* sdhci_8bit_pins */ |
|
static const unsigned sdhci_8bit_pins[] = { 24, 25, 26, 27, 28, 29, 30, 31, 32, |
|
33 }; |
|
static struct spear_muxreg sdhci_8bit_muxreg[] = { |
|
{ |
|
.reg = PMX_CONFIG_REG, |
|
.mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK | |
|
PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK | |
|
PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK | PMX_MII_MASK, |
|
.val = 0, |
|
}, |
|
}; |
|
|
|
static struct spear_modemux sdhci_8bit_modemux[] = { |
|
{ |
|
.modes = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE | |
|
HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE | |
|
HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE | |
|
CAMU_WLCD_MODE | CAML_LCD_MODE, |
|
.muxregs = sdhci_8bit_muxreg, |
|
.nmuxregs = ARRAY_SIZE(sdhci_8bit_muxreg), |
|
}, |
|
}; |
|
|
|
static struct spear_pingroup sdhci_8bit_pingroup = { |
|
.name = "sdhci_8bit_grp", |
|
.pins = sdhci_8bit_pins, |
|
.npins = ARRAY_SIZE(sdhci_8bit_pins), |
|
.modemuxs = sdhci_8bit_modemux, |
|
.nmodemuxs = ARRAY_SIZE(sdhci_8bit_modemux), |
|
}; |
|
|
|
static const char *const sdhci_grps[] = { "sdhci_4bit_grp", "sdhci_8bit_grp" }; |
|
static struct spear_function sdhci_function = { |
|
.name = "sdhci", |
|
.groups = sdhci_grps, |
|
.ngroups = ARRAY_SIZE(sdhci_grps), |
|
}; |
|
|
|
/* gpio1_0_to_3_pins */ |
|
static const unsigned gpio1_0_to_3_pins[] = { 39, 40, 41, 42 }; |
|
static struct spear_muxreg gpio1_0_to_3_muxreg[] = { |
|
{ |
|
.reg = PMX_CONFIG_REG, |
|
.mask = PMX_UART0_MODEM_MASK, |
|
.val = 0, |
|
}, |
|
}; |
|
|
|
static struct spear_modemux gpio1_0_to_3_modemux[] = { |
|
{ |
|
.modes = PHOTO_FRAME_MODE, |
|
.muxregs = gpio1_0_to_3_muxreg, |
|
.nmuxregs = ARRAY_SIZE(gpio1_0_to_3_muxreg), |
|
}, |
|
}; |
|
|
|
static struct spear_pingroup gpio1_0_to_3_pingroup = { |
|
.name = "gpio1_0_to_3_grp", |
|
.pins = gpio1_0_to_3_pins, |
|
.npins = ARRAY_SIZE(gpio1_0_to_3_pins), |
|
.modemuxs = gpio1_0_to_3_modemux, |
|
.nmodemuxs = ARRAY_SIZE(gpio1_0_to_3_modemux), |
|
}; |
|
|
|
/* gpio1_4_to_7_pins */ |
|
static const unsigned gpio1_4_to_7_pins[] = { 43, 44, 45, 46 }; |
|
|
|
static struct spear_muxreg gpio1_4_to_7_muxreg[] = { |
|
{ |
|
.reg = PMX_CONFIG_REG, |
|
.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK, |
|
.val = 0, |
|
}, |
|
}; |
|
|
|
static struct spear_modemux gpio1_4_to_7_modemux[] = { |
|
{ |
|
.modes = PHOTO_FRAME_MODE, |
|
.muxregs = gpio1_4_to_7_muxreg, |
|
.nmuxregs = ARRAY_SIZE(gpio1_4_to_7_muxreg), |
|
}, |
|
}; |
|
|
|
static struct spear_pingroup gpio1_4_to_7_pingroup = { |
|
.name = "gpio1_4_to_7_grp", |
|
.pins = gpio1_4_to_7_pins, |
|
.npins = ARRAY_SIZE(gpio1_4_to_7_pins), |
|
.modemuxs = gpio1_4_to_7_modemux, |
|
.nmodemuxs = ARRAY_SIZE(gpio1_4_to_7_modemux), |
|
}; |
|
|
|
static const char *const gpio1_grps[] = { "gpio1_0_to_3_grp", "gpio1_4_to_7_grp" |
|
}; |
|
static struct spear_function gpio1_function = { |
|
.name = "gpio1", |
|
.groups = gpio1_grps, |
|
.ngroups = ARRAY_SIZE(gpio1_grps), |
|
}; |
|
|
|
/* pingroups */ |
|
static struct spear_pingroup *spear300_pingroups[] = { |
|
SPEAR3XX_COMMON_PINGROUPS, |
|
&fsmc_2chips_pingroup, |
|
&fsmc_4chips_pingroup, |
|
&clcd_lcdmode_pingroup, |
|
&clcd_pfmode_pingroup, |
|
&tdm_pingroup, |
|
&i2c_clk_pingroup, |
|
&caml_pingroup, |
|
&camu_pingroup, |
|
&dac_pingroup, |
|
&i2s_pingroup, |
|
&sdhci_4bit_pingroup, |
|
&sdhci_8bit_pingroup, |
|
&gpio1_0_to_3_pingroup, |
|
&gpio1_4_to_7_pingroup, |
|
}; |
|
|
|
/* functions */ |
|
static struct spear_function *spear300_functions[] = { |
|
SPEAR3XX_COMMON_FUNCTIONS, |
|
&fsmc_function, |
|
&clcd_function, |
|
&tdm_function, |
|
&i2c_function, |
|
&cam_function, |
|
&dac_function, |
|
&i2s_function, |
|
&sdhci_function, |
|
&gpio1_function, |
|
}; |
|
|
|
static const struct of_device_id spear300_pinctrl_of_match[] = { |
|
{ |
|
.compatible = "st,spear300-pinmux", |
|
}, |
|
{}, |
|
}; |
|
|
|
static int spear300_pinctrl_probe(struct platform_device *pdev) |
|
{ |
|
spear3xx_machdata.groups = spear300_pingroups; |
|
spear3xx_machdata.ngroups = ARRAY_SIZE(spear300_pingroups); |
|
spear3xx_machdata.functions = spear300_functions; |
|
spear3xx_machdata.nfunctions = ARRAY_SIZE(spear300_functions); |
|
spear3xx_machdata.gpio_pingroups = NULL; |
|
spear3xx_machdata.ngpio_pingroups = 0; |
|
|
|
spear3xx_machdata.modes_supported = true; |
|
spear3xx_machdata.pmx_modes = spear300_pmx_modes; |
|
spear3xx_machdata.npmx_modes = ARRAY_SIZE(spear300_pmx_modes); |
|
|
|
pmx_init_addr(&spear3xx_machdata, PMX_CONFIG_REG); |
|
|
|
return spear_pinctrl_probe(pdev, &spear3xx_machdata); |
|
} |
|
|
|
static struct platform_driver spear300_pinctrl_driver = { |
|
.driver = { |
|
.name = DRIVER_NAME, |
|
.of_match_table = spear300_pinctrl_of_match, |
|
}, |
|
.probe = spear300_pinctrl_probe, |
|
}; |
|
|
|
static int __init spear300_pinctrl_init(void) |
|
{ |
|
return platform_driver_register(&spear300_pinctrl_driver); |
|
} |
|
arch_initcall(spear300_pinctrl_init);
|
|
|