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548 lines
13 KiB
548 lines
13 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* PCIe AER software error injection support. |
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* |
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* Debugging PCIe AER code is quite difficult because it is hard to |
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* trigger various real hardware errors. Software based error |
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* injection can fake almost all kinds of errors with the help of a |
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* user space helper tool aer-inject, which can be gotten from: |
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* https://www.kernel.org/pub/linux/utils/pci/aer-inject/ |
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* |
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* Copyright 2009 Intel Corporation. |
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* Huang Ying <[email protected]> |
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*/ |
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|
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#define dev_fmt(fmt) "aer_inject: " fmt |
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|
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#include <linux/module.h> |
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#include <linux/init.h> |
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#include <linux/interrupt.h> |
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#include <linux/miscdevice.h> |
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#include <linux/pci.h> |
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#include <linux/slab.h> |
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#include <linux/fs.h> |
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#include <linux/uaccess.h> |
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#include <linux/stddef.h> |
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#include <linux/device.h> |
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#include "portdrv.h" |
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/* Override the existing corrected and uncorrected error masks */ |
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static bool aer_mask_override; |
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module_param(aer_mask_override, bool, 0); |
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struct aer_error_inj { |
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u8 bus; |
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u8 dev; |
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u8 fn; |
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u32 uncor_status; |
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u32 cor_status; |
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u32 header_log0; |
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u32 header_log1; |
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u32 header_log2; |
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u32 header_log3; |
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u32 domain; |
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}; |
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struct aer_error { |
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struct list_head list; |
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u32 domain; |
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unsigned int bus; |
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unsigned int devfn; |
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int pos_cap_err; |
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u32 uncor_status; |
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u32 cor_status; |
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u32 header_log0; |
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u32 header_log1; |
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u32 header_log2; |
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u32 header_log3; |
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u32 root_status; |
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u32 source_id; |
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}; |
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struct pci_bus_ops { |
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struct list_head list; |
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struct pci_bus *bus; |
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struct pci_ops *ops; |
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}; |
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static LIST_HEAD(einjected); |
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static LIST_HEAD(pci_bus_ops_list); |
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/* Protect einjected and pci_bus_ops_list */ |
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static DEFINE_SPINLOCK(inject_lock); |
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|
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static void aer_error_init(struct aer_error *err, u32 domain, |
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unsigned int bus, unsigned int devfn, |
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int pos_cap_err) |
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{ |
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INIT_LIST_HEAD(&err->list); |
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err->domain = domain; |
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err->bus = bus; |
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err->devfn = devfn; |
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err->pos_cap_err = pos_cap_err; |
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} |
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/* inject_lock must be held before calling */ |
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static struct aer_error *__find_aer_error(u32 domain, unsigned int bus, |
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unsigned int devfn) |
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{ |
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struct aer_error *err; |
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list_for_each_entry(err, &einjected, list) { |
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if (domain == err->domain && |
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bus == err->bus && |
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devfn == err->devfn) |
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return err; |
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} |
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return NULL; |
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} |
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/* inject_lock must be held before calling */ |
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static struct aer_error *__find_aer_error_by_dev(struct pci_dev *dev) |
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{ |
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int domain = pci_domain_nr(dev->bus); |
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if (domain < 0) |
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return NULL; |
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return __find_aer_error(domain, dev->bus->number, dev->devfn); |
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} |
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/* inject_lock must be held before calling */ |
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static struct pci_ops *__find_pci_bus_ops(struct pci_bus *bus) |
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{ |
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struct pci_bus_ops *bus_ops; |
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list_for_each_entry(bus_ops, &pci_bus_ops_list, list) { |
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if (bus_ops->bus == bus) |
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return bus_ops->ops; |
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} |
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return NULL; |
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} |
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static struct pci_bus_ops *pci_bus_ops_pop(void) |
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{ |
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unsigned long flags; |
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struct pci_bus_ops *bus_ops; |
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spin_lock_irqsave(&inject_lock, flags); |
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bus_ops = list_first_entry_or_null(&pci_bus_ops_list, |
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struct pci_bus_ops, list); |
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if (bus_ops) |
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list_del(&bus_ops->list); |
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spin_unlock_irqrestore(&inject_lock, flags); |
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return bus_ops; |
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} |
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static u32 *find_pci_config_dword(struct aer_error *err, int where, |
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int *prw1cs) |
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{ |
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int rw1cs = 0; |
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u32 *target = NULL; |
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if (err->pos_cap_err == -1) |
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return NULL; |
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switch (where - err->pos_cap_err) { |
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case PCI_ERR_UNCOR_STATUS: |
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target = &err->uncor_status; |
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rw1cs = 1; |
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break; |
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case PCI_ERR_COR_STATUS: |
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target = &err->cor_status; |
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rw1cs = 1; |
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break; |
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case PCI_ERR_HEADER_LOG: |
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target = &err->header_log0; |
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break; |
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case PCI_ERR_HEADER_LOG+4: |
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target = &err->header_log1; |
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break; |
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case PCI_ERR_HEADER_LOG+8: |
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target = &err->header_log2; |
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break; |
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case PCI_ERR_HEADER_LOG+12: |
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target = &err->header_log3; |
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break; |
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case PCI_ERR_ROOT_STATUS: |
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target = &err->root_status; |
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rw1cs = 1; |
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break; |
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case PCI_ERR_ROOT_ERR_SRC: |
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target = &err->source_id; |
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break; |
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} |
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if (prw1cs) |
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*prw1cs = rw1cs; |
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return target; |
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} |
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static int aer_inj_read(struct pci_bus *bus, unsigned int devfn, int where, |
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int size, u32 *val) |
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{ |
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struct pci_ops *ops, *my_ops; |
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int rv; |
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ops = __find_pci_bus_ops(bus); |
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if (!ops) |
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return -1; |
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my_ops = bus->ops; |
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bus->ops = ops; |
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rv = ops->read(bus, devfn, where, size, val); |
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bus->ops = my_ops; |
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return rv; |
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} |
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static int aer_inj_write(struct pci_bus *bus, unsigned int devfn, int where, |
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int size, u32 val) |
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{ |
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struct pci_ops *ops, *my_ops; |
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int rv; |
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ops = __find_pci_bus_ops(bus); |
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if (!ops) |
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return -1; |
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my_ops = bus->ops; |
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bus->ops = ops; |
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rv = ops->write(bus, devfn, where, size, val); |
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bus->ops = my_ops; |
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return rv; |
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} |
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static int aer_inj_read_config(struct pci_bus *bus, unsigned int devfn, |
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int where, int size, u32 *val) |
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{ |
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u32 *sim; |
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struct aer_error *err; |
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unsigned long flags; |
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int domain; |
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int rv; |
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spin_lock_irqsave(&inject_lock, flags); |
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if (size != sizeof(u32)) |
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goto out; |
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domain = pci_domain_nr(bus); |
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if (domain < 0) |
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goto out; |
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err = __find_aer_error(domain, bus->number, devfn); |
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if (!err) |
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goto out; |
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sim = find_pci_config_dword(err, where, NULL); |
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if (sim) { |
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*val = *sim; |
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spin_unlock_irqrestore(&inject_lock, flags); |
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return 0; |
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} |
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out: |
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rv = aer_inj_read(bus, devfn, where, size, val); |
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spin_unlock_irqrestore(&inject_lock, flags); |
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return rv; |
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} |
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static int aer_inj_write_config(struct pci_bus *bus, unsigned int devfn, |
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int where, int size, u32 val) |
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{ |
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u32 *sim; |
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struct aer_error *err; |
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unsigned long flags; |
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int rw1cs; |
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int domain; |
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int rv; |
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spin_lock_irqsave(&inject_lock, flags); |
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if (size != sizeof(u32)) |
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goto out; |
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domain = pci_domain_nr(bus); |
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if (domain < 0) |
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goto out; |
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err = __find_aer_error(domain, bus->number, devfn); |
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if (!err) |
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goto out; |
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sim = find_pci_config_dword(err, where, &rw1cs); |
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if (sim) { |
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if (rw1cs) |
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*sim ^= val; |
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else |
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*sim = val; |
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spin_unlock_irqrestore(&inject_lock, flags); |
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return 0; |
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} |
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out: |
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rv = aer_inj_write(bus, devfn, where, size, val); |
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spin_unlock_irqrestore(&inject_lock, flags); |
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return rv; |
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} |
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static struct pci_ops aer_inj_pci_ops = { |
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.read = aer_inj_read_config, |
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.write = aer_inj_write_config, |
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}; |
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static void pci_bus_ops_init(struct pci_bus_ops *bus_ops, |
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struct pci_bus *bus, |
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struct pci_ops *ops) |
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{ |
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INIT_LIST_HEAD(&bus_ops->list); |
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bus_ops->bus = bus; |
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bus_ops->ops = ops; |
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} |
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static int pci_bus_set_aer_ops(struct pci_bus *bus) |
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{ |
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struct pci_ops *ops; |
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struct pci_bus_ops *bus_ops; |
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unsigned long flags; |
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bus_ops = kmalloc(sizeof(*bus_ops), GFP_KERNEL); |
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if (!bus_ops) |
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return -ENOMEM; |
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ops = pci_bus_set_ops(bus, &aer_inj_pci_ops); |
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spin_lock_irqsave(&inject_lock, flags); |
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if (ops == &aer_inj_pci_ops) |
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goto out; |
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pci_bus_ops_init(bus_ops, bus, ops); |
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list_add(&bus_ops->list, &pci_bus_ops_list); |
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bus_ops = NULL; |
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out: |
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spin_unlock_irqrestore(&inject_lock, flags); |
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kfree(bus_ops); |
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return 0; |
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} |
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static int aer_inject(struct aer_error_inj *einj) |
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{ |
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struct aer_error *err, *rperr; |
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struct aer_error *err_alloc = NULL, *rperr_alloc = NULL; |
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struct pci_dev *dev, *rpdev; |
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struct pcie_device *edev; |
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struct device *device; |
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unsigned long flags; |
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unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn); |
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int pos_cap_err, rp_pos_cap_err; |
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u32 sever, cor_mask, uncor_mask, cor_mask_orig = 0, uncor_mask_orig = 0; |
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int ret = 0; |
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dev = pci_get_domain_bus_and_slot(einj->domain, einj->bus, devfn); |
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if (!dev) |
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return -ENODEV; |
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rpdev = pcie_find_root_port(dev); |
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/* If Root Port not found, try to find an RCEC */ |
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if (!rpdev) |
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rpdev = dev->rcec; |
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if (!rpdev) { |
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pci_err(dev, "Neither Root Port nor RCEC found\n"); |
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ret = -ENODEV; |
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goto out_put; |
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} |
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pos_cap_err = dev->aer_cap; |
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if (!pos_cap_err) { |
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pci_err(dev, "Device doesn't support AER\n"); |
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ret = -EPROTONOSUPPORT; |
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goto out_put; |
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} |
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pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever); |
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pci_read_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK, &cor_mask); |
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pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK, |
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&uncor_mask); |
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rp_pos_cap_err = rpdev->aer_cap; |
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if (!rp_pos_cap_err) { |
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pci_err(rpdev, "Root port doesn't support AER\n"); |
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ret = -EPROTONOSUPPORT; |
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goto out_put; |
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} |
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err_alloc = kzalloc(sizeof(struct aer_error), GFP_KERNEL); |
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if (!err_alloc) { |
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ret = -ENOMEM; |
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goto out_put; |
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} |
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rperr_alloc = kzalloc(sizeof(struct aer_error), GFP_KERNEL); |
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if (!rperr_alloc) { |
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ret = -ENOMEM; |
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goto out_put; |
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} |
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if (aer_mask_override) { |
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cor_mask_orig = cor_mask; |
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cor_mask &= !(einj->cor_status); |
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pci_write_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK, |
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cor_mask); |
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uncor_mask_orig = uncor_mask; |
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uncor_mask &= !(einj->uncor_status); |
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pci_write_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK, |
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uncor_mask); |
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} |
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spin_lock_irqsave(&inject_lock, flags); |
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err = __find_aer_error_by_dev(dev); |
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if (!err) { |
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err = err_alloc; |
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err_alloc = NULL; |
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aer_error_init(err, einj->domain, einj->bus, devfn, |
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pos_cap_err); |
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list_add(&err->list, &einjected); |
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} |
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err->uncor_status |= einj->uncor_status; |
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err->cor_status |= einj->cor_status; |
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err->header_log0 = einj->header_log0; |
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err->header_log1 = einj->header_log1; |
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err->header_log2 = einj->header_log2; |
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err->header_log3 = einj->header_log3; |
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if (!aer_mask_override && einj->cor_status && |
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!(einj->cor_status & ~cor_mask)) { |
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ret = -EINVAL; |
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pci_warn(dev, "The correctable error(s) is masked by device\n"); |
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spin_unlock_irqrestore(&inject_lock, flags); |
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goto out_put; |
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} |
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if (!aer_mask_override && einj->uncor_status && |
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!(einj->uncor_status & ~uncor_mask)) { |
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ret = -EINVAL; |
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pci_warn(dev, "The uncorrectable error(s) is masked by device\n"); |
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spin_unlock_irqrestore(&inject_lock, flags); |
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goto out_put; |
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} |
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rperr = __find_aer_error_by_dev(rpdev); |
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if (!rperr) { |
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rperr = rperr_alloc; |
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rperr_alloc = NULL; |
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aer_error_init(rperr, pci_domain_nr(rpdev->bus), |
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rpdev->bus->number, rpdev->devfn, |
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rp_pos_cap_err); |
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list_add(&rperr->list, &einjected); |
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} |
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if (einj->cor_status) { |
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if (rperr->root_status & PCI_ERR_ROOT_COR_RCV) |
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rperr->root_status |= PCI_ERR_ROOT_MULTI_COR_RCV; |
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else |
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rperr->root_status |= PCI_ERR_ROOT_COR_RCV; |
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rperr->source_id &= 0xffff0000; |
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rperr->source_id |= (einj->bus << 8) | devfn; |
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} |
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if (einj->uncor_status) { |
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if (rperr->root_status & PCI_ERR_ROOT_UNCOR_RCV) |
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rperr->root_status |= PCI_ERR_ROOT_MULTI_UNCOR_RCV; |
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if (sever & einj->uncor_status) { |
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rperr->root_status |= PCI_ERR_ROOT_FATAL_RCV; |
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if (!(rperr->root_status & PCI_ERR_ROOT_UNCOR_RCV)) |
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rperr->root_status |= PCI_ERR_ROOT_FIRST_FATAL; |
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} else |
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rperr->root_status |= PCI_ERR_ROOT_NONFATAL_RCV; |
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rperr->root_status |= PCI_ERR_ROOT_UNCOR_RCV; |
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rperr->source_id &= 0x0000ffff; |
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rperr->source_id |= ((einj->bus << 8) | devfn) << 16; |
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} |
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spin_unlock_irqrestore(&inject_lock, flags); |
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if (aer_mask_override) { |
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pci_write_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK, |
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cor_mask_orig); |
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pci_write_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK, |
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uncor_mask_orig); |
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} |
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ret = pci_bus_set_aer_ops(dev->bus); |
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if (ret) |
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goto out_put; |
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ret = pci_bus_set_aer_ops(rpdev->bus); |
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if (ret) |
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goto out_put; |
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device = pcie_port_find_device(rpdev, PCIE_PORT_SERVICE_AER); |
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if (device) { |
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edev = to_pcie_device(device); |
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if (!get_service_data(edev)) { |
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pci_warn(edev->port, "AER service is not initialized\n"); |
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ret = -EPROTONOSUPPORT; |
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goto out_put; |
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} |
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pci_info(edev->port, "Injecting errors %08x/%08x into device %s\n", |
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einj->cor_status, einj->uncor_status, pci_name(dev)); |
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ret = irq_inject_interrupt(edev->irq); |
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} else { |
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pci_err(rpdev, "AER device not found\n"); |
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ret = -ENODEV; |
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} |
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out_put: |
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kfree(err_alloc); |
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kfree(rperr_alloc); |
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pci_dev_put(dev); |
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return ret; |
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} |
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static ssize_t aer_inject_write(struct file *filp, const char __user *ubuf, |
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size_t usize, loff_t *off) |
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{ |
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struct aer_error_inj einj; |
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int ret; |
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if (!capable(CAP_SYS_ADMIN)) |
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return -EPERM; |
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if (usize < offsetof(struct aer_error_inj, domain) || |
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usize > sizeof(einj)) |
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return -EINVAL; |
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memset(&einj, 0, sizeof(einj)); |
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if (copy_from_user(&einj, ubuf, usize)) |
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return -EFAULT; |
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ret = aer_inject(&einj); |
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return ret ? ret : usize; |
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} |
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static const struct file_operations aer_inject_fops = { |
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.write = aer_inject_write, |
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.owner = THIS_MODULE, |
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.llseek = noop_llseek, |
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}; |
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static struct miscdevice aer_inject_device = { |
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.minor = MISC_DYNAMIC_MINOR, |
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.name = "aer_inject", |
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.fops = &aer_inject_fops, |
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}; |
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static int __init aer_inject_init(void) |
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{ |
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return misc_register(&aer_inject_device); |
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} |
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static void __exit aer_inject_exit(void) |
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{ |
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struct aer_error *err, *err_next; |
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unsigned long flags; |
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struct pci_bus_ops *bus_ops; |
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misc_deregister(&aer_inject_device); |
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while ((bus_ops = pci_bus_ops_pop())) { |
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pci_bus_set_ops(bus_ops->bus, bus_ops->ops); |
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kfree(bus_ops); |
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} |
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spin_lock_irqsave(&inject_lock, flags); |
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list_for_each_entry_safe(err, err_next, &einjected, list) { |
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list_del(&err->list); |
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kfree(err); |
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} |
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spin_unlock_irqrestore(&inject_lock, flags); |
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} |
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module_init(aer_inject_init); |
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module_exit(aer_inject_exit); |
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|
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MODULE_DESCRIPTION("PCIe AER software error injector"); |
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MODULE_LICENSE("GPL");
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