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405 lines
9.3 KiB
405 lines
9.3 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* This file is part of wl18xx |
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* |
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* Copyright (C) 2011 Texas Instruments. All rights reserved. |
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*/ |
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#ifndef __WL18XX_ACX_H__ |
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#define __WL18XX_ACX_H__ |
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#include "../wlcore/wlcore.h" |
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#include "../wlcore/acx.h" |
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enum { |
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ACX_NS_IPV6_FILTER = 0x0050, |
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ACX_PEER_HT_OPERATION_MODE_CFG = 0x0051, |
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ACX_CSUM_CONFIG = 0x0052, |
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ACX_SIM_CONFIG = 0x0053, |
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ACX_CLEAR_STATISTICS = 0x0054, |
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ACX_AUTO_RX_STREAMING = 0x0055, |
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ACX_PEER_CAP = 0x0056, |
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ACX_INTERRUPT_NOTIFY = 0x0057, |
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ACX_RX_BA_FILTER = 0x0058, |
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ACX_AP_SLEEP_CFG = 0x0059, |
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ACX_DYNAMIC_TRACES_CFG = 0x005A, |
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ACX_TIME_SYNC_CFG = 0x005B, |
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}; |
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/* numbers of bits the length field takes (add 1 for the actual number) */ |
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#define WL18XX_HOST_IF_LEN_SIZE_FIELD 15 |
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#define WL18XX_ACX_EVENTS_VECTOR (WL1271_ACX_INTR_WATCHDOG | \ |
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WL1271_ACX_INTR_INIT_COMPLETE | \ |
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WL1271_ACX_INTR_EVENT_A | \ |
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WL1271_ACX_INTR_EVENT_B | \ |
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WL1271_ACX_INTR_CMD_COMPLETE | \ |
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WL1271_ACX_INTR_HW_AVAILABLE | \ |
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WL1271_ACX_INTR_DATA | \ |
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WL1271_ACX_SW_INTR_WATCHDOG) |
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#define WL18XX_INTR_MASK (WL1271_ACX_INTR_WATCHDOG | \ |
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WL1271_ACX_INTR_EVENT_A | \ |
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WL1271_ACX_INTR_EVENT_B | \ |
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WL1271_ACX_INTR_HW_AVAILABLE | \ |
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WL1271_ACX_INTR_DATA | \ |
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WL1271_ACX_SW_INTR_WATCHDOG) |
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struct wl18xx_acx_host_config_bitmap { |
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struct acx_header header; |
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__le32 host_cfg_bitmap; |
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__le32 host_sdio_block_size; |
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/* extra mem blocks per frame in TX. */ |
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__le32 extra_mem_blocks; |
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/* |
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* number of bits of the length field in the first TX word |
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* (up to 15 - for using the entire 16 bits). |
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*/ |
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__le32 length_field_size; |
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} __packed; |
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enum { |
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CHECKSUM_OFFLOAD_DISABLED = 0, |
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CHECKSUM_OFFLOAD_ENABLED = 1, |
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CHECKSUM_OFFLOAD_FAKE_RX = 2, |
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CHECKSUM_OFFLOAD_INVALID = 0xFF |
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}; |
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struct wl18xx_acx_checksum_state { |
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struct acx_header header; |
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/* enum acx_checksum_state */ |
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u8 checksum_state; |
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u8 pad[3]; |
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} __packed; |
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struct wl18xx_acx_error_stats { |
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u32 error_frame_non_ctrl; |
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u32 error_frame_ctrl; |
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u32 error_frame_during_protection; |
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u32 null_frame_tx_start; |
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u32 null_frame_cts_start; |
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u32 bar_retry; |
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u32 num_frame_cts_nul_flid; |
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u32 tx_abort_failure; |
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u32 tx_resume_failure; |
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u32 rx_cmplt_db_overflow_cnt; |
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u32 elp_while_rx_exch; |
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u32 elp_while_tx_exch; |
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u32 elp_while_tx; |
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u32 elp_while_nvic_pending; |
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u32 rx_excessive_frame_len; |
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u32 burst_mismatch; |
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u32 tbc_exch_mismatch; |
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} __packed; |
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#define NUM_OF_RATES_INDEXES 30 |
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struct wl18xx_acx_tx_stats { |
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u32 tx_prepared_descs; |
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u32 tx_cmplt; |
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u32 tx_template_prepared; |
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u32 tx_data_prepared; |
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u32 tx_template_programmed; |
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u32 tx_data_programmed; |
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u32 tx_burst_programmed; |
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u32 tx_starts; |
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u32 tx_stop; |
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u32 tx_start_templates; |
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u32 tx_start_int_templates; |
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u32 tx_start_fw_gen; |
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u32 tx_start_data; |
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u32 tx_start_null_frame; |
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u32 tx_exch; |
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u32 tx_retry_template; |
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u32 tx_retry_data; |
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u32 tx_retry_per_rate[NUM_OF_RATES_INDEXES]; |
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u32 tx_exch_pending; |
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u32 tx_exch_expiry; |
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u32 tx_done_template; |
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u32 tx_done_data; |
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u32 tx_done_int_template; |
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u32 tx_cfe1; |
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u32 tx_cfe2; |
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u32 frag_called; |
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u32 frag_mpdu_alloc_failed; |
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u32 frag_init_called; |
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u32 frag_in_process_called; |
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u32 frag_tkip_called; |
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u32 frag_key_not_found; |
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u32 frag_need_fragmentation; |
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u32 frag_bad_mblk_num; |
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u32 frag_failed; |
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u32 frag_cache_hit; |
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u32 frag_cache_miss; |
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} __packed; |
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struct wl18xx_acx_rx_stats { |
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u32 rx_beacon_early_term; |
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u32 rx_out_of_mpdu_nodes; |
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u32 rx_hdr_overflow; |
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u32 rx_dropped_frame; |
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u32 rx_done_stage; |
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u32 rx_done; |
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u32 rx_defrag; |
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u32 rx_defrag_end; |
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u32 rx_cmplt; |
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u32 rx_pre_complt; |
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u32 rx_cmplt_task; |
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u32 rx_phy_hdr; |
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u32 rx_timeout; |
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u32 rx_rts_timeout; |
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u32 rx_timeout_wa; |
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u32 defrag_called; |
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u32 defrag_init_called; |
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u32 defrag_in_process_called; |
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u32 defrag_tkip_called; |
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u32 defrag_need_defrag; |
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u32 defrag_decrypt_failed; |
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u32 decrypt_key_not_found; |
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u32 defrag_need_decrypt; |
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u32 rx_tkip_replays; |
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u32 rx_xfr; |
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} __packed; |
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struct wl18xx_acx_isr_stats { |
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u32 irqs; |
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} __packed; |
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#define PWR_STAT_MAX_CONT_MISSED_BCNS_SPREAD 10 |
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struct wl18xx_acx_pwr_stats { |
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u32 missing_bcns_cnt; |
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u32 rcvd_bcns_cnt; |
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u32 connection_out_of_sync; |
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u32 cont_miss_bcns_spread[PWR_STAT_MAX_CONT_MISSED_BCNS_SPREAD]; |
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u32 rcvd_awake_bcns_cnt; |
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u32 sleep_time_count; |
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u32 sleep_time_avg; |
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u32 sleep_cycle_avg; |
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u32 sleep_percent; |
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u32 ap_sleep_active_conf; |
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u32 ap_sleep_user_conf; |
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u32 ap_sleep_counter; |
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} __packed; |
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struct wl18xx_acx_rx_filter_stats { |
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u32 beacon_filter; |
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u32 arp_filter; |
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u32 mc_filter; |
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u32 dup_filter; |
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u32 data_filter; |
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u32 ibss_filter; |
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u32 protection_filter; |
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u32 accum_arp_pend_requests; |
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u32 max_arp_queue_dep; |
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} __packed; |
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struct wl18xx_acx_rx_rate_stats { |
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u32 rx_frames_per_rates[50]; |
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} __packed; |
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#define AGGR_STATS_TX_AGG 16 |
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#define AGGR_STATS_RX_SIZE_LEN 16 |
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struct wl18xx_acx_aggr_stats { |
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u32 tx_agg_rate[AGGR_STATS_TX_AGG]; |
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u32 tx_agg_len[AGGR_STATS_TX_AGG]; |
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u32 rx_size[AGGR_STATS_RX_SIZE_LEN]; |
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} __packed; |
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#define PIPE_STATS_HW_FIFO 11 |
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struct wl18xx_acx_pipeline_stats { |
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u32 hs_tx_stat_fifo_int; |
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u32 hs_rx_stat_fifo_int; |
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u32 enc_tx_stat_fifo_int; |
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u32 enc_rx_stat_fifo_int; |
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u32 rx_complete_stat_fifo_int; |
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u32 pre_proc_swi; |
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u32 post_proc_swi; |
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u32 sec_frag_swi; |
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u32 pre_to_defrag_swi; |
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u32 defrag_to_rx_xfer_swi; |
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u32 dec_packet_in; |
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u32 dec_packet_in_fifo_full; |
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u32 dec_packet_out; |
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u16 pipeline_fifo_full[PIPE_STATS_HW_FIFO]; |
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u16 padding; |
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} __packed; |
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#define DIVERSITY_STATS_NUM_OF_ANT 2 |
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struct wl18xx_acx_diversity_stats { |
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u32 num_of_packets_per_ant[DIVERSITY_STATS_NUM_OF_ANT]; |
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u32 total_num_of_toggles; |
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} __packed; |
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struct wl18xx_acx_thermal_stats { |
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u16 irq_thr_low; |
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u16 irq_thr_high; |
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u16 tx_stop; |
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u16 tx_resume; |
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u16 false_irq; |
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u16 adc_source_unexpected; |
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} __packed; |
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#define WL18XX_NUM_OF_CALIBRATIONS_ERRORS 18 |
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struct wl18xx_acx_calib_failure_stats { |
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u16 fail_count[WL18XX_NUM_OF_CALIBRATIONS_ERRORS]; |
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u32 calib_count; |
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} __packed; |
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struct wl18xx_roaming_stats { |
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s32 rssi_level; |
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} __packed; |
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struct wl18xx_dfs_stats { |
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u32 num_of_radar_detections; |
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} __packed; |
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struct wl18xx_acx_statistics { |
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struct acx_header header; |
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struct wl18xx_acx_error_stats error; |
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struct wl18xx_acx_tx_stats tx; |
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struct wl18xx_acx_rx_stats rx; |
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struct wl18xx_acx_isr_stats isr; |
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struct wl18xx_acx_pwr_stats pwr; |
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struct wl18xx_acx_rx_filter_stats rx_filter; |
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struct wl18xx_acx_rx_rate_stats rx_rate; |
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struct wl18xx_acx_aggr_stats aggr_size; |
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struct wl18xx_acx_pipeline_stats pipeline; |
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struct wl18xx_acx_diversity_stats diversity; |
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struct wl18xx_acx_thermal_stats thermal; |
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struct wl18xx_acx_calib_failure_stats calib; |
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struct wl18xx_roaming_stats roaming; |
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struct wl18xx_dfs_stats dfs; |
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} __packed; |
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struct wl18xx_acx_clear_statistics { |
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struct acx_header header; |
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}; |
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enum wlcore_bandwidth { |
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WLCORE_BANDWIDTH_20MHZ, |
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WLCORE_BANDWIDTH_40MHZ, |
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}; |
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struct wlcore_peer_ht_operation_mode { |
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struct acx_header header; |
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u8 hlid; |
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u8 bandwidth; /* enum wlcore_bandwidth */ |
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u8 padding[2]; |
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}; |
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/* |
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* ACX_PEER_CAP |
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* this struct is very similar to wl1271_acx_ht_capabilities, with the |
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* addition of supported rates |
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*/ |
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struct wlcore_acx_peer_cap { |
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struct acx_header header; |
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/* bitmask of capability bits supported by the peer */ |
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__le32 ht_capabilites; |
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/* rates supported by the remote peer */ |
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__le32 supported_rates; |
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/* Indicates to which link these capabilities apply. */ |
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u8 hlid; |
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/* |
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* This the maximum A-MPDU length supported by the AP. The FW may not |
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* exceed this length when sending A-MPDUs |
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*/ |
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u8 ampdu_max_length; |
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/* This is the minimal spacing required when sending A-MPDUs to the AP*/ |
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u8 ampdu_min_spacing; |
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u8 padding; |
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} __packed; |
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/* |
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* ACX_INTERRUPT_NOTIFY |
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* enable/disable fast-link/PSM notification from FW |
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*/ |
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struct wl18xx_acx_interrupt_notify { |
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struct acx_header header; |
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u32 enable; |
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}; |
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/* |
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* ACX_RX_BA_FILTER |
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* enable/disable RX BA filtering in FW |
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*/ |
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struct wl18xx_acx_rx_ba_filter { |
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struct acx_header header; |
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u32 enable; |
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}; |
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struct acx_ap_sleep_cfg { |
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struct acx_header header; |
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/* Duty Cycle (20-80% of staying Awake) for IDLE AP |
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* (0: disable) |
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*/ |
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u8 idle_duty_cycle; |
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/* Duty Cycle (20-80% of staying Awake) for Connected AP |
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* (0: disable) |
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*/ |
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u8 connected_duty_cycle; |
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/* Maximum stations that are allowed to be connected to AP |
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* (255: no limit) |
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*/ |
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u8 max_stations_thresh; |
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/* Timeout till enabling the Sleep Mechanism after data stops |
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* [unit: 100 msec] |
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*/ |
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u8 idle_conn_thresh; |
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} __packed; |
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/* |
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* ACX_DYNAMIC_TRACES_CFG |
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* configure the FW dynamic traces |
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*/ |
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struct acx_dynamic_fw_traces_cfg { |
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struct acx_header header; |
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__le32 dynamic_fw_traces; |
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} __packed; |
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/* |
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* ACX_TIME_SYNC_CFG |
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* configure the time sync parameters |
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*/ |
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struct acx_time_sync_cfg { |
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struct acx_header header; |
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u8 sync_mode; |
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u8 zone_mac_addr[ETH_ALEN]; |
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u8 padding[1]; |
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} __packed; |
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int wl18xx_acx_host_if_cfg_bitmap(struct wl1271 *wl, u32 host_cfg_bitmap, |
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u32 sdio_blk_size, u32 extra_mem_blks, |
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u32 len_field_size); |
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int wl18xx_acx_set_checksum_state(struct wl1271 *wl); |
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int wl18xx_acx_clear_statistics(struct wl1271 *wl); |
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int wl18xx_acx_peer_ht_operation_mode(struct wl1271 *wl, u8 hlid, bool wide); |
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int wl18xx_acx_set_peer_cap(struct wl1271 *wl, |
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struct ieee80211_sta_ht_cap *ht_cap, |
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bool allow_ht_operation, |
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u32 rate_set, u8 hlid); |
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int wl18xx_acx_interrupt_notify_config(struct wl1271 *wl, bool action); |
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int wl18xx_acx_rx_ba_filter(struct wl1271 *wl, bool action); |
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int wl18xx_acx_ap_sleep(struct wl1271 *wl); |
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int wl18xx_acx_dynamic_fw_traces(struct wl1271 *wl); |
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int wl18xx_acx_time_sync_cfg(struct wl1271 *wl); |
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#endif /* __WL18XX_ACX_H__ */
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