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97 lines
2.9 KiB
97 lines
2.9 KiB
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause |
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/* |
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* Copyright (C) 2017 Intel Deutschland GmbH |
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* Copyright (C) 2019-2020 Intel Corporation |
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*/ |
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#include "iwl-drv.h" |
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#include "runtime.h" |
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#include "dbg.h" |
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#include "debugfs.h" |
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#include "fw/api/soc.h" |
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#include "fw/api/commands.h" |
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void iwl_fw_runtime_init(struct iwl_fw_runtime *fwrt, struct iwl_trans *trans, |
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const struct iwl_fw *fw, |
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const struct iwl_fw_runtime_ops *ops, void *ops_ctx, |
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struct dentry *dbgfs_dir) |
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{ |
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int i; |
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memset(fwrt, 0, sizeof(*fwrt)); |
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fwrt->trans = trans; |
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fwrt->fw = fw; |
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fwrt->dev = trans->dev; |
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fwrt->dump.conf = FW_DBG_INVALID; |
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fwrt->ops = ops; |
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fwrt->ops_ctx = ops_ctx; |
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for (i = 0; i < IWL_FW_RUNTIME_DUMP_WK_NUM; i++) { |
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fwrt->dump.wks[i].idx = i; |
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INIT_DELAYED_WORK(&fwrt->dump.wks[i].wk, iwl_fw_error_dump_wk); |
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} |
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iwl_fwrt_dbgfs_register(fwrt, dbgfs_dir); |
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} |
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IWL_EXPORT_SYMBOL(iwl_fw_runtime_init); |
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void iwl_fw_runtime_suspend(struct iwl_fw_runtime *fwrt) |
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{ |
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iwl_fw_suspend_timestamp(fwrt); |
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iwl_dbg_tlv_time_point(fwrt, IWL_FW_INI_TIME_POINT_HOST_D3_START, NULL); |
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} |
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IWL_EXPORT_SYMBOL(iwl_fw_runtime_suspend); |
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void iwl_fw_runtime_resume(struct iwl_fw_runtime *fwrt) |
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{ |
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iwl_dbg_tlv_time_point(fwrt, IWL_FW_INI_TIME_POINT_HOST_D3_END, NULL); |
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iwl_fw_resume_timestamp(fwrt); |
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} |
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IWL_EXPORT_SYMBOL(iwl_fw_runtime_resume); |
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/* set device type and latency */ |
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int iwl_set_soc_latency(struct iwl_fw_runtime *fwrt) |
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{ |
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struct iwl_soc_configuration_cmd cmd = {}; |
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struct iwl_host_cmd hcmd = { |
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.id = iwl_cmd_id(SOC_CONFIGURATION_CMD, SYSTEM_GROUP, 0), |
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.data[0] = &cmd, |
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.len[0] = sizeof(cmd), |
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}; |
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int ret; |
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/* |
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* In VER_1 of this command, the discrete value is considered |
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* an integer; In VER_2, it's a bitmask. Since we have only 2 |
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* values in VER_1, this is backwards-compatible with VER_2, |
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* as long as we don't set any other bits. |
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*/ |
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if (!fwrt->trans->trans_cfg->integrated) |
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cmd.flags = cpu_to_le32(SOC_CONFIG_CMD_FLAGS_DISCRETE); |
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BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_NONE != |
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SOC_FLAGS_LTR_APPLY_DELAY_NONE); |
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BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_200US != |
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SOC_FLAGS_LTR_APPLY_DELAY_200); |
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BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_2500US != |
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SOC_FLAGS_LTR_APPLY_DELAY_2500); |
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BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_1820US != |
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SOC_FLAGS_LTR_APPLY_DELAY_1820); |
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if (fwrt->trans->trans_cfg->ltr_delay != IWL_CFG_TRANS_LTR_DELAY_NONE && |
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!WARN_ON(!fwrt->trans->trans_cfg->integrated)) |
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cmd.flags |= le32_encode_bits(fwrt->trans->trans_cfg->ltr_delay, |
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SOC_FLAGS_LTR_APPLY_DELAY_MASK); |
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if (iwl_fw_lookup_cmd_ver(fwrt->fw, IWL_ALWAYS_LONG_GROUP, |
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SCAN_REQ_UMAC, |
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IWL_FW_CMD_VER_UNKNOWN) >= 2 && |
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fwrt->trans->trans_cfg->low_latency_xtal) |
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cmd.flags |= cpu_to_le32(SOC_CONFIG_CMD_FLAGS_LOW_LATENCY); |
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cmd.latency = cpu_to_le32(fwrt->trans->trans_cfg->xtal_latency); |
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ret = iwl_trans_send_cmd(fwrt->trans, &hcmd); |
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if (ret) |
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IWL_ERR(fwrt, "Failed to set soc latency: %d\n", ret); |
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return ret; |
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} |
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IWL_EXPORT_SYMBOL(iwl_set_soc_latency);
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