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65 lines
1.8 KiB
65 lines
1.8 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* |
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* Copyright (c) 2013-2016, Intel Corporation. All rights reserved. |
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* Intel Management Engine Interface (Intel MEI) Linux driver |
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*/ |
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#ifndef _MEI_HW_TXE_H_ |
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#define _MEI_HW_TXE_H_ |
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#include <linux/irqreturn.h> |
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#include "hw.h" |
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#include "hw-txe-regs.h" |
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#define MEI_TXI_RPM_TIMEOUT 500 /* ms */ |
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/* Flatten Hierarchy interrupt cause */ |
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#define TXE_INTR_READINESS_BIT 0 /* HISR_INT_0_STS */ |
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#define TXE_INTR_READINESS HISR_INT_0_STS |
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#define TXE_INTR_ALIVENESS_BIT 1 /* HISR_INT_1_STS */ |
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#define TXE_INTR_ALIVENESS HISR_INT_1_STS |
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#define TXE_INTR_OUT_DB_BIT 2 /* HISR_INT_2_STS */ |
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#define TXE_INTR_OUT_DB HISR_INT_2_STS |
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#define TXE_INTR_IN_READY_BIT 8 /* beyond HISR */ |
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#define TXE_INTR_IN_READY BIT(8) |
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/** |
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* struct mei_txe_hw - txe hardware specifics |
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* |
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* @mem_addr: SeC and BRIDGE bars |
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* @aliveness: aliveness (power gating) state of the hardware |
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* @readiness: readiness state of the hardware |
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* @slots: number of empty slots |
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* @wait_aliveness_resp: aliveness wait queue |
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* @intr_cause: translated interrupt cause |
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*/ |
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struct mei_txe_hw { |
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void __iomem * const *mem_addr; |
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u32 aliveness; |
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u32 readiness; |
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u32 slots; |
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wait_queue_head_t wait_aliveness_resp; |
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unsigned long intr_cause; |
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}; |
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#define to_txe_hw(dev) (struct mei_txe_hw *)((dev)->hw) |
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static inline struct mei_device *hw_txe_to_mei(struct mei_txe_hw *hw) |
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{ |
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return container_of((void *)hw, struct mei_device, hw); |
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} |
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struct mei_device *mei_txe_dev_init(struct pci_dev *pdev); |
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irqreturn_t mei_txe_irq_quick_handler(int irq, void *dev_id); |
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irqreturn_t mei_txe_irq_thread_handler(int irq, void *dev_id); |
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int mei_txe_aliveness_set_sync(struct mei_device *dev, u32 req); |
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int mei_txe_setup_satt2(struct mei_device *dev, phys_addr_t addr, u32 range); |
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#endif /* _MEI_HW_TXE_H_ */
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