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762 lines
20 KiB
762 lines
20 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* ad525x_dpot: Driver for the Analog Devices digital potentiometers |
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* Copyright (c) 2009-2010 Analog Devices, Inc. |
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* Author: Michael Hennerich <[email protected]> |
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* |
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* DEVID #Wipers #Positions Resistor Options (kOhm) |
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* AD5258 1 64 1, 10, 50, 100 |
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* AD5259 1 256 5, 10, 50, 100 |
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* AD5251 2 64 1, 10, 50, 100 |
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* AD5252 2 256 1, 10, 50, 100 |
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* AD5255 3 512 25, 250 |
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* AD5253 4 64 1, 10, 50, 100 |
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* AD5254 4 256 1, 10, 50, 100 |
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* AD5160 1 256 5, 10, 50, 100 |
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* AD5161 1 256 5, 10, 50, 100 |
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* AD5162 2 256 2.5, 10, 50, 100 |
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* AD5165 1 256 100 |
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* AD5200 1 256 10, 50 |
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* AD5201 1 33 10, 50 |
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* AD5203 4 64 10, 100 |
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* AD5204 4 256 10, 50, 100 |
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* AD5206 6 256 10, 50, 100 |
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* AD5207 2 256 10, 50, 100 |
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* AD5231 1 1024 10, 50, 100 |
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* AD5232 2 256 10, 50, 100 |
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* AD5233 4 64 10, 50, 100 |
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* AD5235 2 1024 25, 250 |
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* AD5260 1 256 20, 50, 200 |
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* AD5262 2 256 20, 50, 200 |
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* AD5263 4 256 20, 50, 200 |
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* AD5290 1 256 10, 50, 100 |
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* AD5291 1 256 20, 50, 100 (20-TP) |
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* AD5292 1 1024 20, 50, 100 (20-TP) |
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* AD5293 1 1024 20, 50, 100 |
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* AD7376 1 128 10, 50, 100, 1M |
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* AD8400 1 256 1, 10, 50, 100 |
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* AD8402 2 256 1, 10, 50, 100 |
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* AD8403 4 256 1, 10, 50, 100 |
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* ADN2850 3 512 25, 250 |
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* AD5241 1 256 10, 100, 1M |
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* AD5246 1 128 5, 10, 50, 100 |
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* AD5247 1 128 5, 10, 50, 100 |
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* AD5245 1 256 5, 10, 50, 100 |
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* AD5243 2 256 2.5, 10, 50, 100 |
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* AD5248 2 256 2.5, 10, 50, 100 |
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* AD5242 2 256 20, 50, 200 |
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* AD5280 1 256 20, 50, 200 |
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* AD5282 2 256 20, 50, 200 |
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* ADN2860 3 512 25, 250 |
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* AD5273 1 64 1, 10, 50, 100 (OTP) |
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* AD5171 1 64 5, 10, 50, 100 (OTP) |
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* AD5170 1 256 2.5, 10, 50, 100 (OTP) |
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* AD5172 2 256 2.5, 10, 50, 100 (OTP) |
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* AD5173 2 256 2.5, 10, 50, 100 (OTP) |
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* AD5270 1 1024 20, 50, 100 (50-TP) |
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* AD5271 1 256 20, 50, 100 (50-TP) |
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* AD5272 1 1024 20, 50, 100 (50-TP) |
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* AD5274 1 256 20, 50, 100 (50-TP) |
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* |
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* See Documentation/misc-devices/ad525x_dpot.rst for more info. |
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* |
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* derived from ad5258.c |
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* Copyright (c) 2009 Cyber Switching, Inc. |
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* Author: Chris Verges <[email protected]> |
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* |
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* derived from ad5252.c |
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* Copyright (c) 2006-2011 Michael Hennerich <[email protected]> |
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*/ |
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#include <linux/module.h> |
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#include <linux/device.h> |
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#include <linux/kernel.h> |
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#include <linux/delay.h> |
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#include <linux/slab.h> |
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#include "ad525x_dpot.h" |
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|
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/* |
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* Client data (each client gets its own) |
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*/ |
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struct dpot_data { |
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struct ad_dpot_bus_data bdata; |
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struct mutex update_lock; |
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unsigned int rdac_mask; |
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unsigned int max_pos; |
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unsigned long devid; |
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unsigned int uid; |
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unsigned int feat; |
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unsigned int wipers; |
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u16 rdac_cache[MAX_RDACS]; |
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DECLARE_BITMAP(otp_en_mask, MAX_RDACS); |
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}; |
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static inline int dpot_read_d8(struct dpot_data *dpot) |
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{ |
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return dpot->bdata.bops->read_d8(dpot->bdata.client); |
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} |
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static inline int dpot_read_r8d8(struct dpot_data *dpot, u8 reg) |
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{ |
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return dpot->bdata.bops->read_r8d8(dpot->bdata.client, reg); |
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} |
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static inline int dpot_read_r8d16(struct dpot_data *dpot, u8 reg) |
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{ |
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return dpot->bdata.bops->read_r8d16(dpot->bdata.client, reg); |
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} |
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static inline int dpot_write_d8(struct dpot_data *dpot, u8 val) |
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{ |
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return dpot->bdata.bops->write_d8(dpot->bdata.client, val); |
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} |
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static inline int dpot_write_r8d8(struct dpot_data *dpot, u8 reg, u16 val) |
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{ |
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return dpot->bdata.bops->write_r8d8(dpot->bdata.client, reg, val); |
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} |
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static inline int dpot_write_r8d16(struct dpot_data *dpot, u8 reg, u16 val) |
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{ |
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return dpot->bdata.bops->write_r8d16(dpot->bdata.client, reg, val); |
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} |
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static s32 dpot_read_spi(struct dpot_data *dpot, u8 reg) |
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{ |
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unsigned int ctrl = 0; |
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int value; |
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if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD))) { |
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if (dpot->feat & F_RDACS_WONLY) |
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return dpot->rdac_cache[reg & DPOT_RDAC_MASK]; |
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if (dpot->uid == DPOT_UID(AD5291_ID) || |
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dpot->uid == DPOT_UID(AD5292_ID) || |
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dpot->uid == DPOT_UID(AD5293_ID)) { |
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value = dpot_read_r8d8(dpot, |
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DPOT_AD5291_READ_RDAC << 2); |
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if (dpot->uid == DPOT_UID(AD5291_ID)) |
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value = value >> 2; |
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return value; |
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} else if (dpot->uid == DPOT_UID(AD5270_ID) || |
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dpot->uid == DPOT_UID(AD5271_ID)) { |
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value = dpot_read_r8d8(dpot, |
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DPOT_AD5270_1_2_4_READ_RDAC << 2); |
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if (value < 0) |
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return value; |
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if (dpot->uid == DPOT_UID(AD5271_ID)) |
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value = value >> 2; |
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return value; |
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} |
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ctrl = DPOT_SPI_READ_RDAC; |
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} else if (reg & DPOT_ADDR_EEPROM) { |
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ctrl = DPOT_SPI_READ_EEPROM; |
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} |
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if (dpot->feat & F_SPI_16BIT) |
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return dpot_read_r8d8(dpot, ctrl); |
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else if (dpot->feat & F_SPI_24BIT) |
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return dpot_read_r8d16(dpot, ctrl); |
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return -EFAULT; |
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} |
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static s32 dpot_read_i2c(struct dpot_data *dpot, u8 reg) |
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{ |
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int value; |
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unsigned int ctrl = 0; |
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switch (dpot->uid) { |
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case DPOT_UID(AD5246_ID): |
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case DPOT_UID(AD5247_ID): |
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return dpot_read_d8(dpot); |
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case DPOT_UID(AD5245_ID): |
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case DPOT_UID(AD5241_ID): |
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case DPOT_UID(AD5242_ID): |
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case DPOT_UID(AD5243_ID): |
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case DPOT_UID(AD5248_ID): |
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case DPOT_UID(AD5280_ID): |
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case DPOT_UID(AD5282_ID): |
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ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ? |
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0 : DPOT_AD5282_RDAC_AB; |
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return dpot_read_r8d8(dpot, ctrl); |
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case DPOT_UID(AD5170_ID): |
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case DPOT_UID(AD5171_ID): |
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case DPOT_UID(AD5273_ID): |
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return dpot_read_d8(dpot); |
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case DPOT_UID(AD5172_ID): |
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case DPOT_UID(AD5173_ID): |
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ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ? |
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0 : DPOT_AD5172_3_A0; |
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return dpot_read_r8d8(dpot, ctrl); |
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case DPOT_UID(AD5272_ID): |
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case DPOT_UID(AD5274_ID): |
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dpot_write_r8d8(dpot, |
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(DPOT_AD5270_1_2_4_READ_RDAC << 2), 0); |
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value = dpot_read_r8d16(dpot, DPOT_AD5270_1_2_4_RDAC << 2); |
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if (value < 0) |
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return value; |
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/* |
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* AD5272/AD5274 returns high byte first, however |
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* underling smbus expects low byte first. |
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*/ |
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value = swab16(value); |
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if (dpot->uid == DPOT_UID(AD5274_ID)) |
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value = value >> 2; |
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return value; |
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default: |
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if ((reg & DPOT_REG_TOL) || (dpot->max_pos > 256)) |
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return dpot_read_r8d16(dpot, (reg & 0xF8) | |
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((reg & 0x7) << 1)); |
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else |
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return dpot_read_r8d8(dpot, reg); |
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} |
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} |
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static s32 dpot_read(struct dpot_data *dpot, u8 reg) |
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{ |
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if (dpot->feat & F_SPI) |
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return dpot_read_spi(dpot, reg); |
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else |
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return dpot_read_i2c(dpot, reg); |
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} |
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static s32 dpot_write_spi(struct dpot_data *dpot, u8 reg, u16 value) |
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{ |
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unsigned int val = 0; |
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if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD | DPOT_ADDR_OTP))) { |
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if (dpot->feat & F_RDACS_WONLY) |
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dpot->rdac_cache[reg & DPOT_RDAC_MASK] = value; |
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if (dpot->feat & F_AD_APPDATA) { |
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if (dpot->feat & F_SPI_8BIT) { |
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val = ((reg & DPOT_RDAC_MASK) << |
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DPOT_MAX_POS(dpot->devid)) | |
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value; |
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return dpot_write_d8(dpot, val); |
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} else if (dpot->feat & F_SPI_16BIT) { |
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val = ((reg & DPOT_RDAC_MASK) << |
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DPOT_MAX_POS(dpot->devid)) | |
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value; |
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return dpot_write_r8d8(dpot, val >> 8, |
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val & 0xFF); |
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} else |
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BUG(); |
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} else { |
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if (dpot->uid == DPOT_UID(AD5291_ID) || |
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dpot->uid == DPOT_UID(AD5292_ID) || |
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dpot->uid == DPOT_UID(AD5293_ID)) { |
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dpot_write_r8d8(dpot, DPOT_AD5291_CTRLREG << 2, |
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DPOT_AD5291_UNLOCK_CMD); |
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if (dpot->uid == DPOT_UID(AD5291_ID)) |
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value = value << 2; |
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return dpot_write_r8d8(dpot, |
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(DPOT_AD5291_RDAC << 2) | |
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(value >> 8), value & 0xFF); |
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} else if (dpot->uid == DPOT_UID(AD5270_ID) || |
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dpot->uid == DPOT_UID(AD5271_ID)) { |
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dpot_write_r8d8(dpot, |
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DPOT_AD5270_1_2_4_CTRLREG << 2, |
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DPOT_AD5270_1_2_4_UNLOCK_CMD); |
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if (dpot->uid == DPOT_UID(AD5271_ID)) |
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value = value << 2; |
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return dpot_write_r8d8(dpot, |
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(DPOT_AD5270_1_2_4_RDAC << 2) | |
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(value >> 8), value & 0xFF); |
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} |
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val = DPOT_SPI_RDAC | (reg & DPOT_RDAC_MASK); |
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} |
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} else if (reg & DPOT_ADDR_EEPROM) { |
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val = DPOT_SPI_EEPROM | (reg & DPOT_RDAC_MASK); |
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} else if (reg & DPOT_ADDR_CMD) { |
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switch (reg) { |
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case DPOT_DEC_ALL_6DB: |
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val = DPOT_SPI_DEC_ALL_6DB; |
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break; |
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case DPOT_INC_ALL_6DB: |
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val = DPOT_SPI_INC_ALL_6DB; |
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break; |
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case DPOT_DEC_ALL: |
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val = DPOT_SPI_DEC_ALL; |
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break; |
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case DPOT_INC_ALL: |
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val = DPOT_SPI_INC_ALL; |
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break; |
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} |
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} else if (reg & DPOT_ADDR_OTP) { |
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if (dpot->uid == DPOT_UID(AD5291_ID) || |
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dpot->uid == DPOT_UID(AD5292_ID)) { |
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return dpot_write_r8d8(dpot, |
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DPOT_AD5291_STORE_XTPM << 2, 0); |
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} else if (dpot->uid == DPOT_UID(AD5270_ID) || |
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dpot->uid == DPOT_UID(AD5271_ID)) { |
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return dpot_write_r8d8(dpot, |
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DPOT_AD5270_1_2_4_STORE_XTPM << 2, 0); |
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} |
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} else |
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BUG(); |
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if (dpot->feat & F_SPI_16BIT) |
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return dpot_write_r8d8(dpot, val, value); |
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else if (dpot->feat & F_SPI_24BIT) |
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return dpot_write_r8d16(dpot, val, value); |
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return -EFAULT; |
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} |
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static s32 dpot_write_i2c(struct dpot_data *dpot, u8 reg, u16 value) |
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{ |
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/* Only write the instruction byte for certain commands */ |
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unsigned int tmp = 0, ctrl = 0; |
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switch (dpot->uid) { |
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case DPOT_UID(AD5246_ID): |
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case DPOT_UID(AD5247_ID): |
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return dpot_write_d8(dpot, value); |
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case DPOT_UID(AD5245_ID): |
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case DPOT_UID(AD5241_ID): |
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case DPOT_UID(AD5242_ID): |
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case DPOT_UID(AD5243_ID): |
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case DPOT_UID(AD5248_ID): |
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case DPOT_UID(AD5280_ID): |
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case DPOT_UID(AD5282_ID): |
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ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ? |
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0 : DPOT_AD5282_RDAC_AB; |
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return dpot_write_r8d8(dpot, ctrl, value); |
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case DPOT_UID(AD5171_ID): |
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case DPOT_UID(AD5273_ID): |
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if (reg & DPOT_ADDR_OTP) { |
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tmp = dpot_read_d8(dpot); |
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if (tmp >> 6) /* Ready to Program? */ |
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return -EFAULT; |
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ctrl = DPOT_AD5273_FUSE; |
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} |
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return dpot_write_r8d8(dpot, ctrl, value); |
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case DPOT_UID(AD5172_ID): |
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case DPOT_UID(AD5173_ID): |
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ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ? |
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0 : DPOT_AD5172_3_A0; |
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if (reg & DPOT_ADDR_OTP) { |
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tmp = dpot_read_r8d16(dpot, ctrl); |
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if (tmp >> 14) /* Ready to Program? */ |
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return -EFAULT; |
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ctrl |= DPOT_AD5170_2_3_FUSE; |
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} |
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return dpot_write_r8d8(dpot, ctrl, value); |
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case DPOT_UID(AD5170_ID): |
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if (reg & DPOT_ADDR_OTP) { |
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tmp = dpot_read_r8d16(dpot, tmp); |
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if (tmp >> 14) /* Ready to Program? */ |
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return -EFAULT; |
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ctrl = DPOT_AD5170_2_3_FUSE; |
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} |
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return dpot_write_r8d8(dpot, ctrl, value); |
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case DPOT_UID(AD5272_ID): |
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case DPOT_UID(AD5274_ID): |
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dpot_write_r8d8(dpot, DPOT_AD5270_1_2_4_CTRLREG << 2, |
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DPOT_AD5270_1_2_4_UNLOCK_CMD); |
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if (reg & DPOT_ADDR_OTP) |
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return dpot_write_r8d8(dpot, |
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DPOT_AD5270_1_2_4_STORE_XTPM << 2, 0); |
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if (dpot->uid == DPOT_UID(AD5274_ID)) |
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value = value << 2; |
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return dpot_write_r8d8(dpot, (DPOT_AD5270_1_2_4_RDAC << 2) | |
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(value >> 8), value & 0xFF); |
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default: |
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if (reg & DPOT_ADDR_CMD) |
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return dpot_write_d8(dpot, reg); |
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if (dpot->max_pos > 256) |
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return dpot_write_r8d16(dpot, (reg & 0xF8) | |
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((reg & 0x7) << 1), value); |
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else |
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/* All other registers require instruction + data bytes */ |
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return dpot_write_r8d8(dpot, reg, value); |
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} |
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} |
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static s32 dpot_write(struct dpot_data *dpot, u8 reg, u16 value) |
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{ |
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if (dpot->feat & F_SPI) |
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return dpot_write_spi(dpot, reg, value); |
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else |
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return dpot_write_i2c(dpot, reg, value); |
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} |
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/* sysfs functions */ |
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static ssize_t sysfs_show_reg(struct device *dev, |
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struct device_attribute *attr, |
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char *buf, u32 reg) |
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{ |
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struct dpot_data *data = dev_get_drvdata(dev); |
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s32 value; |
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if (reg & DPOT_ADDR_OTP_EN) |
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return sprintf(buf, "%s\n", |
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test_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask) ? |
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"enabled" : "disabled"); |
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mutex_lock(&data->update_lock); |
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value = dpot_read(data, reg); |
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mutex_unlock(&data->update_lock); |
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if (value < 0) |
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return -EINVAL; |
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/* |
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* Let someone else deal with converting this ... |
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* the tolerance is a two-byte value where the MSB |
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* is a sign + integer value, and the LSB is a |
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* decimal value. See page 18 of the AD5258 |
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* datasheet (Rev. A) for more details. |
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*/ |
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if (reg & DPOT_REG_TOL) |
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return sprintf(buf, "0x%04x\n", value & 0xFFFF); |
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else |
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return sprintf(buf, "%u\n", value & data->rdac_mask); |
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} |
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static ssize_t sysfs_set_reg(struct device *dev, |
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struct device_attribute *attr, |
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const char *buf, size_t count, u32 reg) |
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{ |
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struct dpot_data *data = dev_get_drvdata(dev); |
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unsigned long value; |
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int err; |
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if (reg & DPOT_ADDR_OTP_EN) { |
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if (sysfs_streq(buf, "enabled")) |
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set_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask); |
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else |
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clear_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask); |
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return count; |
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} |
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if ((reg & DPOT_ADDR_OTP) && |
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!test_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask)) |
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return -EPERM; |
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err = kstrtoul(buf, 10, &value); |
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if (err) |
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return err; |
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if (value > data->rdac_mask) |
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value = data->rdac_mask; |
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mutex_lock(&data->update_lock); |
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dpot_write(data, reg, value); |
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if (reg & DPOT_ADDR_EEPROM) |
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msleep(26); /* Sleep while the EEPROM updates */ |
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else if (reg & DPOT_ADDR_OTP) |
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msleep(400); /* Sleep while the OTP updates */ |
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mutex_unlock(&data->update_lock); |
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return count; |
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} |
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static ssize_t sysfs_do_cmd(struct device *dev, |
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struct device_attribute *attr, |
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const char *buf, size_t count, u32 reg) |
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{ |
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struct dpot_data *data = dev_get_drvdata(dev); |
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mutex_lock(&data->update_lock); |
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dpot_write(data, reg, 0); |
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mutex_unlock(&data->update_lock); |
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return count; |
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} |
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/* ------------------------------------------------------------------------- */ |
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#define DPOT_DEVICE_SHOW(_name, _reg) static ssize_t \ |
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show_##_name(struct device *dev, \ |
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struct device_attribute *attr, char *buf) \ |
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{ \ |
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return sysfs_show_reg(dev, attr, buf, _reg); \ |
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} |
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|
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#define DPOT_DEVICE_SET(_name, _reg) static ssize_t \ |
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set_##_name(struct device *dev, \ |
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struct device_attribute *attr, \ |
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const char *buf, size_t count) \ |
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{ \ |
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return sysfs_set_reg(dev, attr, buf, count, _reg); \ |
|
} |
|
|
|
#define DPOT_DEVICE_SHOW_SET(name, reg) \ |
|
DPOT_DEVICE_SHOW(name, reg) \ |
|
DPOT_DEVICE_SET(name, reg) \ |
|
static DEVICE_ATTR(name, S_IWUSR | S_IRUGO, show_##name, set_##name) |
|
|
|
#define DPOT_DEVICE_SHOW_ONLY(name, reg) \ |
|
DPOT_DEVICE_SHOW(name, reg) \ |
|
static DEVICE_ATTR(name, S_IWUSR | S_IRUGO, show_##name, NULL) |
|
|
|
DPOT_DEVICE_SHOW_SET(rdac0, DPOT_ADDR_RDAC | DPOT_RDAC0); |
|
DPOT_DEVICE_SHOW_SET(eeprom0, DPOT_ADDR_EEPROM | DPOT_RDAC0); |
|
DPOT_DEVICE_SHOW_ONLY(tolerance0, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC0); |
|
DPOT_DEVICE_SHOW_SET(otp0, DPOT_ADDR_OTP | DPOT_RDAC0); |
|
DPOT_DEVICE_SHOW_SET(otp0en, DPOT_ADDR_OTP_EN | DPOT_RDAC0); |
|
|
|
DPOT_DEVICE_SHOW_SET(rdac1, DPOT_ADDR_RDAC | DPOT_RDAC1); |
|
DPOT_DEVICE_SHOW_SET(eeprom1, DPOT_ADDR_EEPROM | DPOT_RDAC1); |
|
DPOT_DEVICE_SHOW_ONLY(tolerance1, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC1); |
|
DPOT_DEVICE_SHOW_SET(otp1, DPOT_ADDR_OTP | DPOT_RDAC1); |
|
DPOT_DEVICE_SHOW_SET(otp1en, DPOT_ADDR_OTP_EN | DPOT_RDAC1); |
|
|
|
DPOT_DEVICE_SHOW_SET(rdac2, DPOT_ADDR_RDAC | DPOT_RDAC2); |
|
DPOT_DEVICE_SHOW_SET(eeprom2, DPOT_ADDR_EEPROM | DPOT_RDAC2); |
|
DPOT_DEVICE_SHOW_ONLY(tolerance2, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC2); |
|
DPOT_DEVICE_SHOW_SET(otp2, DPOT_ADDR_OTP | DPOT_RDAC2); |
|
DPOT_DEVICE_SHOW_SET(otp2en, DPOT_ADDR_OTP_EN | DPOT_RDAC2); |
|
|
|
DPOT_DEVICE_SHOW_SET(rdac3, DPOT_ADDR_RDAC | DPOT_RDAC3); |
|
DPOT_DEVICE_SHOW_SET(eeprom3, DPOT_ADDR_EEPROM | DPOT_RDAC3); |
|
DPOT_DEVICE_SHOW_ONLY(tolerance3, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC3); |
|
DPOT_DEVICE_SHOW_SET(otp3, DPOT_ADDR_OTP | DPOT_RDAC3); |
|
DPOT_DEVICE_SHOW_SET(otp3en, DPOT_ADDR_OTP_EN | DPOT_RDAC3); |
|
|
|
DPOT_DEVICE_SHOW_SET(rdac4, DPOT_ADDR_RDAC | DPOT_RDAC4); |
|
DPOT_DEVICE_SHOW_SET(eeprom4, DPOT_ADDR_EEPROM | DPOT_RDAC4); |
|
DPOT_DEVICE_SHOW_ONLY(tolerance4, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC4); |
|
DPOT_DEVICE_SHOW_SET(otp4, DPOT_ADDR_OTP | DPOT_RDAC4); |
|
DPOT_DEVICE_SHOW_SET(otp4en, DPOT_ADDR_OTP_EN | DPOT_RDAC4); |
|
|
|
DPOT_DEVICE_SHOW_SET(rdac5, DPOT_ADDR_RDAC | DPOT_RDAC5); |
|
DPOT_DEVICE_SHOW_SET(eeprom5, DPOT_ADDR_EEPROM | DPOT_RDAC5); |
|
DPOT_DEVICE_SHOW_ONLY(tolerance5, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC5); |
|
DPOT_DEVICE_SHOW_SET(otp5, DPOT_ADDR_OTP | DPOT_RDAC5); |
|
DPOT_DEVICE_SHOW_SET(otp5en, DPOT_ADDR_OTP_EN | DPOT_RDAC5); |
|
|
|
static const struct attribute *dpot_attrib_wipers[] = { |
|
&dev_attr_rdac0.attr, |
|
&dev_attr_rdac1.attr, |
|
&dev_attr_rdac2.attr, |
|
&dev_attr_rdac3.attr, |
|
&dev_attr_rdac4.attr, |
|
&dev_attr_rdac5.attr, |
|
NULL |
|
}; |
|
|
|
static const struct attribute *dpot_attrib_eeprom[] = { |
|
&dev_attr_eeprom0.attr, |
|
&dev_attr_eeprom1.attr, |
|
&dev_attr_eeprom2.attr, |
|
&dev_attr_eeprom3.attr, |
|
&dev_attr_eeprom4.attr, |
|
&dev_attr_eeprom5.attr, |
|
NULL |
|
}; |
|
|
|
static const struct attribute *dpot_attrib_otp[] = { |
|
&dev_attr_otp0.attr, |
|
&dev_attr_otp1.attr, |
|
&dev_attr_otp2.attr, |
|
&dev_attr_otp3.attr, |
|
&dev_attr_otp4.attr, |
|
&dev_attr_otp5.attr, |
|
NULL |
|
}; |
|
|
|
static const struct attribute *dpot_attrib_otp_en[] = { |
|
&dev_attr_otp0en.attr, |
|
&dev_attr_otp1en.attr, |
|
&dev_attr_otp2en.attr, |
|
&dev_attr_otp3en.attr, |
|
&dev_attr_otp4en.attr, |
|
&dev_attr_otp5en.attr, |
|
NULL |
|
}; |
|
|
|
static const struct attribute *dpot_attrib_tolerance[] = { |
|
&dev_attr_tolerance0.attr, |
|
&dev_attr_tolerance1.attr, |
|
&dev_attr_tolerance2.attr, |
|
&dev_attr_tolerance3.attr, |
|
&dev_attr_tolerance4.attr, |
|
&dev_attr_tolerance5.attr, |
|
NULL |
|
}; |
|
|
|
/* ------------------------------------------------------------------------- */ |
|
|
|
#define DPOT_DEVICE_DO_CMD(_name, _cmd) static ssize_t \ |
|
set_##_name(struct device *dev, \ |
|
struct device_attribute *attr, \ |
|
const char *buf, size_t count) \ |
|
{ \ |
|
return sysfs_do_cmd(dev, attr, buf, count, _cmd); \ |
|
} \ |
|
static DEVICE_ATTR(_name, S_IWUSR | S_IRUGO, NULL, set_##_name) |
|
|
|
DPOT_DEVICE_DO_CMD(inc_all, DPOT_INC_ALL); |
|
DPOT_DEVICE_DO_CMD(dec_all, DPOT_DEC_ALL); |
|
DPOT_DEVICE_DO_CMD(inc_all_6db, DPOT_INC_ALL_6DB); |
|
DPOT_DEVICE_DO_CMD(dec_all_6db, DPOT_DEC_ALL_6DB); |
|
|
|
static struct attribute *ad525x_attributes_commands[] = { |
|
&dev_attr_inc_all.attr, |
|
&dev_attr_dec_all.attr, |
|
&dev_attr_inc_all_6db.attr, |
|
&dev_attr_dec_all_6db.attr, |
|
NULL |
|
}; |
|
|
|
static const struct attribute_group ad525x_group_commands = { |
|
.attrs = ad525x_attributes_commands, |
|
}; |
|
|
|
static int ad_dpot_add_files(struct device *dev, |
|
unsigned int features, unsigned int rdac) |
|
{ |
|
int err = sysfs_create_file(&dev->kobj, |
|
dpot_attrib_wipers[rdac]); |
|
if (features & F_CMD_EEP) |
|
err |= sysfs_create_file(&dev->kobj, |
|
dpot_attrib_eeprom[rdac]); |
|
if (features & F_CMD_TOL) |
|
err |= sysfs_create_file(&dev->kobj, |
|
dpot_attrib_tolerance[rdac]); |
|
if (features & F_CMD_OTP) { |
|
err |= sysfs_create_file(&dev->kobj, |
|
dpot_attrib_otp_en[rdac]); |
|
err |= sysfs_create_file(&dev->kobj, |
|
dpot_attrib_otp[rdac]); |
|
} |
|
|
|
if (err) |
|
dev_err(dev, "failed to register sysfs hooks for RDAC%d\n", |
|
rdac); |
|
|
|
return err; |
|
} |
|
|
|
static inline void ad_dpot_remove_files(struct device *dev, |
|
unsigned int features, unsigned int rdac) |
|
{ |
|
sysfs_remove_file(&dev->kobj, |
|
dpot_attrib_wipers[rdac]); |
|
if (features & F_CMD_EEP) |
|
sysfs_remove_file(&dev->kobj, |
|
dpot_attrib_eeprom[rdac]); |
|
if (features & F_CMD_TOL) |
|
sysfs_remove_file(&dev->kobj, |
|
dpot_attrib_tolerance[rdac]); |
|
if (features & F_CMD_OTP) { |
|
sysfs_remove_file(&dev->kobj, |
|
dpot_attrib_otp_en[rdac]); |
|
sysfs_remove_file(&dev->kobj, |
|
dpot_attrib_otp[rdac]); |
|
} |
|
} |
|
|
|
int ad_dpot_probe(struct device *dev, |
|
struct ad_dpot_bus_data *bdata, unsigned long devid, |
|
const char *name) |
|
{ |
|
|
|
struct dpot_data *data; |
|
int i, err = 0; |
|
|
|
data = kzalloc(sizeof(struct dpot_data), GFP_KERNEL); |
|
if (!data) { |
|
err = -ENOMEM; |
|
goto exit; |
|
} |
|
|
|
dev_set_drvdata(dev, data); |
|
mutex_init(&data->update_lock); |
|
|
|
data->bdata = *bdata; |
|
data->devid = devid; |
|
|
|
data->max_pos = 1 << DPOT_MAX_POS(devid); |
|
data->rdac_mask = data->max_pos - 1; |
|
data->feat = DPOT_FEAT(devid); |
|
data->uid = DPOT_UID(devid); |
|
data->wipers = DPOT_WIPERS(devid); |
|
|
|
for (i = DPOT_RDAC0; i < MAX_RDACS; i++) |
|
if (data->wipers & (1 << i)) { |
|
err = ad_dpot_add_files(dev, data->feat, i); |
|
if (err) |
|
goto exit_remove_files; |
|
/* power-up midscale */ |
|
if (data->feat & F_RDACS_WONLY) |
|
data->rdac_cache[i] = data->max_pos / 2; |
|
} |
|
|
|
if (data->feat & F_CMD_INC) |
|
err = sysfs_create_group(&dev->kobj, &ad525x_group_commands); |
|
|
|
if (err) { |
|
dev_err(dev, "failed to register sysfs hooks\n"); |
|
goto exit_free; |
|
} |
|
|
|
dev_info(dev, "%s %d-Position Digital Potentiometer registered\n", |
|
name, data->max_pos); |
|
|
|
return 0; |
|
|
|
exit_remove_files: |
|
for (i = DPOT_RDAC0; i < MAX_RDACS; i++) |
|
if (data->wipers & (1 << i)) |
|
ad_dpot_remove_files(dev, data->feat, i); |
|
|
|
exit_free: |
|
kfree(data); |
|
dev_set_drvdata(dev, NULL); |
|
exit: |
|
dev_err(dev, "failed to create client for %s ID 0x%lX\n", |
|
name, devid); |
|
return err; |
|
} |
|
EXPORT_SYMBOL(ad_dpot_probe); |
|
|
|
int ad_dpot_remove(struct device *dev) |
|
{ |
|
struct dpot_data *data = dev_get_drvdata(dev); |
|
int i; |
|
|
|
for (i = DPOT_RDAC0; i < MAX_RDACS; i++) |
|
if (data->wipers & (1 << i)) |
|
ad_dpot_remove_files(dev, data->feat, i); |
|
|
|
kfree(data); |
|
|
|
return 0; |
|
} |
|
EXPORT_SYMBOL(ad_dpot_remove); |
|
|
|
|
|
MODULE_AUTHOR("Chris Verges <[email protected]>, " |
|
"Michael Hennerich <[email protected]>"); |
|
MODULE_DESCRIPTION("Digital potentiometer driver"); |
|
MODULE_LICENSE("GPL");
|
|
|