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407 lines
11 KiB
407 lines
11 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* Copyright (C) 2013 STMicroelectronics Limited |
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* Author: Srinivas Kandagatla <[email protected]> |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/clk.h> |
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#include <linux/interrupt.h> |
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#include <linux/module.h> |
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#include <linux/of.h> |
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#include <linux/platform_device.h> |
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#include <linux/reset.h> |
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#include <media/rc-core.h> |
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#include <linux/pinctrl/consumer.h> |
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#include <linux/pm_wakeirq.h> |
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struct st_rc_device { |
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struct device *dev; |
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int irq; |
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int irq_wake; |
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struct clk *sys_clock; |
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void __iomem *base; /* Register base address */ |
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void __iomem *rx_base;/* RX Register base address */ |
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struct rc_dev *rdev; |
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bool overclocking; |
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int sample_mult; |
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int sample_div; |
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bool rxuhfmode; |
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struct reset_control *rstc; |
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}; |
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/* Registers */ |
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#define IRB_SAMPLE_RATE_COMM 0x64 /* sample freq divisor*/ |
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#define IRB_CLOCK_SEL 0x70 /* clock select */ |
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#define IRB_CLOCK_SEL_STATUS 0x74 /* clock status */ |
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/* IRB IR/UHF receiver registers */ |
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#define IRB_RX_ON 0x40 /* pulse time capture */ |
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#define IRB_RX_SYS 0X44 /* sym period capture */ |
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#define IRB_RX_INT_EN 0x48 /* IRQ enable (R/W) */ |
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#define IRB_RX_INT_STATUS 0x4c /* IRQ status (R/W) */ |
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#define IRB_RX_EN 0x50 /* Receive enable */ |
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#define IRB_MAX_SYM_PERIOD 0x54 /* max sym value */ |
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#define IRB_RX_INT_CLEAR 0x58 /* overrun status */ |
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#define IRB_RX_STATUS 0x6c /* receive status */ |
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#define IRB_RX_NOISE_SUPPR 0x5c /* noise suppression */ |
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#define IRB_RX_POLARITY_INV 0x68 /* polarity inverter */ |
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/* |
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* IRQ set: Enable full FIFO 1 -> bit 3; |
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* Enable overrun IRQ 1 -> bit 2; |
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* Enable last symbol IRQ 1 -> bit 1: |
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* Enable RX interrupt 1 -> bit 0; |
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*/ |
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#define IRB_RX_INTS 0x0f |
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#define IRB_RX_OVERRUN_INT 0x04 |
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/* maximum symbol period (microsecs),timeout to detect end of symbol train */ |
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#define MAX_SYMB_TIME 0x5000 |
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#define IRB_SAMPLE_FREQ 10000000 |
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#define IRB_FIFO_NOT_EMPTY 0xff00 |
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#define IRB_OVERFLOW 0x4 |
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#define IRB_TIMEOUT 0xffff |
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#define IR_ST_NAME "st-rc" |
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static void st_rc_send_lirc_timeout(struct rc_dev *rdev) |
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{ |
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struct ir_raw_event ev = { .timeout = true, .duration = rdev->timeout }; |
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ir_raw_event_store(rdev, &ev); |
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} |
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/* |
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* RX graphical example to better understand the difference between ST IR block |
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* output and standard definition used by LIRC (and most of the world!) |
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* |
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* mark mark |
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* |-IRB_RX_ON-| |-IRB_RX_ON-| |
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* ___ ___ ___ ___ ___ ___ _ |
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* | | | | | | | | | | | | | |
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* | | | | | | space 0 | | | | | | space 1 | |
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* _____| |__| |__| |____________________________| |__| |__| |_____________| |
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* |
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* |--------------- IRB_RX_SYS -------------|------ IRB_RX_SYS -------| |
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* |
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* |------------- encoding bit 0 -----------|---- encoding bit 1 -----| |
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* |
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* ST hardware returns mark (IRB_RX_ON) and total symbol time (IRB_RX_SYS), so |
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* convert to standard mark/space we have to calculate space=(IRB_RX_SYS-mark) |
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* The mark time represents the amount of time the carrier (usually 36-40kHz) |
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* is detected.The above examples shows Pulse Width Modulation encoding where |
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* bit 0 is represented by space>mark. |
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*/ |
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static irqreturn_t st_rc_rx_interrupt(int irq, void *data) |
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{ |
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unsigned long timeout; |
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unsigned int symbol, mark = 0; |
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struct st_rc_device *dev = data; |
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int last_symbol = 0; |
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u32 status, int_status; |
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struct ir_raw_event ev = {}; |
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if (dev->irq_wake) |
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pm_wakeup_event(dev->dev, 0); |
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/* FIXME: is 10ms good enough ? */ |
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timeout = jiffies + msecs_to_jiffies(10); |
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do { |
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status = readl(dev->rx_base + IRB_RX_STATUS); |
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if (!(status & (IRB_FIFO_NOT_EMPTY | IRB_OVERFLOW))) |
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break; |
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int_status = readl(dev->rx_base + IRB_RX_INT_STATUS); |
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if (unlikely(int_status & IRB_RX_OVERRUN_INT)) { |
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/* discard the entire collection in case of errors! */ |
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ir_raw_event_reset(dev->rdev); |
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dev_info(dev->dev, "IR RX overrun\n"); |
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writel(IRB_RX_OVERRUN_INT, |
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dev->rx_base + IRB_RX_INT_CLEAR); |
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continue; |
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} |
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symbol = readl(dev->rx_base + IRB_RX_SYS); |
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mark = readl(dev->rx_base + IRB_RX_ON); |
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if (symbol == IRB_TIMEOUT) |
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last_symbol = 1; |
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/* Ignore any noise */ |
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if ((mark > 2) && (symbol > 1)) { |
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symbol -= mark; |
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if (dev->overclocking) { /* adjustments to timings */ |
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symbol *= dev->sample_mult; |
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symbol /= dev->sample_div; |
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mark *= dev->sample_mult; |
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mark /= dev->sample_div; |
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} |
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ev.duration = mark; |
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ev.pulse = true; |
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ir_raw_event_store(dev->rdev, &ev); |
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if (!last_symbol) { |
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ev.duration = symbol; |
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ev.pulse = false; |
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ir_raw_event_store(dev->rdev, &ev); |
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} else { |
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st_rc_send_lirc_timeout(dev->rdev); |
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} |
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} |
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last_symbol = 0; |
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} while (time_is_after_jiffies(timeout)); |
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writel(IRB_RX_INTS, dev->rx_base + IRB_RX_INT_CLEAR); |
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/* Empty software fifo */ |
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ir_raw_event_handle(dev->rdev); |
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return IRQ_HANDLED; |
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} |
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static void st_rc_hardware_init(struct st_rc_device *dev) |
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{ |
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int baseclock, freqdiff; |
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unsigned int rx_max_symbol_per = MAX_SYMB_TIME; |
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unsigned int rx_sampling_freq_div; |
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/* Enable the IP */ |
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reset_control_deassert(dev->rstc); |
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clk_prepare_enable(dev->sys_clock); |
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baseclock = clk_get_rate(dev->sys_clock); |
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/* IRB input pins are inverted internally from high to low. */ |
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writel(1, dev->rx_base + IRB_RX_POLARITY_INV); |
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rx_sampling_freq_div = baseclock / IRB_SAMPLE_FREQ; |
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writel(rx_sampling_freq_div, dev->base + IRB_SAMPLE_RATE_COMM); |
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freqdiff = baseclock - (rx_sampling_freq_div * IRB_SAMPLE_FREQ); |
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if (freqdiff) { /* over clocking, workout the adjustment factors */ |
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dev->overclocking = true; |
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dev->sample_mult = 1000; |
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dev->sample_div = baseclock / (10000 * rx_sampling_freq_div); |
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rx_max_symbol_per = (rx_max_symbol_per * 1000)/dev->sample_div; |
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} |
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writel(rx_max_symbol_per, dev->rx_base + IRB_MAX_SYM_PERIOD); |
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} |
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static int st_rc_remove(struct platform_device *pdev) |
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{ |
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struct st_rc_device *rc_dev = platform_get_drvdata(pdev); |
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dev_pm_clear_wake_irq(&pdev->dev); |
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device_init_wakeup(&pdev->dev, false); |
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clk_disable_unprepare(rc_dev->sys_clock); |
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rc_unregister_device(rc_dev->rdev); |
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return 0; |
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} |
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static int st_rc_open(struct rc_dev *rdev) |
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{ |
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struct st_rc_device *dev = rdev->priv; |
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unsigned long flags; |
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local_irq_save(flags); |
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/* enable interrupts and receiver */ |
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writel(IRB_RX_INTS, dev->rx_base + IRB_RX_INT_EN); |
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writel(0x01, dev->rx_base + IRB_RX_EN); |
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local_irq_restore(flags); |
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return 0; |
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} |
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static void st_rc_close(struct rc_dev *rdev) |
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{ |
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struct st_rc_device *dev = rdev->priv; |
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/* disable interrupts and receiver */ |
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writel(0x00, dev->rx_base + IRB_RX_EN); |
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writel(0x00, dev->rx_base + IRB_RX_INT_EN); |
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} |
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static int st_rc_probe(struct platform_device *pdev) |
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{ |
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int ret = -EINVAL; |
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struct rc_dev *rdev; |
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struct device *dev = &pdev->dev; |
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struct resource *res; |
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struct st_rc_device *rc_dev; |
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struct device_node *np = pdev->dev.of_node; |
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const char *rx_mode; |
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rc_dev = devm_kzalloc(dev, sizeof(struct st_rc_device), GFP_KERNEL); |
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if (!rc_dev) |
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return -ENOMEM; |
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rdev = rc_allocate_device(RC_DRIVER_IR_RAW); |
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if (!rdev) |
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return -ENOMEM; |
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if (np && !of_property_read_string(np, "rx-mode", &rx_mode)) { |
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if (!strcmp(rx_mode, "uhf")) { |
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rc_dev->rxuhfmode = true; |
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} else if (!strcmp(rx_mode, "infrared")) { |
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rc_dev->rxuhfmode = false; |
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} else { |
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dev_err(dev, "Unsupported rx mode [%s]\n", rx_mode); |
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goto err; |
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} |
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} else { |
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goto err; |
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} |
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rc_dev->sys_clock = devm_clk_get(dev, NULL); |
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if (IS_ERR(rc_dev->sys_clock)) { |
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dev_err(dev, "System clock not found\n"); |
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ret = PTR_ERR(rc_dev->sys_clock); |
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goto err; |
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} |
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rc_dev->irq = platform_get_irq(pdev, 0); |
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if (rc_dev->irq < 0) { |
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ret = rc_dev->irq; |
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goto err; |
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} |
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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rc_dev->base = devm_ioremap_resource(dev, res); |
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if (IS_ERR(rc_dev->base)) { |
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ret = PTR_ERR(rc_dev->base); |
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goto err; |
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} |
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if (rc_dev->rxuhfmode) |
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rc_dev->rx_base = rc_dev->base + 0x40; |
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else |
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rc_dev->rx_base = rc_dev->base; |
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rc_dev->rstc = reset_control_get_optional_exclusive(dev, NULL); |
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if (IS_ERR(rc_dev->rstc)) { |
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ret = PTR_ERR(rc_dev->rstc); |
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goto err; |
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} |
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rc_dev->dev = dev; |
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platform_set_drvdata(pdev, rc_dev); |
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st_rc_hardware_init(rc_dev); |
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rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; |
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/* rx sampling rate is 10Mhz */ |
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rdev->rx_resolution = 100; |
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rdev->timeout = MAX_SYMB_TIME; |
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rdev->priv = rc_dev; |
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rdev->open = st_rc_open; |
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rdev->close = st_rc_close; |
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rdev->driver_name = IR_ST_NAME; |
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rdev->map_name = RC_MAP_EMPTY; |
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rdev->device_name = "ST Remote Control Receiver"; |
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ret = rc_register_device(rdev); |
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if (ret < 0) |
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goto clkerr; |
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rc_dev->rdev = rdev; |
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if (devm_request_irq(dev, rc_dev->irq, st_rc_rx_interrupt, |
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0, IR_ST_NAME, rc_dev) < 0) { |
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dev_err(dev, "IRQ %d register failed\n", rc_dev->irq); |
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ret = -EINVAL; |
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goto rcerr; |
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} |
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/* enable wake via this device */ |
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device_init_wakeup(dev, true); |
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dev_pm_set_wake_irq(dev, rc_dev->irq); |
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/* |
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* for LIRC_MODE_MODE2 or LIRC_MODE_PULSE or LIRC_MODE_RAW |
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* lircd expects a long space first before a signal train to sync. |
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*/ |
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st_rc_send_lirc_timeout(rdev); |
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dev_info(dev, "setup in %s mode\n", rc_dev->rxuhfmode ? "UHF" : "IR"); |
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return ret; |
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rcerr: |
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rc_unregister_device(rdev); |
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rdev = NULL; |
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clkerr: |
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clk_disable_unprepare(rc_dev->sys_clock); |
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err: |
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rc_free_device(rdev); |
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dev_err(dev, "Unable to register device (%d)\n", ret); |
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return ret; |
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} |
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#ifdef CONFIG_PM_SLEEP |
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static int st_rc_suspend(struct device *dev) |
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{ |
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struct st_rc_device *rc_dev = dev_get_drvdata(dev); |
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if (device_may_wakeup(dev)) { |
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if (!enable_irq_wake(rc_dev->irq)) |
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rc_dev->irq_wake = 1; |
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else |
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return -EINVAL; |
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} else { |
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pinctrl_pm_select_sleep_state(dev); |
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writel(0x00, rc_dev->rx_base + IRB_RX_EN); |
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writel(0x00, rc_dev->rx_base + IRB_RX_INT_EN); |
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clk_disable_unprepare(rc_dev->sys_clock); |
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reset_control_assert(rc_dev->rstc); |
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} |
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return 0; |
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} |
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static int st_rc_resume(struct device *dev) |
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{ |
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struct st_rc_device *rc_dev = dev_get_drvdata(dev); |
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struct rc_dev *rdev = rc_dev->rdev; |
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if (rc_dev->irq_wake) { |
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disable_irq_wake(rc_dev->irq); |
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rc_dev->irq_wake = 0; |
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} else { |
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pinctrl_pm_select_default_state(dev); |
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st_rc_hardware_init(rc_dev); |
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if (rdev->users) { |
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writel(IRB_RX_INTS, rc_dev->rx_base + IRB_RX_INT_EN); |
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writel(0x01, rc_dev->rx_base + IRB_RX_EN); |
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} |
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} |
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return 0; |
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} |
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#endif |
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static SIMPLE_DEV_PM_OPS(st_rc_pm_ops, st_rc_suspend, st_rc_resume); |
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#ifdef CONFIG_OF |
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static const struct of_device_id st_rc_match[] = { |
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{ .compatible = "st,comms-irb", }, |
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{}, |
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}; |
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MODULE_DEVICE_TABLE(of, st_rc_match); |
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#endif |
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static struct platform_driver st_rc_driver = { |
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.driver = { |
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.name = IR_ST_NAME, |
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.of_match_table = of_match_ptr(st_rc_match), |
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.pm = &st_rc_pm_ops, |
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}, |
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.probe = st_rc_probe, |
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.remove = st_rc_remove, |
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}; |
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module_platform_driver(st_rc_driver); |
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MODULE_DESCRIPTION("RC Transceiver driver for STMicroelectronics platforms"); |
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MODULE_AUTHOR("STMicroelectronics (R&D) Ltd"); |
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MODULE_LICENSE("GPL");
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