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169 lines
4.7 KiB
169 lines
4.7 KiB
/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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/* |
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* ImgTec IR Decoder found in PowerDown Controller. |
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* |
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* Copyright 2010-2014 Imagination Technologies Ltd. |
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*/ |
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#ifndef _IMG_IR_H_ |
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#define _IMG_IR_H_ |
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#include <linux/io.h> |
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#include <linux/spinlock.h> |
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#include "img-ir-raw.h" |
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#include "img-ir-hw.h" |
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/* registers */ |
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/* relative to the start of the IR block of registers */ |
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#define IMG_IR_CONTROL 0x00 |
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#define IMG_IR_STATUS 0x04 |
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#define IMG_IR_DATA_LW 0x08 |
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#define IMG_IR_DATA_UP 0x0c |
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#define IMG_IR_LEAD_SYMB_TIMING 0x10 |
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#define IMG_IR_S00_SYMB_TIMING 0x14 |
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#define IMG_IR_S01_SYMB_TIMING 0x18 |
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#define IMG_IR_S10_SYMB_TIMING 0x1c |
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#define IMG_IR_S11_SYMB_TIMING 0x20 |
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#define IMG_IR_FREE_SYMB_TIMING 0x24 |
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#define IMG_IR_POW_MOD_PARAMS 0x28 |
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#define IMG_IR_POW_MOD_ENABLE 0x2c |
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#define IMG_IR_IRQ_MSG_DATA_LW 0x30 |
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#define IMG_IR_IRQ_MSG_DATA_UP 0x34 |
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#define IMG_IR_IRQ_MSG_MASK_LW 0x38 |
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#define IMG_IR_IRQ_MSG_MASK_UP 0x3c |
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#define IMG_IR_IRQ_ENABLE 0x40 |
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#define IMG_IR_IRQ_STATUS 0x44 |
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#define IMG_IR_IRQ_CLEAR 0x48 |
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#define IMG_IR_IRCORE_ID 0xf0 |
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#define IMG_IR_CORE_REV 0xf4 |
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#define IMG_IR_CORE_DES1 0xf8 |
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#define IMG_IR_CORE_DES2 0xfc |
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/* field masks */ |
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/* IMG_IR_CONTROL */ |
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#define IMG_IR_DECODEN 0x40000000 |
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#define IMG_IR_CODETYPE 0x30000000 |
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#define IMG_IR_CODETYPE_SHIFT 28 |
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#define IMG_IR_HDRTOG 0x08000000 |
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#define IMG_IR_LDRDEC 0x04000000 |
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#define IMG_IR_DECODINPOL 0x02000000 /* active high */ |
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#define IMG_IR_BITORIEN 0x01000000 /* MSB first */ |
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#define IMG_IR_D1VALIDSEL 0x00008000 |
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#define IMG_IR_BITINV 0x00000040 /* don't invert */ |
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#define IMG_IR_DECODEND2 0x00000010 |
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#define IMG_IR_BITORIEND2 0x00000002 /* MSB first */ |
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#define IMG_IR_BITINVD2 0x00000001 /* don't invert */ |
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/* IMG_IR_STATUS */ |
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#define IMG_IR_RXDVALD2 0x00001000 |
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#define IMG_IR_IRRXD 0x00000400 |
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#define IMG_IR_TOGSTATE 0x00000200 |
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#define IMG_IR_RXDVAL 0x00000040 |
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#define IMG_IR_RXDLEN 0x0000003f |
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#define IMG_IR_RXDLEN_SHIFT 0 |
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/* IMG_IR_LEAD_SYMB_TIMING, IMG_IR_Sxx_SYMB_TIMING */ |
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#define IMG_IR_PD_MAX 0xff000000 |
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#define IMG_IR_PD_MAX_SHIFT 24 |
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#define IMG_IR_PD_MIN 0x00ff0000 |
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#define IMG_IR_PD_MIN_SHIFT 16 |
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#define IMG_IR_W_MAX 0x0000ff00 |
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#define IMG_IR_W_MAX_SHIFT 8 |
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#define IMG_IR_W_MIN 0x000000ff |
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#define IMG_IR_W_MIN_SHIFT 0 |
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/* IMG_IR_FREE_SYMB_TIMING */ |
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#define IMG_IR_MAXLEN 0x0007e000 |
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#define IMG_IR_MAXLEN_SHIFT 13 |
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#define IMG_IR_MINLEN 0x00001f00 |
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#define IMG_IR_MINLEN_SHIFT 8 |
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#define IMG_IR_FT_MIN 0x000000ff |
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#define IMG_IR_FT_MIN_SHIFT 0 |
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/* IMG_IR_POW_MOD_PARAMS */ |
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#define IMG_IR_PERIOD_LEN 0x3f000000 |
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#define IMG_IR_PERIOD_LEN_SHIFT 24 |
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#define IMG_IR_PERIOD_DUTY 0x003f0000 |
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#define IMG_IR_PERIOD_DUTY_SHIFT 16 |
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#define IMG_IR_STABLE_STOP 0x00003f00 |
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#define IMG_IR_STABLE_STOP_SHIFT 8 |
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#define IMG_IR_STABLE_START 0x0000003f |
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#define IMG_IR_STABLE_START_SHIFT 0 |
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/* IMG_IR_POW_MOD_ENABLE */ |
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#define IMG_IR_POWER_OUT_EN 0x00000002 |
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#define IMG_IR_POWER_MOD_EN 0x00000001 |
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/* IMG_IR_IRQ_ENABLE, IMG_IR_IRQ_STATUS, IMG_IR_IRQ_CLEAR */ |
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#define IMG_IR_IRQ_DEC2_ERR 0x00000080 |
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#define IMG_IR_IRQ_DEC_ERR 0x00000040 |
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#define IMG_IR_IRQ_ACT_LEVEL 0x00000020 |
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#define IMG_IR_IRQ_FALL_EDGE 0x00000010 |
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#define IMG_IR_IRQ_RISE_EDGE 0x00000008 |
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#define IMG_IR_IRQ_DATA_MATCH 0x00000004 |
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#define IMG_IR_IRQ_DATA2_VALID 0x00000002 |
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#define IMG_IR_IRQ_DATA_VALID 0x00000001 |
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#define IMG_IR_IRQ_ALL 0x000000ff |
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#define IMG_IR_IRQ_EDGE (IMG_IR_IRQ_FALL_EDGE | IMG_IR_IRQ_RISE_EDGE) |
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/* IMG_IR_CORE_ID */ |
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#define IMG_IR_CORE_ID 0x00ff0000 |
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#define IMG_IR_CORE_ID_SHIFT 16 |
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#define IMG_IR_CORE_CONFIG 0x0000ffff |
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#define IMG_IR_CORE_CONFIG_SHIFT 0 |
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/* IMG_IR_CORE_REV */ |
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#define IMG_IR_DESIGNER 0xff000000 |
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#define IMG_IR_DESIGNER_SHIFT 24 |
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#define IMG_IR_MAJOR_REV 0x00ff0000 |
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#define IMG_IR_MAJOR_REV_SHIFT 16 |
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#define IMG_IR_MINOR_REV 0x0000ff00 |
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#define IMG_IR_MINOR_REV_SHIFT 8 |
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#define IMG_IR_MAINT_REV 0x000000ff |
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#define IMG_IR_MAINT_REV_SHIFT 0 |
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struct device; |
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struct clk; |
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/** |
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* struct img_ir_priv - Private driver data. |
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* @dev: Platform device. |
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* @irq: IRQ number. |
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* @clk: Input clock. |
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* @sys_clk: System clock. |
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* @reg_base: Iomem base address of IR register block. |
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* @lock: Protects IR registers and variables in this struct. |
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* @raw: Driver data for raw decoder. |
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* @hw: Driver data for hardware decoder. |
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*/ |
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struct img_ir_priv { |
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struct device *dev; |
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int irq; |
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struct clk *clk; |
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struct clk *sys_clk; |
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void __iomem *reg_base; |
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spinlock_t lock; |
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struct img_ir_priv_raw raw; |
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struct img_ir_priv_hw hw; |
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}; |
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/* Hardware access */ |
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static inline void img_ir_write(struct img_ir_priv *priv, |
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unsigned int reg_offs, unsigned int data) |
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{ |
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iowrite32(data, priv->reg_base + reg_offs); |
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} |
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static inline unsigned int img_ir_read(struct img_ir_priv *priv, |
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unsigned int reg_offs) |
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{ |
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return ioread32(priv->reg_base + reg_offs); |
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} |
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#endif /* _IMG_IR_H_ */
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