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858 lines
20 KiB
858 lines
20 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
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*/ |
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#include <linux/delay.h> |
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#include <linux/interrupt.h> |
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#include <linux/io.h> |
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#include <linux/mailbox_controller.h> |
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#include <linux/of.h> |
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#include <linux/of_device.h> |
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#include <linux/platform_device.h> |
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#include <linux/pm.h> |
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#include <linux/slab.h> |
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#include <soc/tegra/fuse.h> |
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#include <dt-bindings/mailbox/tegra186-hsp.h> |
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#include "mailbox.h" |
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#define HSP_INT_IE(x) (0x100 + ((x) * 4)) |
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#define HSP_INT_IV 0x300 |
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#define HSP_INT_IR 0x304 |
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#define HSP_INT_EMPTY_SHIFT 0 |
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#define HSP_INT_EMPTY_MASK 0xff |
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#define HSP_INT_FULL_SHIFT 8 |
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#define HSP_INT_FULL_MASK 0xff |
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#define HSP_INT_DIMENSIONING 0x380 |
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#define HSP_nSM_SHIFT 0 |
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#define HSP_nSS_SHIFT 4 |
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#define HSP_nAS_SHIFT 8 |
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#define HSP_nDB_SHIFT 12 |
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#define HSP_nSI_SHIFT 16 |
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#define HSP_nINT_MASK 0xf |
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#define HSP_DB_TRIGGER 0x0 |
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#define HSP_DB_ENABLE 0x4 |
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#define HSP_DB_RAW 0x8 |
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#define HSP_DB_PENDING 0xc |
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#define HSP_SM_SHRD_MBOX 0x0 |
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#define HSP_SM_SHRD_MBOX_FULL BIT(31) |
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#define HSP_SM_SHRD_MBOX_FULL_INT_IE 0x04 |
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#define HSP_SM_SHRD_MBOX_EMPTY_INT_IE 0x08 |
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#define HSP_DB_CCPLEX 1 |
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#define HSP_DB_BPMP 3 |
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#define HSP_DB_MAX 7 |
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struct tegra_hsp_channel; |
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struct tegra_hsp; |
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struct tegra_hsp_channel { |
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struct tegra_hsp *hsp; |
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struct mbox_chan *chan; |
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void __iomem *regs; |
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}; |
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struct tegra_hsp_doorbell { |
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struct tegra_hsp_channel channel; |
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struct list_head list; |
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const char *name; |
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unsigned int master; |
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unsigned int index; |
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}; |
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struct tegra_hsp_mailbox { |
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struct tegra_hsp_channel channel; |
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unsigned int index; |
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bool producer; |
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}; |
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struct tegra_hsp_db_map { |
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const char *name; |
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unsigned int master; |
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unsigned int index; |
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}; |
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struct tegra_hsp_soc { |
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const struct tegra_hsp_db_map *map; |
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bool has_per_mb_ie; |
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}; |
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struct tegra_hsp { |
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struct device *dev; |
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const struct tegra_hsp_soc *soc; |
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struct mbox_controller mbox_db; |
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struct mbox_controller mbox_sm; |
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void __iomem *regs; |
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unsigned int doorbell_irq; |
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unsigned int *shared_irqs; |
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unsigned int shared_irq; |
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unsigned int num_sm; |
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unsigned int num_as; |
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unsigned int num_ss; |
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unsigned int num_db; |
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unsigned int num_si; |
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spinlock_t lock; |
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struct lock_class_key lock_key; |
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struct list_head doorbells; |
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struct tegra_hsp_mailbox *mailboxes; |
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unsigned long mask; |
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}; |
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static inline u32 tegra_hsp_readl(struct tegra_hsp *hsp, unsigned int offset) |
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{ |
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return readl(hsp->regs + offset); |
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} |
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static inline void tegra_hsp_writel(struct tegra_hsp *hsp, u32 value, |
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unsigned int offset) |
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{ |
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writel(value, hsp->regs + offset); |
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} |
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static inline u32 tegra_hsp_channel_readl(struct tegra_hsp_channel *channel, |
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unsigned int offset) |
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{ |
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return readl(channel->regs + offset); |
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} |
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static inline void tegra_hsp_channel_writel(struct tegra_hsp_channel *channel, |
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u32 value, unsigned int offset) |
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{ |
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writel(value, channel->regs + offset); |
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} |
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static bool tegra_hsp_doorbell_can_ring(struct tegra_hsp_doorbell *db) |
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{ |
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u32 value; |
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value = tegra_hsp_channel_readl(&db->channel, HSP_DB_ENABLE); |
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return (value & BIT(TEGRA_HSP_DB_MASTER_CCPLEX)) != 0; |
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} |
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static struct tegra_hsp_doorbell * |
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__tegra_hsp_doorbell_get(struct tegra_hsp *hsp, unsigned int master) |
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{ |
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struct tegra_hsp_doorbell *entry; |
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list_for_each_entry(entry, &hsp->doorbells, list) |
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if (entry->master == master) |
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return entry; |
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return NULL; |
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} |
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static struct tegra_hsp_doorbell * |
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tegra_hsp_doorbell_get(struct tegra_hsp *hsp, unsigned int master) |
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{ |
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struct tegra_hsp_doorbell *db; |
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unsigned long flags; |
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spin_lock_irqsave(&hsp->lock, flags); |
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db = __tegra_hsp_doorbell_get(hsp, master); |
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spin_unlock_irqrestore(&hsp->lock, flags); |
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return db; |
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} |
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static irqreturn_t tegra_hsp_doorbell_irq(int irq, void *data) |
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{ |
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struct tegra_hsp *hsp = data; |
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struct tegra_hsp_doorbell *db; |
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unsigned long master, value; |
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db = tegra_hsp_doorbell_get(hsp, TEGRA_HSP_DB_MASTER_CCPLEX); |
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if (!db) |
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return IRQ_NONE; |
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value = tegra_hsp_channel_readl(&db->channel, HSP_DB_PENDING); |
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tegra_hsp_channel_writel(&db->channel, value, HSP_DB_PENDING); |
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spin_lock(&hsp->lock); |
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for_each_set_bit(master, &value, hsp->mbox_db.num_chans) { |
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struct tegra_hsp_doorbell *db; |
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db = __tegra_hsp_doorbell_get(hsp, master); |
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/* |
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* Depending on the bootloader chain, the CCPLEX doorbell will |
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* have some doorbells enabled, which means that requesting an |
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* interrupt will immediately fire. |
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* |
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* In that case, db->channel.chan will still be NULL here and |
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* cause a crash if not properly guarded. |
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* |
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* It remains to be seen if ignoring the doorbell in that case |
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* is the correct solution. |
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*/ |
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if (db && db->channel.chan) |
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mbox_chan_received_data(db->channel.chan, NULL); |
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} |
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spin_unlock(&hsp->lock); |
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return IRQ_HANDLED; |
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} |
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static irqreturn_t tegra_hsp_shared_irq(int irq, void *data) |
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{ |
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struct tegra_hsp *hsp = data; |
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unsigned long bit, mask; |
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u32 status, value; |
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void *msg; |
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status = tegra_hsp_readl(hsp, HSP_INT_IR) & hsp->mask; |
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/* process EMPTY interrupts first */ |
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mask = (status >> HSP_INT_EMPTY_SHIFT) & HSP_INT_EMPTY_MASK; |
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for_each_set_bit(bit, &mask, hsp->num_sm) { |
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struct tegra_hsp_mailbox *mb = &hsp->mailboxes[bit]; |
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if (mb->producer) { |
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/* |
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* Disable EMPTY interrupts until data is sent with |
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* the next message. These interrupts are level- |
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* triggered, so if we kept them enabled they would |
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* constantly trigger until we next write data into |
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* the message. |
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*/ |
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spin_lock(&hsp->lock); |
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hsp->mask &= ~BIT(HSP_INT_EMPTY_SHIFT + mb->index); |
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tegra_hsp_writel(hsp, hsp->mask, |
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HSP_INT_IE(hsp->shared_irq)); |
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spin_unlock(&hsp->lock); |
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mbox_chan_txdone(mb->channel.chan, 0); |
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} |
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} |
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/* process FULL interrupts */ |
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mask = (status >> HSP_INT_FULL_SHIFT) & HSP_INT_FULL_MASK; |
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for_each_set_bit(bit, &mask, hsp->num_sm) { |
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struct tegra_hsp_mailbox *mb = &hsp->mailboxes[bit]; |
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if (!mb->producer) { |
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value = tegra_hsp_channel_readl(&mb->channel, |
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HSP_SM_SHRD_MBOX); |
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value &= ~HSP_SM_SHRD_MBOX_FULL; |
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msg = (void *)(unsigned long)value; |
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mbox_chan_received_data(mb->channel.chan, msg); |
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/* |
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* Need to clear all bits here since some producers, |
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* such as TCU, depend on fields in the register |
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* getting cleared by the consumer. |
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* |
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* The mailbox API doesn't give the consumers a way |
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* of doing that explicitly, so we have to make sure |
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* we cover all possible cases. |
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*/ |
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tegra_hsp_channel_writel(&mb->channel, 0x0, |
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HSP_SM_SHRD_MBOX); |
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} |
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} |
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return IRQ_HANDLED; |
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} |
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static struct tegra_hsp_channel * |
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tegra_hsp_doorbell_create(struct tegra_hsp *hsp, const char *name, |
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unsigned int master, unsigned int index) |
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{ |
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struct tegra_hsp_doorbell *db; |
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unsigned int offset; |
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unsigned long flags; |
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db = devm_kzalloc(hsp->dev, sizeof(*db), GFP_KERNEL); |
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if (!db) |
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return ERR_PTR(-ENOMEM); |
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offset = (1 + (hsp->num_sm / 2) + hsp->num_ss + hsp->num_as) * SZ_64K; |
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offset += index * 0x100; |
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db->channel.regs = hsp->regs + offset; |
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db->channel.hsp = hsp; |
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db->name = devm_kstrdup_const(hsp->dev, name, GFP_KERNEL); |
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db->master = master; |
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db->index = index; |
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spin_lock_irqsave(&hsp->lock, flags); |
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list_add_tail(&db->list, &hsp->doorbells); |
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spin_unlock_irqrestore(&hsp->lock, flags); |
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return &db->channel; |
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} |
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static int tegra_hsp_doorbell_send_data(struct mbox_chan *chan, void *data) |
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{ |
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struct tegra_hsp_doorbell *db = chan->con_priv; |
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tegra_hsp_channel_writel(&db->channel, 1, HSP_DB_TRIGGER); |
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return 0; |
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} |
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static int tegra_hsp_doorbell_startup(struct mbox_chan *chan) |
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{ |
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struct tegra_hsp_doorbell *db = chan->con_priv; |
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struct tegra_hsp *hsp = db->channel.hsp; |
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struct tegra_hsp_doorbell *ccplex; |
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unsigned long flags; |
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u32 value; |
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if (db->master >= chan->mbox->num_chans) { |
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dev_err(chan->mbox->dev, |
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"invalid master ID %u for HSP channel\n", |
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db->master); |
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return -EINVAL; |
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} |
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ccplex = tegra_hsp_doorbell_get(hsp, TEGRA_HSP_DB_MASTER_CCPLEX); |
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if (!ccplex) |
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return -ENODEV; |
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/* |
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* On simulation platforms the BPMP hasn't had a chance yet to mark |
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* the doorbell as ringable by the CCPLEX, so we want to skip extra |
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* checks here. |
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*/ |
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if (tegra_is_silicon() && !tegra_hsp_doorbell_can_ring(db)) |
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return -ENODEV; |
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spin_lock_irqsave(&hsp->lock, flags); |
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value = tegra_hsp_channel_readl(&ccplex->channel, HSP_DB_ENABLE); |
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value |= BIT(db->master); |
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tegra_hsp_channel_writel(&ccplex->channel, value, HSP_DB_ENABLE); |
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spin_unlock_irqrestore(&hsp->lock, flags); |
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return 0; |
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} |
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static void tegra_hsp_doorbell_shutdown(struct mbox_chan *chan) |
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{ |
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struct tegra_hsp_doorbell *db = chan->con_priv; |
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struct tegra_hsp *hsp = db->channel.hsp; |
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struct tegra_hsp_doorbell *ccplex; |
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unsigned long flags; |
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u32 value; |
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ccplex = tegra_hsp_doorbell_get(hsp, TEGRA_HSP_DB_MASTER_CCPLEX); |
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if (!ccplex) |
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return; |
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spin_lock_irqsave(&hsp->lock, flags); |
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value = tegra_hsp_channel_readl(&ccplex->channel, HSP_DB_ENABLE); |
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value &= ~BIT(db->master); |
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tegra_hsp_channel_writel(&ccplex->channel, value, HSP_DB_ENABLE); |
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spin_unlock_irqrestore(&hsp->lock, flags); |
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} |
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static const struct mbox_chan_ops tegra_hsp_db_ops = { |
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.send_data = tegra_hsp_doorbell_send_data, |
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.startup = tegra_hsp_doorbell_startup, |
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.shutdown = tegra_hsp_doorbell_shutdown, |
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}; |
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static int tegra_hsp_mailbox_send_data(struct mbox_chan *chan, void *data) |
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{ |
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struct tegra_hsp_mailbox *mb = chan->con_priv; |
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struct tegra_hsp *hsp = mb->channel.hsp; |
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unsigned long flags; |
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u32 value; |
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if (WARN_ON(!mb->producer)) |
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return -EPERM; |
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/* copy data and mark mailbox full */ |
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value = (u32)(unsigned long)data; |
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value |= HSP_SM_SHRD_MBOX_FULL; |
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tegra_hsp_channel_writel(&mb->channel, value, HSP_SM_SHRD_MBOX); |
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/* enable EMPTY interrupt for the shared mailbox */ |
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spin_lock_irqsave(&hsp->lock, flags); |
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hsp->mask |= BIT(HSP_INT_EMPTY_SHIFT + mb->index); |
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tegra_hsp_writel(hsp, hsp->mask, HSP_INT_IE(hsp->shared_irq)); |
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spin_unlock_irqrestore(&hsp->lock, flags); |
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return 0; |
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} |
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static int tegra_hsp_mailbox_flush(struct mbox_chan *chan, |
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unsigned long timeout) |
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{ |
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struct tegra_hsp_mailbox *mb = chan->con_priv; |
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struct tegra_hsp_channel *ch = &mb->channel; |
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u32 value; |
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timeout = jiffies + msecs_to_jiffies(timeout); |
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while (time_before(jiffies, timeout)) { |
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value = tegra_hsp_channel_readl(ch, HSP_SM_SHRD_MBOX); |
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if ((value & HSP_SM_SHRD_MBOX_FULL) == 0) { |
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mbox_chan_txdone(chan, 0); |
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return 0; |
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} |
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udelay(1); |
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} |
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return -ETIME; |
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} |
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static int tegra_hsp_mailbox_startup(struct mbox_chan *chan) |
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{ |
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struct tegra_hsp_mailbox *mb = chan->con_priv; |
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struct tegra_hsp_channel *ch = &mb->channel; |
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struct tegra_hsp *hsp = mb->channel.hsp; |
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unsigned long flags; |
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chan->txdone_method = TXDONE_BY_IRQ; |
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/* |
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* Shared mailboxes start out as consumers by default. FULL and EMPTY |
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* interrupts are coalesced at the same shared interrupt. |
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* |
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* Keep EMPTY interrupts disabled at startup and only enable them when |
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* the mailbox is actually full. This is required because the FULL and |
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* EMPTY interrupts are level-triggered, so keeping EMPTY interrupts |
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* enabled all the time would cause an interrupt storm while mailboxes |
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* are idle. |
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*/ |
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spin_lock_irqsave(&hsp->lock, flags); |
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if (mb->producer) |
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hsp->mask &= ~BIT(HSP_INT_EMPTY_SHIFT + mb->index); |
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else |
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hsp->mask |= BIT(HSP_INT_FULL_SHIFT + mb->index); |
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tegra_hsp_writel(hsp, hsp->mask, HSP_INT_IE(hsp->shared_irq)); |
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spin_unlock_irqrestore(&hsp->lock, flags); |
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if (hsp->soc->has_per_mb_ie) { |
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if (mb->producer) |
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tegra_hsp_channel_writel(ch, 0x0, |
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HSP_SM_SHRD_MBOX_EMPTY_INT_IE); |
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else |
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tegra_hsp_channel_writel(ch, 0x1, |
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HSP_SM_SHRD_MBOX_FULL_INT_IE); |
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} |
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return 0; |
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} |
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static void tegra_hsp_mailbox_shutdown(struct mbox_chan *chan) |
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{ |
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struct tegra_hsp_mailbox *mb = chan->con_priv; |
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struct tegra_hsp_channel *ch = &mb->channel; |
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struct tegra_hsp *hsp = mb->channel.hsp; |
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unsigned long flags; |
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if (hsp->soc->has_per_mb_ie) { |
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if (mb->producer) |
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tegra_hsp_channel_writel(ch, 0x0, |
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HSP_SM_SHRD_MBOX_EMPTY_INT_IE); |
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else |
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tegra_hsp_channel_writel(ch, 0x0, |
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HSP_SM_SHRD_MBOX_FULL_INT_IE); |
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} |
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spin_lock_irqsave(&hsp->lock, flags); |
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if (mb->producer) |
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hsp->mask &= ~BIT(HSP_INT_EMPTY_SHIFT + mb->index); |
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else |
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hsp->mask &= ~BIT(HSP_INT_FULL_SHIFT + mb->index); |
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tegra_hsp_writel(hsp, hsp->mask, HSP_INT_IE(hsp->shared_irq)); |
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spin_unlock_irqrestore(&hsp->lock, flags); |
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} |
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static const struct mbox_chan_ops tegra_hsp_sm_ops = { |
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.send_data = tegra_hsp_mailbox_send_data, |
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.flush = tegra_hsp_mailbox_flush, |
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.startup = tegra_hsp_mailbox_startup, |
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.shutdown = tegra_hsp_mailbox_shutdown, |
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}; |
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static struct mbox_chan *tegra_hsp_db_xlate(struct mbox_controller *mbox, |
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const struct of_phandle_args *args) |
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{ |
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struct tegra_hsp *hsp = container_of(mbox, struct tegra_hsp, mbox_db); |
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unsigned int type = args->args[0], master = args->args[1]; |
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struct tegra_hsp_channel *channel = ERR_PTR(-ENODEV); |
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struct tegra_hsp_doorbell *db; |
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struct mbox_chan *chan; |
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unsigned long flags; |
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unsigned int i; |
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if (type != TEGRA_HSP_MBOX_TYPE_DB || !hsp->doorbell_irq) |
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return ERR_PTR(-ENODEV); |
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db = tegra_hsp_doorbell_get(hsp, master); |
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if (db) |
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channel = &db->channel; |
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if (IS_ERR(channel)) |
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return ERR_CAST(channel); |
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spin_lock_irqsave(&hsp->lock, flags); |
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for (i = 0; i < mbox->num_chans; i++) { |
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chan = &mbox->chans[i]; |
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if (!chan->con_priv) { |
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channel->chan = chan; |
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chan->con_priv = db; |
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break; |
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} |
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chan = NULL; |
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} |
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spin_unlock_irqrestore(&hsp->lock, flags); |
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return chan ?: ERR_PTR(-EBUSY); |
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} |
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static struct mbox_chan *tegra_hsp_sm_xlate(struct mbox_controller *mbox, |
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const struct of_phandle_args *args) |
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{ |
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struct tegra_hsp *hsp = container_of(mbox, struct tegra_hsp, mbox_sm); |
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unsigned int type = args->args[0], index; |
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struct tegra_hsp_mailbox *mb; |
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index = args->args[1] & TEGRA_HSP_SM_MASK; |
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if (type != TEGRA_HSP_MBOX_TYPE_SM || !hsp->shared_irqs || |
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index >= hsp->num_sm) |
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return ERR_PTR(-ENODEV); |
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mb = &hsp->mailboxes[index]; |
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if ((args->args[1] & TEGRA_HSP_SM_FLAG_TX) == 0) |
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mb->producer = false; |
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else |
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mb->producer = true; |
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return mb->channel.chan; |
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} |
|
|
|
static int tegra_hsp_add_doorbells(struct tegra_hsp *hsp) |
|
{ |
|
const struct tegra_hsp_db_map *map = hsp->soc->map; |
|
struct tegra_hsp_channel *channel; |
|
|
|
while (map->name) { |
|
channel = tegra_hsp_doorbell_create(hsp, map->name, |
|
map->master, map->index); |
|
if (IS_ERR(channel)) |
|
return PTR_ERR(channel); |
|
|
|
map++; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int tegra_hsp_add_mailboxes(struct tegra_hsp *hsp, struct device *dev) |
|
{ |
|
int i; |
|
|
|
hsp->mailboxes = devm_kcalloc(dev, hsp->num_sm, sizeof(*hsp->mailboxes), |
|
GFP_KERNEL); |
|
if (!hsp->mailboxes) |
|
return -ENOMEM; |
|
|
|
for (i = 0; i < hsp->num_sm; i++) { |
|
struct tegra_hsp_mailbox *mb = &hsp->mailboxes[i]; |
|
|
|
mb->index = i; |
|
|
|
mb->channel.hsp = hsp; |
|
mb->channel.regs = hsp->regs + SZ_64K + i * SZ_32K; |
|
mb->channel.chan = &hsp->mbox_sm.chans[i]; |
|
mb->channel.chan->con_priv = mb; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int tegra_hsp_request_shared_irq(struct tegra_hsp *hsp) |
|
{ |
|
unsigned int i, irq = 0; |
|
int err; |
|
|
|
for (i = 0; i < hsp->num_si; i++) { |
|
irq = hsp->shared_irqs[i]; |
|
if (irq <= 0) |
|
continue; |
|
|
|
err = devm_request_irq(hsp->dev, irq, tegra_hsp_shared_irq, 0, |
|
dev_name(hsp->dev), hsp); |
|
if (err < 0) { |
|
dev_err(hsp->dev, "failed to request interrupt: %d\n", |
|
err); |
|
continue; |
|
} |
|
|
|
hsp->shared_irq = i; |
|
|
|
/* disable all interrupts */ |
|
tegra_hsp_writel(hsp, 0, HSP_INT_IE(hsp->shared_irq)); |
|
|
|
dev_dbg(hsp->dev, "interrupt requested: %u\n", irq); |
|
|
|
break; |
|
} |
|
|
|
if (i == hsp->num_si) { |
|
dev_err(hsp->dev, "failed to find available interrupt\n"); |
|
return -ENOENT; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int tegra_hsp_probe(struct platform_device *pdev) |
|
{ |
|
struct tegra_hsp *hsp; |
|
struct resource *res; |
|
unsigned int i; |
|
u32 value; |
|
int err; |
|
|
|
hsp = devm_kzalloc(&pdev->dev, sizeof(*hsp), GFP_KERNEL); |
|
if (!hsp) |
|
return -ENOMEM; |
|
|
|
hsp->dev = &pdev->dev; |
|
hsp->soc = of_device_get_match_data(&pdev->dev); |
|
INIT_LIST_HEAD(&hsp->doorbells); |
|
spin_lock_init(&hsp->lock); |
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
|
hsp->regs = devm_ioremap_resource(&pdev->dev, res); |
|
if (IS_ERR(hsp->regs)) |
|
return PTR_ERR(hsp->regs); |
|
|
|
value = tegra_hsp_readl(hsp, HSP_INT_DIMENSIONING); |
|
hsp->num_sm = (value >> HSP_nSM_SHIFT) & HSP_nINT_MASK; |
|
hsp->num_ss = (value >> HSP_nSS_SHIFT) & HSP_nINT_MASK; |
|
hsp->num_as = (value >> HSP_nAS_SHIFT) & HSP_nINT_MASK; |
|
hsp->num_db = (value >> HSP_nDB_SHIFT) & HSP_nINT_MASK; |
|
hsp->num_si = (value >> HSP_nSI_SHIFT) & HSP_nINT_MASK; |
|
|
|
err = platform_get_irq_byname_optional(pdev, "doorbell"); |
|
if (err >= 0) |
|
hsp->doorbell_irq = err; |
|
|
|
if (hsp->num_si > 0) { |
|
unsigned int count = 0; |
|
|
|
hsp->shared_irqs = devm_kcalloc(&pdev->dev, hsp->num_si, |
|
sizeof(*hsp->shared_irqs), |
|
GFP_KERNEL); |
|
if (!hsp->shared_irqs) |
|
return -ENOMEM; |
|
|
|
for (i = 0; i < hsp->num_si; i++) { |
|
char *name; |
|
|
|
name = kasprintf(GFP_KERNEL, "shared%u", i); |
|
if (!name) |
|
return -ENOMEM; |
|
|
|
err = platform_get_irq_byname_optional(pdev, name); |
|
if (err >= 0) { |
|
hsp->shared_irqs[i] = err; |
|
count++; |
|
} |
|
|
|
kfree(name); |
|
} |
|
|
|
if (count == 0) { |
|
devm_kfree(&pdev->dev, hsp->shared_irqs); |
|
hsp->shared_irqs = NULL; |
|
} |
|
} |
|
|
|
/* setup the doorbell controller */ |
|
hsp->mbox_db.of_xlate = tegra_hsp_db_xlate; |
|
hsp->mbox_db.num_chans = 32; |
|
hsp->mbox_db.dev = &pdev->dev; |
|
hsp->mbox_db.ops = &tegra_hsp_db_ops; |
|
|
|
hsp->mbox_db.chans = devm_kcalloc(&pdev->dev, hsp->mbox_db.num_chans, |
|
sizeof(*hsp->mbox_db.chans), |
|
GFP_KERNEL); |
|
if (!hsp->mbox_db.chans) |
|
return -ENOMEM; |
|
|
|
if (hsp->doorbell_irq) { |
|
err = tegra_hsp_add_doorbells(hsp); |
|
if (err < 0) { |
|
dev_err(&pdev->dev, "failed to add doorbells: %d\n", |
|
err); |
|
return err; |
|
} |
|
} |
|
|
|
err = devm_mbox_controller_register(&pdev->dev, &hsp->mbox_db); |
|
if (err < 0) { |
|
dev_err(&pdev->dev, "failed to register doorbell mailbox: %d\n", |
|
err); |
|
return err; |
|
} |
|
|
|
/* setup the shared mailbox controller */ |
|
hsp->mbox_sm.of_xlate = tegra_hsp_sm_xlate; |
|
hsp->mbox_sm.num_chans = hsp->num_sm; |
|
hsp->mbox_sm.dev = &pdev->dev; |
|
hsp->mbox_sm.ops = &tegra_hsp_sm_ops; |
|
|
|
hsp->mbox_sm.chans = devm_kcalloc(&pdev->dev, hsp->mbox_sm.num_chans, |
|
sizeof(*hsp->mbox_sm.chans), |
|
GFP_KERNEL); |
|
if (!hsp->mbox_sm.chans) |
|
return -ENOMEM; |
|
|
|
if (hsp->shared_irqs) { |
|
err = tegra_hsp_add_mailboxes(hsp, &pdev->dev); |
|
if (err < 0) { |
|
dev_err(&pdev->dev, "failed to add mailboxes: %d\n", |
|
err); |
|
return err; |
|
} |
|
} |
|
|
|
err = devm_mbox_controller_register(&pdev->dev, &hsp->mbox_sm); |
|
if (err < 0) { |
|
dev_err(&pdev->dev, "failed to register shared mailbox: %d\n", |
|
err); |
|
return err; |
|
} |
|
|
|
platform_set_drvdata(pdev, hsp); |
|
|
|
if (hsp->doorbell_irq) { |
|
err = devm_request_irq(&pdev->dev, hsp->doorbell_irq, |
|
tegra_hsp_doorbell_irq, IRQF_NO_SUSPEND, |
|
dev_name(&pdev->dev), hsp); |
|
if (err < 0) { |
|
dev_err(&pdev->dev, |
|
"failed to request doorbell IRQ#%u: %d\n", |
|
hsp->doorbell_irq, err); |
|
return err; |
|
} |
|
} |
|
|
|
if (hsp->shared_irqs) { |
|
err = tegra_hsp_request_shared_irq(hsp); |
|
if (err < 0) |
|
return err; |
|
} |
|
|
|
lockdep_register_key(&hsp->lock_key); |
|
lockdep_set_class(&hsp->lock, &hsp->lock_key); |
|
|
|
return 0; |
|
} |
|
|
|
static int tegra_hsp_remove(struct platform_device *pdev) |
|
{ |
|
struct tegra_hsp *hsp = platform_get_drvdata(pdev); |
|
|
|
lockdep_unregister_key(&hsp->lock_key); |
|
|
|
return 0; |
|
} |
|
|
|
static int __maybe_unused tegra_hsp_resume(struct device *dev) |
|
{ |
|
struct tegra_hsp *hsp = dev_get_drvdata(dev); |
|
unsigned int i; |
|
struct tegra_hsp_doorbell *db; |
|
|
|
list_for_each_entry(db, &hsp->doorbells, list) { |
|
if (db && db->channel.chan) |
|
tegra_hsp_doorbell_startup(db->channel.chan); |
|
} |
|
|
|
if (hsp->mailboxes) { |
|
for (i = 0; i < hsp->num_sm; i++) { |
|
struct tegra_hsp_mailbox *mb = &hsp->mailboxes[i]; |
|
|
|
if (mb->channel.chan->cl) |
|
tegra_hsp_mailbox_startup(mb->channel.chan); |
|
} |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static const struct dev_pm_ops tegra_hsp_pm_ops = { |
|
.resume_noirq = tegra_hsp_resume, |
|
}; |
|
|
|
static const struct tegra_hsp_db_map tegra186_hsp_db_map[] = { |
|
{ "ccplex", TEGRA_HSP_DB_MASTER_CCPLEX, HSP_DB_CCPLEX, }, |
|
{ "bpmp", TEGRA_HSP_DB_MASTER_BPMP, HSP_DB_BPMP, }, |
|
{ /* sentinel */ } |
|
}; |
|
|
|
static const struct tegra_hsp_soc tegra186_hsp_soc = { |
|
.map = tegra186_hsp_db_map, |
|
.has_per_mb_ie = false, |
|
}; |
|
|
|
static const struct tegra_hsp_soc tegra194_hsp_soc = { |
|
.map = tegra186_hsp_db_map, |
|
.has_per_mb_ie = true, |
|
}; |
|
|
|
static const struct of_device_id tegra_hsp_match[] = { |
|
{ .compatible = "nvidia,tegra186-hsp", .data = &tegra186_hsp_soc }, |
|
{ .compatible = "nvidia,tegra194-hsp", .data = &tegra194_hsp_soc }, |
|
{ } |
|
}; |
|
|
|
static struct platform_driver tegra_hsp_driver = { |
|
.driver = { |
|
.name = "tegra-hsp", |
|
.of_match_table = tegra_hsp_match, |
|
.pm = &tegra_hsp_pm_ops, |
|
}, |
|
.probe = tegra_hsp_probe, |
|
.remove = tegra_hsp_remove, |
|
}; |
|
|
|
static int __init tegra_hsp_init(void) |
|
{ |
|
return platform_driver_register(&tegra_hsp_driver); |
|
} |
|
core_initcall(tegra_hsp_init);
|
|
|