forked from Qortal/Brooklyn
You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
264 lines
9.1 KiB
264 lines
9.1 KiB
# SPDX-License-Identifier: GPL-2.0-only |
|
menuconfig MAILBOX |
|
bool "Mailbox Hardware Support" |
|
help |
|
Mailbox is a framework to control hardware communication between |
|
on-chip processors through queued messages and interrupt driven |
|
signals. Say Y if your platform supports hardware mailboxes. |
|
|
|
if MAILBOX |
|
|
|
config ARM_MHU |
|
tristate "ARM MHU Mailbox" |
|
depends on ARM_AMBA |
|
help |
|
Say Y here if you want to build the ARM MHU controller driver. |
|
The controller has 3 mailbox channels, the last of which can be |
|
used in Secure mode only. |
|
|
|
config ARM_MHU_V2 |
|
tristate "ARM MHUv2 Mailbox" |
|
depends on ARM_AMBA |
|
help |
|
Say Y here if you want to build the ARM MHUv2 controller driver, |
|
which provides unidirectional mailboxes between processing elements. |
|
|
|
config IMX_MBOX |
|
tristate "i.MX Mailbox" |
|
depends on ARCH_MXC || COMPILE_TEST |
|
help |
|
Mailbox implementation for i.MX Messaging Unit (MU). |
|
|
|
config PLATFORM_MHU |
|
tristate "Platform MHU Mailbox" |
|
depends on OF |
|
depends on HAS_IOMEM |
|
help |
|
Say Y here if you want to build a platform specific variant MHU |
|
controller driver. |
|
The controller has a maximum of 3 mailbox channels, the last of |
|
which can be used in Secure mode only. |
|
|
|
config PL320_MBOX |
|
bool "ARM PL320 Mailbox" |
|
depends on ARM_AMBA |
|
help |
|
An implementation of the ARM PL320 Interprocessor Communication |
|
Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to |
|
send short messages between Highbank's A9 cores and the EnergyCore |
|
Management Engine, primarily for cpufreq. Say Y here if you want |
|
to use the PL320 IPCM support. |
|
|
|
config ARMADA_37XX_RWTM_MBOX |
|
tristate "Armada 37xx rWTM BIU Mailbox" |
|
depends on ARCH_MVEBU || COMPILE_TEST |
|
depends on OF |
|
help |
|
Mailbox implementation for communication with the the firmware |
|
running on the Cortex-M3 rWTM secure processor of the Armada 37xx |
|
SOC. Say Y here if you are building for such a device (for example |
|
the Turris Mox router). |
|
|
|
config OMAP2PLUS_MBOX |
|
tristate "OMAP2+ Mailbox framework support" |
|
depends on ARCH_OMAP2PLUS || ARCH_K3 |
|
help |
|
Mailbox implementation for OMAP family chips with hardware for |
|
interprocessor communication involving DSP, IVA1.0 and IVA2 in |
|
OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you |
|
want to use OMAP2+ Mailbox framework support. |
|
|
|
config OMAP_MBOX_KFIFO_SIZE |
|
int "Mailbox kfifo default buffer size (bytes)" |
|
depends on OMAP2PLUS_MBOX |
|
default 256 |
|
help |
|
Specify the default size of mailbox's kfifo buffers (bytes). |
|
This can also be changed at runtime (via the mbox_kfifo_size |
|
module parameter). |
|
|
|
config ROCKCHIP_MBOX |
|
bool "Rockchip Soc Intergrated Mailbox Support" |
|
depends on ARCH_ROCKCHIP || COMPILE_TEST |
|
help |
|
This driver provides support for inter-processor communication |
|
between CPU cores and MCU processor on Some Rockchip SOCs. |
|
Please check it that the Soc you use have Mailbox hardware. |
|
Say Y here if you want to use the Rockchip Mailbox support. |
|
|
|
config PCC |
|
bool "Platform Communication Channel Driver" |
|
depends on ACPI |
|
default n |
|
help |
|
ACPI 5.0+ spec defines a generic mode of communication |
|
between the OS and a platform such as the BMC. This medium |
|
(PCC) is typically used by CPPC (ACPI CPU Performance management), |
|
RAS (ACPI reliability protocol) and MPST (ACPI Memory power |
|
states). Select this driver if your platform implements the |
|
PCC clients mentioned above. |
|
|
|
config ALTERA_MBOX |
|
tristate "Altera Mailbox" |
|
depends on HAS_IOMEM |
|
help |
|
An implementation of the Altera Mailbox soft core. It is used |
|
to send message between processors. Say Y here if you want to use the |
|
Altera mailbox support. |
|
|
|
config BCM2835_MBOX |
|
tristate "BCM2835 Mailbox" |
|
depends on ARCH_BCM2835 |
|
help |
|
An implementation of the BCM2385 Mailbox. It is used to invoke |
|
the services of the Videocore. Say Y here if you want to use the |
|
BCM2835 Mailbox. |
|
|
|
config STI_MBOX |
|
tristate "STI Mailbox framework support" |
|
depends on ARCH_STI && OF |
|
help |
|
Mailbox implementation for STMicroelectonics family chips with |
|
hardware for interprocessor communication. |
|
|
|
config TI_MESSAGE_MANAGER |
|
tristate "Texas Instruments Message Manager Driver" |
|
depends on ARCH_KEYSTONE || ARCH_K3 |
|
help |
|
An implementation of Message Manager slave driver for Keystone |
|
and K3 architecture SoCs from Texas Instruments. Message Manager |
|
is a communication entity found on few of Texas Instrument's keystone |
|
and K3 architecture SoCs. These may be used for communication between |
|
multiple processors within the SoC. Select this driver if your |
|
platform has support for the hardware block. |
|
|
|
config HI3660_MBOX |
|
tristate "Hi3660 Mailbox" if EXPERT |
|
depends on (ARCH_HISI || COMPILE_TEST) |
|
depends on OF |
|
default ARCH_HISI |
|
help |
|
An implementation of the hi3660 mailbox. It is used to send message |
|
between application processors and other processors/MCU/DSP. Select |
|
Y here if you want to use Hi3660 mailbox controller. |
|
|
|
config HI6220_MBOX |
|
tristate "Hi6220 Mailbox" if EXPERT |
|
depends on (ARCH_HISI || COMPILE_TEST) |
|
depends on OF |
|
default ARCH_HISI |
|
help |
|
An implementation of the hi6220 mailbox. It is used to send message |
|
between application processors and MCU. Say Y here if you want to |
|
build Hi6220 mailbox controller driver. |
|
|
|
config MAILBOX_TEST |
|
tristate "Mailbox Test Client" |
|
depends on OF |
|
depends on HAS_IOMEM |
|
help |
|
Test client to help with testing new Controller driver |
|
implementations. |
|
|
|
config QCOM_APCS_IPC |
|
tristate "Qualcomm APCS IPC driver" |
|
depends on ARCH_QCOM || COMPILE_TEST |
|
help |
|
Say y here to enable support for the APCS IPC mailbox driver, |
|
providing an interface for invoking the inter-process communication |
|
signals from the application processor to other masters. |
|
|
|
config TEGRA_HSP_MBOX |
|
bool "Tegra HSP (Hardware Synchronization Primitives) Driver" |
|
depends on ARCH_TEGRA |
|
help |
|
The Tegra HSP driver is used for the interprocessor communication |
|
between different remote processors and host processors on Tegra186 |
|
and later SoCs. Say Y here if you want to have this support. |
|
If unsure say N. |
|
|
|
config XGENE_SLIMPRO_MBOX |
|
tristate "APM SoC X-Gene SLIMpro Mailbox Controller" |
|
depends on ARCH_XGENE |
|
help |
|
An implementation of the APM X-Gene Interprocessor Communication |
|
Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller. |
|
It is used to send short messages between ARM64-bit cores and |
|
the SLIMpro Management Engine, primarily for PM. Say Y here if you |
|
want to use the APM X-Gene SLIMpro IPCM support. |
|
|
|
config BCM_PDC_MBOX |
|
tristate "Broadcom FlexSparx DMA Mailbox" |
|
depends on ARCH_BCM_IPROC || COMPILE_TEST |
|
help |
|
Mailbox implementation for the Broadcom FlexSparx DMA ring manager, |
|
which provides access to various offload engines on Broadcom |
|
SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2. |
|
|
|
config BCM_FLEXRM_MBOX |
|
tristate "Broadcom FlexRM Mailbox" |
|
depends on ARM64 |
|
depends on ARCH_BCM_IPROC || COMPILE_TEST |
|
select GENERIC_MSI_IRQ_DOMAIN |
|
default m if ARCH_BCM_IPROC |
|
help |
|
Mailbox implementation of the Broadcom FlexRM ring manager, |
|
which provides access to various offload engines on Broadcom |
|
SoCs. Say Y here if you want to use the Broadcom FlexRM. |
|
|
|
config STM32_IPCC |
|
tristate "STM32 IPCC Mailbox" |
|
depends on MACH_STM32MP157 || COMPILE_TEST |
|
help |
|
Mailbox implementation for STMicroelectonics STM32 family chips |
|
with hardware for Inter-Processor Communication Controller (IPCC) |
|
between processors. Say Y here if you want to have this support. |
|
|
|
config MTK_CMDQ_MBOX |
|
tristate "MediaTek CMDQ Mailbox Support" |
|
depends on ARCH_MEDIATEK || COMPILE_TEST |
|
select MTK_INFRACFG |
|
help |
|
Say yes here to add support for the MediaTek Command Queue (CMDQ) |
|
mailbox driver. The CMDQ is used to help read/write registers with |
|
critical time limitation, such as updating display configuration |
|
during the vblank. |
|
|
|
config ZYNQMP_IPI_MBOX |
|
bool "Xilinx ZynqMP IPI Mailbox" |
|
depends on ARCH_ZYNQMP && OF |
|
help |
|
Say yes here to add support for Xilinx IPI mailbox driver. |
|
This mailbox driver is used to send notification or short message |
|
between processors with Xilinx ZynqMP IPI. It will place the |
|
message to the IPI buffer and will access the IPI control |
|
registers to kick the other processor or enquire status. |
|
|
|
config SUN6I_MSGBOX |
|
tristate "Allwinner sun6i/sun8i/sun9i/sun50i Message Box" |
|
depends on ARCH_SUNXI || COMPILE_TEST |
|
default ARCH_SUNXI |
|
help |
|
Mailbox implementation for the hardware message box present in |
|
various Allwinner SoCs. This mailbox is used for communication |
|
between the application CPUs and the power management coprocessor. |
|
|
|
config SPRD_MBOX |
|
tristate "Spreadtrum Mailbox" |
|
depends on ARCH_SPRD || COMPILE_TEST |
|
help |
|
Mailbox driver implementation for the Spreadtrum platform. It is used |
|
to send message between application processors and MCU. Say Y here if |
|
you want to build the Spreatrum mailbox controller driver. |
|
|
|
config QCOM_IPCC |
|
bool "Qualcomm Technologies, Inc. IPCC driver" |
|
depends on ARCH_QCOM || COMPILE_TEST |
|
help |
|
Qualcomm Technologies, Inc. Inter-Processor Communication Controller |
|
(IPCC) driver for MSM devices. The driver provides mailbox support for |
|
sending interrupts to the clients. On the other hand, the driver also |
|
acts as an interrupt controller for receiving interrupts from clients. |
|
Say Y here if you want to build this driver. |
|
|
|
endif
|
|
|