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218 lines
4.9 KiB
218 lines
4.9 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (C) 2020, Jiaxun Yang <[email protected]> |
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* Loongson HyperTransport Interrupt Vector support |
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*/ |
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#define pr_fmt(fmt) "htvec: " fmt |
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#include <linux/interrupt.h> |
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#include <linux/irq.h> |
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#include <linux/irqchip.h> |
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#include <linux/irqdomain.h> |
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#include <linux/irqchip/chained_irq.h> |
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#include <linux/kernel.h> |
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#include <linux/platform_device.h> |
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#include <linux/of_address.h> |
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#include <linux/of_irq.h> |
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#include <linux/of_platform.h> |
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/* Registers */ |
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#define HTVEC_EN_OFF 0x20 |
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#define HTVEC_MAX_PARENT_IRQ 8 |
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#define VEC_COUNT_PER_REG 32 |
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#define VEC_REG_IDX(irq_id) ((irq_id) / VEC_COUNT_PER_REG) |
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#define VEC_REG_BIT(irq_id) ((irq_id) % VEC_COUNT_PER_REG) |
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struct htvec { |
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int num_parents; |
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void __iomem *base; |
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struct irq_domain *htvec_domain; |
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raw_spinlock_t htvec_lock; |
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}; |
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static void htvec_irq_dispatch(struct irq_desc *desc) |
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{ |
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int i; |
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u32 pending; |
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bool handled = false; |
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struct irq_chip *chip = irq_desc_get_chip(desc); |
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struct htvec *priv = irq_desc_get_handler_data(desc); |
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chained_irq_enter(chip, desc); |
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for (i = 0; i < priv->num_parents; i++) { |
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pending = readl(priv->base + 4 * i); |
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while (pending) { |
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int bit = __ffs(pending); |
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generic_handle_irq(irq_linear_revmap(priv->htvec_domain, bit + |
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VEC_COUNT_PER_REG * i)); |
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pending &= ~BIT(bit); |
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handled = true; |
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} |
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} |
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if (!handled) |
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spurious_interrupt(); |
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chained_irq_exit(chip, desc); |
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} |
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static void htvec_ack_irq(struct irq_data *d) |
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{ |
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struct htvec *priv = irq_data_get_irq_chip_data(d); |
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writel(BIT(VEC_REG_BIT(d->hwirq)), |
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priv->base + VEC_REG_IDX(d->hwirq) * 4); |
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} |
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static void htvec_mask_irq(struct irq_data *d) |
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{ |
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u32 reg; |
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void __iomem *addr; |
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struct htvec *priv = irq_data_get_irq_chip_data(d); |
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raw_spin_lock(&priv->htvec_lock); |
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addr = priv->base + HTVEC_EN_OFF; |
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addr += VEC_REG_IDX(d->hwirq) * 4; |
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reg = readl(addr); |
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reg &= ~BIT(VEC_REG_BIT(d->hwirq)); |
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writel(reg, addr); |
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raw_spin_unlock(&priv->htvec_lock); |
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} |
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static void htvec_unmask_irq(struct irq_data *d) |
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{ |
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u32 reg; |
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void __iomem *addr; |
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struct htvec *priv = irq_data_get_irq_chip_data(d); |
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raw_spin_lock(&priv->htvec_lock); |
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addr = priv->base + HTVEC_EN_OFF; |
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addr += VEC_REG_IDX(d->hwirq) * 4; |
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reg = readl(addr); |
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reg |= BIT(VEC_REG_BIT(d->hwirq)); |
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writel(reg, addr); |
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raw_spin_unlock(&priv->htvec_lock); |
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} |
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static struct irq_chip htvec_irq_chip = { |
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.name = "LOONGSON_HTVEC", |
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.irq_mask = htvec_mask_irq, |
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.irq_unmask = htvec_unmask_irq, |
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.irq_ack = htvec_ack_irq, |
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}; |
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static int htvec_domain_alloc(struct irq_domain *domain, unsigned int virq, |
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unsigned int nr_irqs, void *arg) |
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{ |
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int ret; |
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unsigned long hwirq; |
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unsigned int type, i; |
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struct htvec *priv = domain->host_data; |
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ret = irq_domain_translate_onecell(domain, arg, &hwirq, &type); |
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if (ret) |
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return ret; |
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for (i = 0; i < nr_irqs; i++) { |
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irq_domain_set_info(domain, virq + i, hwirq + i, &htvec_irq_chip, |
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priv, handle_edge_irq, NULL, NULL); |
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} |
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return 0; |
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} |
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static void htvec_domain_free(struct irq_domain *domain, unsigned int virq, |
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unsigned int nr_irqs) |
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{ |
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int i; |
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for (i = 0; i < nr_irqs; i++) { |
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struct irq_data *d = irq_domain_get_irq_data(domain, virq + i); |
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irq_set_handler(virq + i, NULL); |
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irq_domain_reset_irq_data(d); |
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} |
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} |
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static const struct irq_domain_ops htvec_domain_ops = { |
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.translate = irq_domain_translate_onecell, |
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.alloc = htvec_domain_alloc, |
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.free = htvec_domain_free, |
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}; |
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static void htvec_reset(struct htvec *priv) |
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{ |
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u32 idx; |
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/* Clear IRQ cause registers, mask all interrupts */ |
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for (idx = 0; idx < priv->num_parents; idx++) { |
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writel_relaxed(0x0, priv->base + HTVEC_EN_OFF + 4 * idx); |
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writel_relaxed(0xFFFFFFFF, priv->base + 4 * idx); |
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} |
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} |
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static int htvec_of_init(struct device_node *node, |
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struct device_node *parent) |
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{ |
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struct htvec *priv; |
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int err, parent_irq[8], i; |
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priv = kzalloc(sizeof(*priv), GFP_KERNEL); |
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if (!priv) |
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return -ENOMEM; |
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raw_spin_lock_init(&priv->htvec_lock); |
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priv->base = of_iomap(node, 0); |
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if (!priv->base) { |
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err = -ENOMEM; |
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goto free_priv; |
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} |
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/* Interrupt may come from any of the 8 interrupt lines */ |
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for (i = 0; i < HTVEC_MAX_PARENT_IRQ; i++) { |
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parent_irq[i] = irq_of_parse_and_map(node, i); |
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if (parent_irq[i] <= 0) |
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break; |
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priv->num_parents++; |
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} |
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if (!priv->num_parents) { |
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pr_err("Failed to get parent irqs\n"); |
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err = -ENODEV; |
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goto iounmap_base; |
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} |
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priv->htvec_domain = irq_domain_create_linear(of_node_to_fwnode(node), |
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(VEC_COUNT_PER_REG * priv->num_parents), |
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&htvec_domain_ops, priv); |
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if (!priv->htvec_domain) { |
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pr_err("Failed to create IRQ domain\n"); |
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err = -ENOMEM; |
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goto irq_dispose; |
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} |
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htvec_reset(priv); |
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for (i = 0; i < priv->num_parents; i++) |
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irq_set_chained_handler_and_data(parent_irq[i], |
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htvec_irq_dispatch, priv); |
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return 0; |
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irq_dispose: |
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for (; i > 0; i--) |
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irq_dispose_mapping(parent_irq[i - 1]); |
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iounmap_base: |
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iounmap(priv->base); |
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free_priv: |
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kfree(priv); |
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return err; |
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} |
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IRQCHIP_DECLARE(htvec, "loongson,htvec-1.0", htvec_of_init);
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