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242 lines
6.8 KiB
242 lines
6.8 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* Copyright (c) 2010,2015,2019 The Linux Foundation. All rights reserved. |
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* Copyright (C) 2015 Linaro Ltd. |
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*/ |
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#include <linux/slab.h> |
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#include <linux/io.h> |
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#include <linux/module.h> |
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#include <linux/mutex.h> |
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#include <linux/errno.h> |
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#include <linux/err.h> |
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#include <linux/qcom_scm.h> |
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#include <linux/arm-smccc.h> |
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#include <linux/dma-mapping.h> |
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#include "qcom_scm.h" |
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static DEFINE_MUTEX(qcom_scm_lock); |
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/** |
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* struct arm_smccc_args |
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* @args: The array of values used in registers in smc instruction |
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*/ |
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struct arm_smccc_args { |
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unsigned long args[8]; |
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}; |
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/** |
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* struct scm_legacy_command - one SCM command buffer |
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* @len: total available memory for command and response |
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* @buf_offset: start of command buffer |
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* @resp_hdr_offset: start of response buffer |
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* @id: command to be executed |
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* @buf: buffer returned from scm_legacy_get_command_buffer() |
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* |
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* An SCM command is laid out in memory as follows: |
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* |
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* ------------------- <--- struct scm_legacy_command |
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* | command header | |
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* ------------------- <--- scm_legacy_get_command_buffer() |
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* | command buffer | |
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* ------------------- <--- struct scm_legacy_response and |
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* | response header | scm_legacy_command_to_response() |
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* ------------------- <--- scm_legacy_get_response_buffer() |
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* | response buffer | |
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* ------------------- |
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* |
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* There can be arbitrary padding between the headers and buffers so |
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* you should always use the appropriate scm_legacy_get_*_buffer() routines |
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* to access the buffers in a safe manner. |
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*/ |
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struct scm_legacy_command { |
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__le32 len; |
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__le32 buf_offset; |
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__le32 resp_hdr_offset; |
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__le32 id; |
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__le32 buf[]; |
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}; |
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/** |
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* struct scm_legacy_response - one SCM response buffer |
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* @len: total available memory for response |
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* @buf_offset: start of response data relative to start of scm_legacy_response |
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* @is_complete: indicates if the command has finished processing |
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*/ |
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struct scm_legacy_response { |
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__le32 len; |
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__le32 buf_offset; |
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__le32 is_complete; |
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}; |
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/** |
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* scm_legacy_command_to_response() - Get a pointer to a scm_legacy_response |
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* @cmd: command |
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* |
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* Returns a pointer to a response for a command. |
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*/ |
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static inline struct scm_legacy_response *scm_legacy_command_to_response( |
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const struct scm_legacy_command *cmd) |
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{ |
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return (void *)cmd + le32_to_cpu(cmd->resp_hdr_offset); |
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} |
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/** |
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* scm_legacy_get_command_buffer() - Get a pointer to a command buffer |
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* @cmd: command |
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* |
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* Returns a pointer to the command buffer of a command. |
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*/ |
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static inline void *scm_legacy_get_command_buffer( |
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const struct scm_legacy_command *cmd) |
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{ |
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return (void *)cmd->buf; |
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} |
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/** |
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* scm_legacy_get_response_buffer() - Get a pointer to a response buffer |
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* @rsp: response |
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* |
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* Returns a pointer to a response buffer of a response. |
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*/ |
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static inline void *scm_legacy_get_response_buffer( |
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const struct scm_legacy_response *rsp) |
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{ |
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return (void *)rsp + le32_to_cpu(rsp->buf_offset); |
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} |
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static void __scm_legacy_do(const struct arm_smccc_args *smc, |
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struct arm_smccc_res *res) |
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{ |
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do { |
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arm_smccc_smc(smc->args[0], smc->args[1], smc->args[2], |
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smc->args[3], smc->args[4], smc->args[5], |
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smc->args[6], smc->args[7], res); |
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} while (res->a0 == QCOM_SCM_INTERRUPTED); |
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} |
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/** |
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* qcom_scm_call() - Sends a command to the SCM and waits for the command to |
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* finish processing. |
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* |
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* A note on cache maintenance: |
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* Note that any buffers that are expected to be accessed by the secure world |
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* must be flushed before invoking qcom_scm_call and invalidated in the cache |
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* immediately after qcom_scm_call returns. Cache maintenance on the command |
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* and response buffers is taken care of by qcom_scm_call; however, callers are |
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* responsible for any other cached buffers passed over to the secure world. |
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*/ |
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int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc, |
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struct qcom_scm_res *res) |
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{ |
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u8 arglen = desc->arginfo & 0xf; |
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int ret = 0, context_id; |
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unsigned int i; |
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struct scm_legacy_command *cmd; |
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struct scm_legacy_response *rsp; |
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struct arm_smccc_args smc = {0}; |
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struct arm_smccc_res smc_res; |
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const size_t cmd_len = arglen * sizeof(__le32); |
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const size_t resp_len = MAX_QCOM_SCM_RETS * sizeof(__le32); |
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size_t alloc_len = sizeof(*cmd) + cmd_len + sizeof(*rsp) + resp_len; |
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dma_addr_t cmd_phys; |
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__le32 *arg_buf; |
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const __le32 *res_buf; |
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cmd = kzalloc(PAGE_ALIGN(alloc_len), GFP_KERNEL); |
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if (!cmd) |
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return -ENOMEM; |
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cmd->len = cpu_to_le32(alloc_len); |
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cmd->buf_offset = cpu_to_le32(sizeof(*cmd)); |
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cmd->resp_hdr_offset = cpu_to_le32(sizeof(*cmd) + cmd_len); |
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cmd->id = cpu_to_le32(SCM_LEGACY_FNID(desc->svc, desc->cmd)); |
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arg_buf = scm_legacy_get_command_buffer(cmd); |
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for (i = 0; i < arglen; i++) |
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arg_buf[i] = cpu_to_le32(desc->args[i]); |
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rsp = scm_legacy_command_to_response(cmd); |
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cmd_phys = dma_map_single(dev, cmd, alloc_len, DMA_TO_DEVICE); |
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if (dma_mapping_error(dev, cmd_phys)) { |
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kfree(cmd); |
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return -ENOMEM; |
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} |
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smc.args[0] = 1; |
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smc.args[1] = (unsigned long)&context_id; |
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smc.args[2] = cmd_phys; |
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mutex_lock(&qcom_scm_lock); |
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__scm_legacy_do(&smc, &smc_res); |
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if (smc_res.a0) |
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ret = qcom_scm_remap_error(smc_res.a0); |
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mutex_unlock(&qcom_scm_lock); |
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if (ret) |
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goto out; |
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do { |
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dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len, |
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sizeof(*rsp), DMA_FROM_DEVICE); |
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} while (!rsp->is_complete); |
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dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len + |
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le32_to_cpu(rsp->buf_offset), |
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resp_len, DMA_FROM_DEVICE); |
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if (res) { |
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res_buf = scm_legacy_get_response_buffer(rsp); |
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for (i = 0; i < MAX_QCOM_SCM_RETS; i++) |
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res->result[i] = le32_to_cpu(res_buf[i]); |
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} |
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out: |
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dma_unmap_single(dev, cmd_phys, alloc_len, DMA_TO_DEVICE); |
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kfree(cmd); |
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return ret; |
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} |
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#define SCM_LEGACY_ATOMIC_N_REG_ARGS 5 |
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#define SCM_LEGACY_ATOMIC_FIRST_REG_IDX 2 |
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#define SCM_LEGACY_CLASS_REGISTER (0x2 << 8) |
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#define SCM_LEGACY_MASK_IRQS BIT(5) |
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#define SCM_LEGACY_ATOMIC_ID(svc, cmd, n) \ |
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((SCM_LEGACY_FNID(svc, cmd) << 12) | \ |
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SCM_LEGACY_CLASS_REGISTER | \ |
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SCM_LEGACY_MASK_IRQS | \ |
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(n & 0xf)) |
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/** |
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* qcom_scm_call_atomic() - Send an atomic SCM command with up to 5 arguments |
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* and 3 return values |
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* @desc: SCM call descriptor containing arguments |
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* @res: SCM call return values |
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* |
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* This shall only be used with commands that are guaranteed to be |
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* uninterruptable, atomic and SMP safe. |
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*/ |
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int scm_legacy_call_atomic(struct device *unused, |
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const struct qcom_scm_desc *desc, |
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struct qcom_scm_res *res) |
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{ |
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int context_id; |
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struct arm_smccc_res smc_res; |
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size_t arglen = desc->arginfo & 0xf; |
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BUG_ON(arglen > SCM_LEGACY_ATOMIC_N_REG_ARGS); |
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arm_smccc_smc(SCM_LEGACY_ATOMIC_ID(desc->svc, desc->cmd, arglen), |
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(unsigned long)&context_id, |
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desc->args[0], desc->args[1], desc->args[2], |
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desc->args[3], desc->args[4], 0, &smc_res); |
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if (res) { |
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res->result[0] = smc_res.a1; |
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res->result[1] = smc_res.a2; |
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res->result[2] = smc_res.a3; |
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} |
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return smc_res.a0; |
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}
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