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684 lines
16 KiB
684 lines
16 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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#ifndef __ALPHA_IO_H |
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#define __ALPHA_IO_H |
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#ifdef __KERNEL__ |
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#include <linux/kernel.h> |
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#include <linux/mm.h> |
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#include <asm/compiler.h> |
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#include <asm/machvec.h> |
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#include <asm/hwrpb.h> |
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/* The generic header contains only prototypes. Including it ensures that |
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the implementation we have here matches that interface. */ |
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#include <asm-generic/iomap.h> |
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/* We don't use IO slowdowns on the Alpha, but.. */ |
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#define __SLOW_DOWN_IO do { } while (0) |
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#define SLOW_DOWN_IO do { } while (0) |
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/* |
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* Virtual -> physical identity mapping starts at this offset |
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*/ |
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#ifdef USE_48_BIT_KSEG |
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#define IDENT_ADDR 0xffff800000000000UL |
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#else |
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#define IDENT_ADDR 0xfffffc0000000000UL |
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#endif |
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/* |
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* We try to avoid hae updates (thus the cache), but when we |
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* do need to update the hae, we need to do it atomically, so |
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* that any interrupts wouldn't get confused with the hae |
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* register not being up-to-date with respect to the hardware |
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* value. |
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*/ |
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extern inline void __set_hae(unsigned long new_hae) |
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{ |
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unsigned long flags = swpipl(IPL_MAX); |
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barrier(); |
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alpha_mv.hae_cache = new_hae; |
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*alpha_mv.hae_register = new_hae; |
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mb(); |
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/* Re-read to make sure it was written. */ |
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new_hae = *alpha_mv.hae_register; |
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setipl(flags); |
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barrier(); |
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} |
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extern inline void set_hae(unsigned long new_hae) |
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{ |
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if (new_hae != alpha_mv.hae_cache) |
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__set_hae(new_hae); |
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} |
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/* |
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* Change virtual addresses to physical addresses and vv. |
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*/ |
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#ifdef USE_48_BIT_KSEG |
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static inline unsigned long virt_to_phys(volatile void *address) |
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{ |
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return (unsigned long)address - IDENT_ADDR; |
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} |
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static inline void * phys_to_virt(unsigned long address) |
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{ |
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return (void *) (address + IDENT_ADDR); |
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} |
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#else |
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static inline unsigned long virt_to_phys(volatile void *address) |
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{ |
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unsigned long phys = (unsigned long)address; |
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/* Sign-extend from bit 41. */ |
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phys <<= (64 - 41); |
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phys = (long)phys >> (64 - 41); |
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/* Crop to the physical address width of the processor. */ |
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phys &= (1ul << hwrpb->pa_bits) - 1; |
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return phys; |
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} |
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static inline void * phys_to_virt(unsigned long address) |
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{ |
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return (void *)(IDENT_ADDR + (address & ((1ul << 41) - 1))); |
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} |
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#endif |
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#define virt_to_phys virt_to_phys |
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#define phys_to_virt phys_to_virt |
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#define page_to_phys(page) page_to_pa(page) |
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/* Maximum PIO space address supported? */ |
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#define IO_SPACE_LIMIT 0xffff |
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/* |
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* Change addresses as seen by the kernel (virtual) to addresses as |
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* seen by a device (bus), and vice versa. |
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* |
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* Note that this only works for a limited range of kernel addresses, |
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* and very well may not span all memory. Consider this interface |
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* deprecated in favour of the DMA-mapping API. |
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*/ |
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extern unsigned long __direct_map_base; |
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extern unsigned long __direct_map_size; |
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static inline unsigned long __deprecated isa_virt_to_bus(volatile void *address) |
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{ |
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unsigned long phys = virt_to_phys(address); |
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unsigned long bus = phys + __direct_map_base; |
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return phys <= __direct_map_size ? bus : 0; |
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} |
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#define isa_virt_to_bus isa_virt_to_bus |
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static inline void * __deprecated isa_bus_to_virt(unsigned long address) |
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{ |
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void *virt; |
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/* This check is a sanity check but also ensures that bus address 0 |
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maps to virtual address 0 which is useful to detect null pointers |
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(the NCR driver is much simpler if NULL pointers are preserved). */ |
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address -= __direct_map_base; |
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virt = phys_to_virt(address); |
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return (long)address <= 0 ? NULL : virt; |
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} |
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#define isa_bus_to_virt isa_bus_to_virt |
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/* |
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* There are different chipsets to interface the Alpha CPUs to the world. |
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*/ |
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#define IO_CONCAT(a,b) _IO_CONCAT(a,b) |
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#define _IO_CONCAT(a,b) a ## _ ## b |
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#ifdef CONFIG_ALPHA_GENERIC |
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/* In a generic kernel, we always go through the machine vector. */ |
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#define REMAP1(TYPE, NAME, QUAL) \ |
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static inline TYPE generic_##NAME(QUAL void __iomem *addr) \ |
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{ \ |
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return alpha_mv.mv_##NAME(addr); \ |
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} |
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#define REMAP2(TYPE, NAME, QUAL) \ |
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static inline void generic_##NAME(TYPE b, QUAL void __iomem *addr) \ |
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{ \ |
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alpha_mv.mv_##NAME(b, addr); \ |
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} |
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REMAP1(unsigned int, ioread8, const) |
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REMAP1(unsigned int, ioread16, const) |
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REMAP1(unsigned int, ioread32, const) |
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REMAP1(u64, ioread64, const) |
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REMAP1(u8, readb, const volatile) |
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REMAP1(u16, readw, const volatile) |
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REMAP1(u32, readl, const volatile) |
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REMAP1(u64, readq, const volatile) |
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REMAP2(u8, iowrite8, /**/) |
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REMAP2(u16, iowrite16, /**/) |
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REMAP2(u32, iowrite32, /**/) |
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REMAP2(u64, iowrite64, /**/) |
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REMAP2(u8, writeb, volatile) |
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REMAP2(u16, writew, volatile) |
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REMAP2(u32, writel, volatile) |
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REMAP2(u64, writeq, volatile) |
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#undef REMAP1 |
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#undef REMAP2 |
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extern inline void __iomem *generic_ioportmap(unsigned long a) |
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{ |
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return alpha_mv.mv_ioportmap(a); |
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} |
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static inline void __iomem *generic_ioremap(unsigned long a, unsigned long s) |
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{ |
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return alpha_mv.mv_ioremap(a, s); |
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} |
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static inline void generic_iounmap(volatile void __iomem *a) |
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{ |
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return alpha_mv.mv_iounmap(a); |
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} |
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static inline int generic_is_ioaddr(unsigned long a) |
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{ |
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return alpha_mv.mv_is_ioaddr(a); |
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} |
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static inline int generic_is_mmio(const volatile void __iomem *a) |
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{ |
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return alpha_mv.mv_is_mmio(a); |
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} |
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#define __IO_PREFIX generic |
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#define generic_trivial_rw_bw 0 |
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#define generic_trivial_rw_lq 0 |
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#define generic_trivial_io_bw 0 |
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#define generic_trivial_io_lq 0 |
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#define generic_trivial_iounmap 0 |
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#else |
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#if defined(CONFIG_ALPHA_APECS) |
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# include <asm/core_apecs.h> |
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#elif defined(CONFIG_ALPHA_CIA) |
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# include <asm/core_cia.h> |
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#elif defined(CONFIG_ALPHA_IRONGATE) |
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# include <asm/core_irongate.h> |
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#elif defined(CONFIG_ALPHA_JENSEN) |
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# include <asm/jensen.h> |
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#elif defined(CONFIG_ALPHA_LCA) |
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# include <asm/core_lca.h> |
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#elif defined(CONFIG_ALPHA_MARVEL) |
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# include <asm/core_marvel.h> |
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#elif defined(CONFIG_ALPHA_MCPCIA) |
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# include <asm/core_mcpcia.h> |
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#elif defined(CONFIG_ALPHA_POLARIS) |
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# include <asm/core_polaris.h> |
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#elif defined(CONFIG_ALPHA_T2) |
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# include <asm/core_t2.h> |
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#elif defined(CONFIG_ALPHA_TSUNAMI) |
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# include <asm/core_tsunami.h> |
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#elif defined(CONFIG_ALPHA_TITAN) |
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# include <asm/core_titan.h> |
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#elif defined(CONFIG_ALPHA_WILDFIRE) |
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# include <asm/core_wildfire.h> |
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#else |
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#error "What system is this?" |
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#endif |
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#endif /* GENERIC */ |
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/* |
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* We always have external versions of these routines. |
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*/ |
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extern u8 inb(unsigned long port); |
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extern u16 inw(unsigned long port); |
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extern u32 inl(unsigned long port); |
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extern void outb(u8 b, unsigned long port); |
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extern void outw(u16 b, unsigned long port); |
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extern void outl(u32 b, unsigned long port); |
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#define inb inb |
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#define inw inw |
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#define inl inl |
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#define outb outb |
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#define outw outw |
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#define outl outl |
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extern u8 readb(const volatile void __iomem *addr); |
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extern u16 readw(const volatile void __iomem *addr); |
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extern u32 readl(const volatile void __iomem *addr); |
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extern u64 readq(const volatile void __iomem *addr); |
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extern void writeb(u8 b, volatile void __iomem *addr); |
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extern void writew(u16 b, volatile void __iomem *addr); |
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extern void writel(u32 b, volatile void __iomem *addr); |
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extern void writeq(u64 b, volatile void __iomem *addr); |
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#define readb readb |
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#define readw readw |
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#define readl readl |
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#define readq readq |
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#define writeb writeb |
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#define writew writew |
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#define writel writel |
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#define writeq writeq |
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extern u8 __raw_readb(const volatile void __iomem *addr); |
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extern u16 __raw_readw(const volatile void __iomem *addr); |
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extern u32 __raw_readl(const volatile void __iomem *addr); |
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extern u64 __raw_readq(const volatile void __iomem *addr); |
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extern void __raw_writeb(u8 b, volatile void __iomem *addr); |
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extern void __raw_writew(u16 b, volatile void __iomem *addr); |
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extern void __raw_writel(u32 b, volatile void __iomem *addr); |
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extern void __raw_writeq(u64 b, volatile void __iomem *addr); |
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#define __raw_readb __raw_readb |
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#define __raw_readw __raw_readw |
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#define __raw_readl __raw_readl |
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#define __raw_readq __raw_readq |
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#define __raw_writeb __raw_writeb |
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#define __raw_writew __raw_writew |
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#define __raw_writel __raw_writel |
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#define __raw_writeq __raw_writeq |
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/* |
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* Mapping from port numbers to __iomem space is pretty easy. |
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*/ |
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/* These two have to be extern inline because of the extern prototype from |
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<asm-generic/iomap.h>. It is not legal to mix "extern" and "static" for |
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the same declaration. */ |
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extern inline void __iomem *ioport_map(unsigned long port, unsigned int size) |
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{ |
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return IO_CONCAT(__IO_PREFIX,ioportmap) (port); |
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} |
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extern inline void ioport_unmap(void __iomem *addr) |
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{ |
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} |
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#define ioport_map ioport_map |
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#define ioport_unmap ioport_unmap |
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static inline void __iomem *ioremap(unsigned long port, unsigned long size) |
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{ |
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return IO_CONCAT(__IO_PREFIX,ioremap) (port, size); |
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} |
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#define ioremap_wc ioremap |
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#define ioremap_uc ioremap |
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static inline void iounmap(volatile void __iomem *addr) |
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{ |
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IO_CONCAT(__IO_PREFIX,iounmap)(addr); |
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} |
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static inline int __is_ioaddr(unsigned long addr) |
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{ |
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return IO_CONCAT(__IO_PREFIX,is_ioaddr)(addr); |
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} |
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#define __is_ioaddr(a) __is_ioaddr((unsigned long)(a)) |
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static inline int __is_mmio(const volatile void __iomem *addr) |
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{ |
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return IO_CONCAT(__IO_PREFIX,is_mmio)(addr); |
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} |
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/* |
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* If the actual I/O bits are sufficiently trivial, then expand inline. |
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*/ |
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#if IO_CONCAT(__IO_PREFIX,trivial_io_bw) |
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extern inline unsigned int ioread8(const void __iomem *addr) |
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{ |
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unsigned int ret; |
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mb(); |
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ret = IO_CONCAT(__IO_PREFIX,ioread8)(addr); |
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mb(); |
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return ret; |
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} |
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extern inline unsigned int ioread16(const void __iomem *addr) |
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{ |
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unsigned int ret; |
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mb(); |
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ret = IO_CONCAT(__IO_PREFIX,ioread16)(addr); |
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mb(); |
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return ret; |
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} |
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extern inline void iowrite8(u8 b, void __iomem *addr) |
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{ |
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mb(); |
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IO_CONCAT(__IO_PREFIX, iowrite8)(b, addr); |
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} |
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extern inline void iowrite16(u16 b, void __iomem *addr) |
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{ |
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mb(); |
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IO_CONCAT(__IO_PREFIX, iowrite16)(b, addr); |
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} |
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extern inline u8 inb(unsigned long port) |
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{ |
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return ioread8(ioport_map(port, 1)); |
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} |
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extern inline u16 inw(unsigned long port) |
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{ |
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return ioread16(ioport_map(port, 2)); |
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} |
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extern inline void outb(u8 b, unsigned long port) |
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{ |
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iowrite8(b, ioport_map(port, 1)); |
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} |
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extern inline void outw(u16 b, unsigned long port) |
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{ |
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iowrite16(b, ioport_map(port, 2)); |
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} |
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#endif |
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#define ioread8 ioread8 |
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#define ioread16 ioread16 |
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#define iowrite8 iowrite8 |
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#define iowrite16 iowrite16 |
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#if IO_CONCAT(__IO_PREFIX,trivial_io_lq) |
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extern inline unsigned int ioread32(const void __iomem *addr) |
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{ |
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unsigned int ret; |
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mb(); |
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ret = IO_CONCAT(__IO_PREFIX,ioread32)(addr); |
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mb(); |
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return ret; |
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} |
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extern inline u64 ioread64(const void __iomem *addr) |
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{ |
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unsigned int ret; |
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mb(); |
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ret = IO_CONCAT(__IO_PREFIX,ioread64)(addr); |
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mb(); |
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return ret; |
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} |
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extern inline void iowrite32(u32 b, void __iomem *addr) |
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{ |
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mb(); |
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IO_CONCAT(__IO_PREFIX, iowrite32)(b, addr); |
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} |
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extern inline void iowrite64(u64 b, void __iomem *addr) |
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{ |
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mb(); |
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IO_CONCAT(__IO_PREFIX, iowrite64)(b, addr); |
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} |
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extern inline u32 inl(unsigned long port) |
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{ |
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return ioread32(ioport_map(port, 4)); |
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} |
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extern inline void outl(u32 b, unsigned long port) |
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{ |
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iowrite32(b, ioport_map(port, 4)); |
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} |
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#endif |
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#define ioread32 ioread32 |
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#define ioread64 ioread64 |
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#define iowrite32 iowrite32 |
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#define iowrite64 iowrite64 |
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#if IO_CONCAT(__IO_PREFIX,trivial_rw_bw) == 1 |
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extern inline u8 __raw_readb(const volatile void __iomem *addr) |
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{ |
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return IO_CONCAT(__IO_PREFIX,readb)(addr); |
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} |
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extern inline u16 __raw_readw(const volatile void __iomem *addr) |
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{ |
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return IO_CONCAT(__IO_PREFIX,readw)(addr); |
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} |
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extern inline void __raw_writeb(u8 b, volatile void __iomem *addr) |
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{ |
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IO_CONCAT(__IO_PREFIX,writeb)(b, addr); |
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} |
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extern inline void __raw_writew(u16 b, volatile void __iomem *addr) |
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{ |
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IO_CONCAT(__IO_PREFIX,writew)(b, addr); |
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} |
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extern inline u8 readb(const volatile void __iomem *addr) |
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{ |
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u8 ret; |
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mb(); |
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ret = __raw_readb(addr); |
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mb(); |
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return ret; |
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} |
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extern inline u16 readw(const volatile void __iomem *addr) |
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{ |
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u16 ret; |
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mb(); |
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ret = __raw_readw(addr); |
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mb(); |
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return ret; |
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} |
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extern inline void writeb(u8 b, volatile void __iomem *addr) |
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{ |
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mb(); |
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__raw_writeb(b, addr); |
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} |
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extern inline void writew(u16 b, volatile void __iomem *addr) |
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{ |
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mb(); |
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__raw_writew(b, addr); |
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} |
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#endif |
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#if IO_CONCAT(__IO_PREFIX,trivial_rw_lq) == 1 |
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extern inline u32 __raw_readl(const volatile void __iomem *addr) |
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{ |
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return IO_CONCAT(__IO_PREFIX,readl)(addr); |
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} |
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extern inline u64 __raw_readq(const volatile void __iomem *addr) |
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{ |
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return IO_CONCAT(__IO_PREFIX,readq)(addr); |
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} |
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extern inline void __raw_writel(u32 b, volatile void __iomem *addr) |
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{ |
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IO_CONCAT(__IO_PREFIX,writel)(b, addr); |
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} |
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extern inline void __raw_writeq(u64 b, volatile void __iomem *addr) |
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{ |
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IO_CONCAT(__IO_PREFIX,writeq)(b, addr); |
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} |
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extern inline u32 readl(const volatile void __iomem *addr) |
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{ |
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u32 ret; |
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mb(); |
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ret = __raw_readl(addr); |
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mb(); |
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return ret; |
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} |
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extern inline u64 readq(const volatile void __iomem *addr) |
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{ |
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u64 ret; |
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mb(); |
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ret = __raw_readq(addr); |
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mb(); |
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return ret; |
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} |
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extern inline void writel(u32 b, volatile void __iomem *addr) |
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{ |
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mb(); |
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__raw_writel(b, addr); |
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} |
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extern inline void writeq(u64 b, volatile void __iomem *addr) |
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{ |
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mb(); |
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__raw_writeq(b, addr); |
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} |
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#endif |
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#define ioread16be(p) swab16(ioread16(p)) |
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#define ioread32be(p) swab32(ioread32(p)) |
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#define iowrite16be(v,p) iowrite16(swab16(v), (p)) |
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#define iowrite32be(v,p) iowrite32(swab32(v), (p)) |
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#define inb_p inb |
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#define inw_p inw |
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#define inl_p inl |
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#define outb_p outb |
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#define outw_p outw |
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#define outl_p outl |
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extern u8 readb_relaxed(const volatile void __iomem *addr); |
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extern u16 readw_relaxed(const volatile void __iomem *addr); |
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extern u32 readl_relaxed(const volatile void __iomem *addr); |
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extern u64 readq_relaxed(const volatile void __iomem *addr); |
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#define readb_relaxed readb_relaxed |
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#define readw_relaxed readw_relaxed |
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#define readl_relaxed readl_relaxed |
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#define readq_relaxed readq_relaxed |
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#if IO_CONCAT(__IO_PREFIX,trivial_io_bw) |
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extern inline u8 readb_relaxed(const volatile void __iomem *addr) |
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{ |
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mb(); |
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return __raw_readb(addr); |
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} |
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extern inline u16 readw_relaxed(const volatile void __iomem *addr) |
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{ |
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mb(); |
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return __raw_readw(addr); |
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} |
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#endif |
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#if IO_CONCAT(__IO_PREFIX,trivial_io_lq) |
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extern inline u32 readl_relaxed(const volatile void __iomem *addr) |
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{ |
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mb(); |
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return __raw_readl(addr); |
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} |
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extern inline u64 readq_relaxed(const volatile void __iomem *addr) |
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{ |
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mb(); |
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return __raw_readq(addr); |
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} |
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#endif |
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#define writeb_relaxed writeb |
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#define writew_relaxed writew |
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#define writel_relaxed writel |
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#define writeq_relaxed writeq |
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/* |
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* String version of IO memory access ops: |
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*/ |
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extern void memcpy_fromio(void *, const volatile void __iomem *, long); |
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extern void memcpy_toio(volatile void __iomem *, const void *, long); |
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extern void _memset_c_io(volatile void __iomem *, unsigned long, long); |
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static inline void memset_io(volatile void __iomem *addr, u8 c, long len) |
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{ |
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_memset_c_io(addr, 0x0101010101010101UL * c, len); |
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} |
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#define __HAVE_ARCH_MEMSETW_IO |
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static inline void memsetw_io(volatile void __iomem *addr, u16 c, long len) |
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{ |
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_memset_c_io(addr, 0x0001000100010001UL * c, len); |
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} |
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#define memset_io memset_io |
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#define memcpy_fromio memcpy_fromio |
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#define memcpy_toio memcpy_toio |
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/* |
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* String versions of in/out ops: |
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*/ |
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extern void insb (unsigned long port, void *dst, unsigned long count); |
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extern void insw (unsigned long port, void *dst, unsigned long count); |
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extern void insl (unsigned long port, void *dst, unsigned long count); |
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extern void outsb (unsigned long port, const void *src, unsigned long count); |
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extern void outsw (unsigned long port, const void *src, unsigned long count); |
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extern void outsl (unsigned long port, const void *src, unsigned long count); |
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#define insb insb |
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#define insw insw |
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#define insl insl |
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#define outsb outsb |
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#define outsw outsw |
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#define outsl outsl |
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/* |
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* The Alpha Jensen hardware for some rather strange reason puts |
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* the RTC clock at 0x170 instead of 0x70. Probably due to some |
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* misguided idea about using 0x70 for NMI stuff. |
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* |
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* These defines will override the defaults when doing RTC queries |
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*/ |
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#ifdef CONFIG_ALPHA_GENERIC |
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# define RTC_PORT(x) ((x) + alpha_mv.rtc_port) |
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#else |
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# ifdef CONFIG_ALPHA_JENSEN |
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# define RTC_PORT(x) (0x170+(x)) |
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# else |
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# define RTC_PORT(x) (0x70 + (x)) |
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# endif |
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#endif |
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#define RTC_ALWAYS_BCD 0 |
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|
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/* |
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* Convert a physical pointer to a virtual kernel pointer for /dev/mem |
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* access |
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*/ |
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#define xlate_dev_mem_ptr(p) __va(p) |
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|
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/* |
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* These get provided from <asm-generic/iomap.h> since alpha does not |
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* select GENERIC_IOMAP. |
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*/ |
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#define ioread64 ioread64 |
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#define iowrite64 iowrite64 |
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#define ioread64be ioread64be |
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#define iowrite64be iowrite64be |
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#define ioread8_rep ioread8_rep |
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#define ioread16_rep ioread16_rep |
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#define ioread32_rep ioread32_rep |
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#define iowrite8_rep iowrite8_rep |
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#define iowrite16_rep iowrite16_rep |
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#define iowrite32_rep iowrite32_rep |
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#define pci_iounmap pci_iounmap |
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#include <asm-generic/io.h> |
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#endif /* __KERNEL__ */ |
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#endif /* __ALPHA_IO_H */
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