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82 lines
2.3 KiB
82 lines
2.3 KiB
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/usb/ti,hd3ss3220.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: TI HD3SS3220 TypeC DRP Port Controller |
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maintainers: |
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- Biju Das <[email protected]> |
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description: |- |
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HD3SS3220 is a USB SuperSpeed (SS) 2:1 mux with DRP port controller. The device provides Channel |
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Configuration (CC) logic and 5V VCONN sourcing for ecosystems implementing USB Type-C. The |
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HD3SS3220 can be configured as a Downstream Facing Port (DFP), Upstream Facing Port (UFP) or a |
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Dual Role Port (DRP) making it ideal for any application. |
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properties: |
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compatible: |
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const: ti,hd3ss3220 |
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reg: |
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maxItems: 1 |
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interrupts: |
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maxItems: 1 |
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ports: |
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$ref: /schemas/graph.yaml#/properties/ports |
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description: OF graph bindings (specified in bindings/graph.txt) that model |
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SS data bus to the SS capable connector. |
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properties: |
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port@0: |
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$ref: /schemas/graph.yaml#/properties/port |
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description: Super Speed (SS) MUX inputs connected to SS capable connector. |
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port@1: |
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$ref: /schemas/graph.yaml#/properties/port |
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description: Output of 2:1 MUX connected to Super Speed (SS) data bus. |
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required: |
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- port@0 |
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- port@1 |
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required: |
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- compatible |
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- reg |
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- interrupts |
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additionalProperties: false |
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examples: |
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- | |
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i2c0 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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hd3ss3220@47 { |
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compatible = "ti,hd3ss3220"; |
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reg = <0x47>; |
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interrupt-parent = <&gpio6>; |
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interrupts = <3>; |
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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port@0 { |
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reg = <0>; |
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hd3ss3220_in_ep: endpoint { |
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remote-endpoint = <&ss_ep>; |
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}; |
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}; |
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port@1 { |
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reg = <1>; |
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hd3ss3220_out_ep: endpoint { |
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remote-endpoint = <&usb3_role_switch>; |
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}; |
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}; |
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}; |
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}; |
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};
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