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51 lines
1.4 KiB
51 lines
1.4 KiB
Qualcomm QPNP PMIC Temperature Alarm |
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QPNP temperature alarm peripherals are found inside of Qualcomm PMIC chips |
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that utilize the Qualcomm SPMI implementation. These peripherals provide an |
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interrupt signal and status register to identify high PMIC die temperature. |
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Required properties: |
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- compatible: Should contain "qcom,spmi-temp-alarm". |
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- reg: Specifies the SPMI address. |
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- interrupts: PMIC temperature alarm interrupt. |
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- #thermal-sensor-cells: Should be 0. See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for a description. |
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Optional properties: |
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- io-channels: Should contain IIO channel specifier for the ADC channel, |
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which report chip die temperature. |
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- io-channel-names: Should contain "thermal". |
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Example: |
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pm8941_temp: thermal-alarm@2400 { |
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compatible = "qcom,spmi-temp-alarm"; |
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reg = <0x2400>; |
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interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>; |
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#thermal-sensor-cells = <0>; |
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io-channels = <&pm8941_vadc VADC_DIE_TEMP>; |
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io-channel-names = "thermal"; |
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}; |
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thermal-zones { |
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pm8941 { |
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polling-delay-passive = <250>; |
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polling-delay = <1000>; |
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thermal-sensors = <&pm8941_temp>; |
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trips { |
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stage1 { |
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temperature = <105000>; |
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hysteresis = <2000>; |
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type = "passive"; |
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}; |
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stage2 { |
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temperature = <125000>; |
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hysteresis = <2000>; |
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type = "critical"; |
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}; |
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}; |
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}; |
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}; |
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