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114 lines
3.7 KiB
114 lines
3.7 KiB
* Rockchip Pinmux Controller |
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The Rockchip Pinmux Controller, enables the IC |
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to share one PAD to several functional blocks. The sharing is done by |
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multiplexing the PAD input/output signals. For each PAD there are several |
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muxing options with option 0 being the use as a GPIO. |
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Please refer to pinctrl-bindings.txt in this directory for details of the |
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common pinctrl bindings used by client devices, including the meaning of the |
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phrase "pin configuration node". |
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The Rockchip pin configuration node is a node of a group of pins which can be |
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used for a specific device or function. This node represents both mux and |
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config of the pins in that group. The 'pins' selects the function mode(also |
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named pin mode) this pin can work on and the 'config' configures various pad |
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settings such as pull-up, etc. |
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The pins are grouped into up to 5 individual pin banks which need to be |
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defined as gpio sub-nodes of the pinmux controller. |
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Required properties for iomux controller: |
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- compatible: should be |
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"rockchip,px30-pinctrl": for Rockchip PX30 |
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"rockchip,rv1108-pinctrl": for Rockchip RV1108 |
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"rockchip,rk2928-pinctrl": for Rockchip RK2928 |
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"rockchip,rk3066a-pinctrl": for Rockchip RK3066a |
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"rockchip,rk3066b-pinctrl": for Rockchip RK3066b |
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"rockchip,rk3128-pinctrl": for Rockchip RK3128 |
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"rockchip,rk3188-pinctrl": for Rockchip RK3188 |
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"rockchip,rk3228-pinctrl": for Rockchip RK3228 |
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"rockchip,rk3288-pinctrl": for Rockchip RK3288 |
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"rockchip,rk3308-pinctrl": for Rockchip RK3308 |
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"rockchip,rk3328-pinctrl": for Rockchip RK3328 |
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"rockchip,rk3368-pinctrl": for Rockchip RK3368 |
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"rockchip,rk3399-pinctrl": for Rockchip RK3399 |
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"rockchip,rk3568-pinctrl": for Rockchip RK3568 |
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- rockchip,grf: phandle referencing a syscon providing the |
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"general register files" |
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Optional properties for iomux controller: |
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- rockchip,pmu: phandle referencing a syscon providing the pmu registers |
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as some SoCs carry parts of the iomux controller registers there. |
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Required for at least rk3188 and rk3288. On the rk3368 this should |
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point to the PMUGRF syscon. |
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Deprecated properties for iomux controller: |
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- reg: first element is the general register space of the iomux controller |
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It should be large enough to contain also separate pull registers. |
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second element is the separate pull register space of the rk3188. |
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Use rockchip,grf and rockchip,pmu described above instead. |
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Required properties for gpio sub nodes: |
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See rockchip,gpio-bank.yaml |
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Required properties for pin configuration node: |
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- rockchip,pins: 3 integers array, represents a group of pins mux and config |
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setting. The format is rockchip,pins = <PIN_BANK PIN_BANK_IDX MUX &phandle>. |
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The MUX 0 means gpio and MUX 1 to N mean the specific device function. |
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The phandle of a node containing the generic pinconfig options |
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to use, as described in pinctrl-bindings.txt in this directory. |
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Examples: |
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#include <dt-bindings/pinctrl/rockchip.h> |
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... |
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pinctrl@20008000 { |
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compatible = "rockchip,rk3066a-pinctrl"; |
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rockchip,grf = <&grf>; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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gpio0: gpio0@20034000 { |
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compatible = "rockchip,gpio-bank"; |
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reg = <0x20034000 0x100>; |
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interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&clk_gates8 9>; |
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gpio-controller; |
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#gpio-cells = <2>; |
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interrupt-controller; |
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#interrupt-cells = <2>; |
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}; |
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... |
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pcfg_pull_default: pcfg_pull_default { |
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bias-pull-pin-default |
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}; |
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uart2 { |
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uart2_xfer: uart2-xfer { |
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rockchip,pins = <1 RK_PB0 1 &pcfg_pull_default>, |
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<1 RK_PB1 1 &pcfg_pull_default>; |
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}; |
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}; |
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}; |
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uart2: serial@20064000 { |
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compatible = "snps,dw-apb-uart"; |
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reg = <0x20064000 0x400>; |
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interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; |
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reg-shift = <2>; |
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reg-io-width = <1>; |
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clocks = <&mux_uart2>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&uart2_xfer>; |
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};
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