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83 lines
3.5 KiB
83 lines
3.5 KiB
* MediaTek MT6797 Pin Controller |
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The MediaTek's MT6797 Pin controller is used to control SoC pins. |
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Required properties: |
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- compatible: Value should be one of the following. |
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"mediatek,mt6797-pinctrl", compatible with mt6797 pinctrl. |
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- reg: Should contain address and size for gpio, iocfgl, iocfgb, |
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iocfgr and iocfgt register bases. |
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- reg-names: An array of strings describing the "reg" entries. Must |
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contain "gpio", "iocfgl", "iocfgb", "iocfgr", "iocfgt". |
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- gpio-controller: Marks the device node as a gpio controller. |
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- #gpio-cells: Should be two. The first cell is the gpio pin number |
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and the second cell is used for optional parameters. |
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Optional properties: |
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- interrupt-controller: Marks the device node as an interrupt controller. |
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- #interrupt-cells: Should be two. |
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- interrupts : The interrupt outputs from the controller. |
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Please refer to pinctrl-bindings.txt in this directory for details of the |
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common pinctrl bindings used by client devices. |
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Subnode format |
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A pinctrl node should contain at least one subnodes representing the |
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pinctrl groups available on the machine. Each subnode will list the |
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pins it needs, and how they should be configured, with regard to muxer |
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configuration, pullups, drive strength, input enable/disable and input schmitt. |
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node { |
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pinmux = <PIN_NUMBER_PINMUX>; |
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GENERIC_PINCONFIG; |
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}; |
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Required properties: |
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- pinmux: Integer array, represents gpio pin number and mux setting. |
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Supported pin number and mux varies for different SoCs, and are defined |
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as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly. |
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Optional properties: |
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- GENERIC_PINCONFIG: is the generic pinconfig options to use, bias-disable, |
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bias-pull, bias-pull-down, input-enable, input-schmitt-enable, |
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input-schmitt-disable, output-enable output-low, output-high, |
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drive-strength, and slew-rate are valid. |
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Valid arguments for 'slew-rate' are '0' for no slew rate controlled and |
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'1' for slower slew rate respectively. Valid arguments for 'drive-strength' |
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is limited, such as 2, 4, 8, 12, or 16 in mA. |
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Some optional vendor properties as defined are valid to specify in a |
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pinconf subnode: |
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- mediatek,tdsel: An integer describing the steps for output level shifter |
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duty cycle when asserted (high pulse width adjustment). Valid arguments |
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are from 0 to 15. |
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- mediatek,rdsel: An integer describing the steps for input level shifter |
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duty cycle when asserted (high pulse width adjustment). Valid arguments |
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are from 0 to 63. |
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- mediatek,pull-up-adv: An integer describing the code R1R0 as 0, 1, 2 |
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or 3 for the advanced pull-up resistors. |
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- mediatek,pull-down-adv: An integer describing the code R1R0 as 0, 1, 2, |
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or 3 for the advanced pull-down resistors. |
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Examples: |
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pio: pinctrl@10005000 { |
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compatible = "mediatek,mt6797-pinctrl"; |
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reg = <0 0x10005000 0 0x1000>, |
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<0 0x10002000 0 0x400>, |
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<0 0x10002400 0 0x400>, |
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<0 0x10002800 0 0x400>, |
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<0 0x10002C00 0 0x400>; |
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reg-names = "gpio", "iocfgl", "iocfgb", |
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"iocfgr", "iocfgt"; |
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gpio-controller; |
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#gpio-cells = <2>; |
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uart1_pins_a: uart1 { |
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pins1 { |
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pinmux = <MT6797_GPIO232__FUNC_URXD1>, |
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<MT6797_GPIO233__FUNC_UTXD1>; |
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}; |
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}; |
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};
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